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path: root/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
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Diffstat (limited to 'drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c')
-rw-r--r--drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c39
1 files changed, 21 insertions, 18 deletions
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 096eea985b6f..fa8da0ef707e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -53,27 +53,29 @@ static const struct hibmc_dislay_pll_config hibmc_pll_table[] = {
};
static int hibmc_plane_atomic_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_atomic_state *state)
{
- struct drm_framebuffer *fb = state->fb;
- struct drm_crtc *crtc = state->crtc;
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
+ plane);
+ struct drm_framebuffer *fb = new_plane_state->fb;
+ struct drm_crtc *crtc = new_plane_state->crtc;
struct drm_crtc_state *crtc_state;
- u32 src_w = state->src_w >> 16;
- u32 src_h = state->src_h >> 16;
+ u32 src_w = new_plane_state->src_w >> 16;
+ u32 src_h = new_plane_state->src_h >> 16;
if (!crtc || !fb)
return 0;
- crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
+ crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
- if (src_w != state->crtc_w || src_h != state->crtc_h) {
+ if (src_w != new_plane_state->crtc_w || src_h != new_plane_state->crtc_h) {
drm_dbg_atomic(plane->dev, "scale not support\n");
return -EINVAL;
}
- if (state->crtc_x < 0 || state->crtc_y < 0) {
+ if (new_plane_state->crtc_x < 0 || new_plane_state->crtc_y < 0) {
drm_dbg_atomic(plane->dev, "crtc_x/y of drm_plane state is invalid\n");
return -EINVAL;
}
@@ -81,15 +83,15 @@ static int hibmc_plane_atomic_check(struct drm_plane *plane,
if (!crtc_state->enable)
return 0;
- if (state->crtc_x + state->crtc_w >
+ if (new_plane_state->crtc_x + new_plane_state->crtc_w >
crtc_state->adjusted_mode.hdisplay ||
- state->crtc_y + state->crtc_h >
+ new_plane_state->crtc_y + new_plane_state->crtc_h >
crtc_state->adjusted_mode.vdisplay) {
drm_dbg_atomic(plane->dev, "visible portion of plane is invalid\n");
return -EINVAL;
}
- if (state->fb->pitches[0] % 128 != 0) {
+ if (new_plane_state->fb->pitches[0] % 128 != 0) {
drm_dbg_atomic(plane->dev, "wrong stride with 128-byte aligned\n");
return -EINVAL;
}
@@ -97,19 +99,20 @@ static int hibmc_plane_atomic_check(struct drm_plane *plane,
}
static void hibmc_plane_atomic_update(struct drm_plane *plane,
- struct drm_plane_state *old_state)
+ struct drm_atomic_state *state)
{
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
+ plane);
u32 reg;
s64 gpu_addr = 0;
u32 line_l;
struct hibmc_drm_private *priv = to_hibmc_drm_private(plane->dev);
struct drm_gem_vram_object *gbo;
- if (!state->fb)
+ if (!new_state->fb)
return;
- gbo = drm_gem_vram_of_gem(state->fb->obj[0]);
+ gbo = drm_gem_vram_of_gem(new_state->fb->obj[0]);
gpu_addr = drm_gem_vram_offset(gbo);
if (WARN_ON_ONCE(gpu_addr < 0))
@@ -117,9 +120,9 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane,
writel(gpu_addr, priv->mmio + HIBMC_CRT_FB_ADDRESS);
- reg = state->fb->width * (state->fb->format->cpp[0]);
+ reg = new_state->fb->width * (new_state->fb->format->cpp[0]);
- line_l = state->fb->pitches[0];
+ line_l = new_state->fb->pitches[0];
writel(HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_WIDTH, reg) |
HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_OFFS, line_l),
priv->mmio + HIBMC_CRT_FB_WIDTH);
@@ -128,7 +131,7 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane,
reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
reg &= ~HIBMC_CRT_DISP_CTL_FORMAT_MASK;
reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_FORMAT,
- state->fb->format->cpp[0] * 8 / 16);
+ new_state->fb->format->cpp[0] * 8 / 16);
writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL);
}