diff options
| author | Jordan Niethe <jniethe5@gmail.com> | 2021-07-29 14:13:17 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-08-26 21:21:06 +1000 |
| commit | e42edf9b9d126bb1c743f2e7984877ba27f09fe7 (patch) | |
| tree | 90dc8432d15c6ed88f7e2e3b621ec8499ccc1f03 /tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c | |
| parent | c95278a0534449efc64ac8169382bce217963be2 (diff) | |
selftests: Skip TM tests on synthetic TM implementations
Transactional Memory was removed from the architecture in ISA v3.1. For
threads running in P8/P9 compatibility mode on P10 a synthetic TM
implementation is provided. In this implementation, tbegin. always sets
cr0 eq meaning the abort handler is always called. This is not an issue
as users of TM are expected to have a fallback non transactional way to
make forward progress in the abort handler. The TEXASR indicates if a
transaction failure is due to a synthetic implementation.
Some of the TM self tests need a non-degenerate TM implementation for
their testing to be meaningful so check for a synthetic implementation
and skip the test if so.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210729041317.366612-2-jniethe5@gmail.com
Diffstat (limited to 'tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c')
| -rw-r--r-- | tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c b/tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c index 8e25e2072ecd..9bd869245bad 100644 --- a/tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c +++ b/tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c @@ -153,6 +153,7 @@ static int tm_signal_context_chk() pid_t pid = getpid(); SKIP_IF(!have_htm()); + SKIP_IF(htm_is_synthetic()); act.sa_sigaction = signal_usr1; sigemptyset(&act.sa_mask); |