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| author | Kan Liang <kan.liang@linux.intel.com> | 2021-06-18 08:12:54 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2021-06-23 18:30:55 +0200 |
| commit | 1d5c7880992a06679585e7e568cc679c0c5fd4f2 (patch) | |
| tree | 96c6af4ccdf804d9a0615e5440ab6870d752dbac /fs/binfmt_em86.c | |
| parent | d18216fafecf2a3a7c2b97086892269d6ab3cd5e (diff) | |
perf/x86/intel: Fix instructions:ppp support in Sapphire Rapids
Perf errors out when sampling instructions:ppp.
$ perf record -e instructions:ppp -- true
Error:
The sys_perf_event_open() syscall returned with 22 (Invalid argument)
for event (instructions:ppp).
The instruction PDIR is only available on the fixed counter 0. The event
constraint has been updated to fixed0_constraint in
icl_get_event_constraints(). The Sapphire Rapids codes unconditionally
error out for the event which is not available on the GP counter 0.
Make the instructions:ppp an exception.
Fixes: 61b985e3e775 ("perf/x86/intel: Add perf core PMU support for Sapphire Rapids")
Reported-by: Yasin, Ahmad <ahmad.yasin@intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1624029174-122219-4-git-send-email-kan.liang@linux.intel.com
Diffstat (limited to 'fs/binfmt_em86.c')
0 files changed, 0 insertions, 0 deletions