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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-01 18:24:52 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-01 18:24:52 -0800
commita223c522805d4e9de4903fdd9c14588e558b2c16 (patch)
tree5a9f2509feb5a2993be9c93150b5e5d9ebeb3328 /drivers
parentcfa5555cabbc89e31b5866d0473beddc147bae9b (diff)
parent844990daa2e69a4258049ba9c2bae1180657dac3 (diff)
Merge branch 'i2c-embedded/for-3.3' of git://git.pengutronix.de/git/wsa/linux-2.6
i2c bugfix from Wolfram Sang: "This patch fixes a wrong assumption in the mxs-i2c-driver about a command queue being done. Without it, we have seen races when the bus was under load." * 'i2c-embedded/for-3.3' of git://git.pengutronix.de/git/wsa/linux-2.6: i2c: mxs: only flag completion when queue is completely done
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/busses/i2c-mxs.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 7e78f7c87857..3d471d56bf15 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -72,6 +72,7 @@
#define MXS_I2C_QUEUESTAT (0x70)
#define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
+#define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F
#define MXS_I2C_QUEUECMD (0x80)
@@ -219,14 +220,14 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
int ret;
int flags;
- init_completion(&i2c->cmd_complete);
-
dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
msg->addr, msg->len, msg->flags, stop);
if (msg->len == 0)
return -EINVAL;
+ init_completion(&i2c->cmd_complete);
+
flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
if (msg->flags & I2C_M_RD)
@@ -286,6 +287,7 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
{
struct mxs_i2c_dev *i2c = dev_id;
u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
+ bool is_last_cmd;
if (!stat)
return IRQ_NONE;
@@ -300,9 +302,14 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
else
i2c->cmd_err = 0;
- complete(&i2c->cmd_complete);
+ is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) &
+ MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;
+
+ if (is_last_cmd || i2c->cmd_err)
+ complete(&i2c->cmd_complete);
writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
+
return IRQ_HANDLED;
}