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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 18:54:56 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 18:54:56 -0800 |
| commit | 36c289e72a63c3a4fbb14f84e220a2a75a5bf656 (patch) | |
| tree | 0c9d747adafad5f75f9d3828fcf0c53da705b19b /drivers | |
| parent | 669c0f762ed19bd9ec128ebc97ae8641b6e1a4a3 (diff) | |
| parent | fe6daab1ee9dfe7f89974ee6c486cccb0f18a61d (diff) | |
Merge branch 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 timer updates from Thomas Gleixner:
"A small set of updates for x86 specific timers:
- Mark TSC invariant on a subset of Centaur CPUs
- Allow TSC calibration without PIT on mobile platforms which lack
legacy devices"
* 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/centaur: Mark TSC invariant
x86/tsc: Introduce early tsc clocksource
x86/time: Unconditionally register legacy timer interrupt
x86/tsc: Allow TSC calibration without PIT
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/acpi/processor_idle.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index d50a7b6ccddd..5f0071c7e2e1 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -207,6 +207,7 @@ static void tsc_check_state(int state) switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: case X86_VENDOR_INTEL: + case X86_VENDOR_CENTAUR: /* * AMD Fam10h TSC will tick in all * C/P/S0/S1 states when this bit is set. |