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authorVidya Sagar <vidyas@nvidia.com>2019-08-13 17:06:26 +0530
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-08-13 16:01:15 +0100
commit5dae15b21d36a2e6d7e92c6af39c33dea5c39cc3 (patch)
tree4e190f512aa4d1501f7331ad5e1f0416fbfa0e0b /drivers/phy/tegra/Makefile
parent813c6fbcb7756e96f96c5931d8830970ff50e3b0 (diff)
phy: tegra: Add PCIe PIPE2UPHY support
Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module. For each PCIe lane of a controller, there is a P2U unit instantiated at hardware level. This driver provides support for the programming required for each P2U that is going to be used for a PCIe controller. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/phy/tegra/Makefile')
-rw-r--r--drivers/phy/tegra/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/phy/tegra/Makefile b/drivers/phy/tegra/Makefile
index 64ccaeacb631..320dd389f34d 100644
--- a/drivers/phy/tegra/Makefile
+++ b/drivers/phy/tegra/Makefile
@@ -6,3 +6,4 @@ phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_124_SOC) += xusb-tegra124.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_132_SOC) += xusb-tegra124.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_210_SOC) += xusb-tegra210.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_186_SOC) += xusb-tegra186.o
+obj-$(CONFIG_PHY_TEGRA194_P2U) += phy-tegra194-p2u.o