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authorYannick Fertre <yannick.fertre@foss.st.com>2022-06-03 15:44:59 +0200
committerPhilippe Cornu <philippe.cornu@foss.st.com>2022-06-27 16:01:17 +0200
commit62467fccb73fb700d23c35fcac71cb0cf0662ddb (patch)
treeef807bd0b67f3b0bf9a05a07d449a0bd5bdba2c6 /drivers/gpu/drm/stm/ltdc.c
parent44b4e7282249903a3f9689da3fd26fc9cf7c5d2c (diff)
drm/stm: ltdc: add support of the dynamic z-order
Zpos property is immutable for all hardware versions except the last version (0x40100) which support the blending order feature (dynamic z-order). Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220603134459.593379-1-yannick.fertre@foss.st.com
Diffstat (limited to 'drivers/gpu/drm/stm/ltdc.c')
-rw-r--r--drivers/gpu/drm/stm/ltdc.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 18149ca1519b..359414c10621 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -197,6 +197,7 @@
#define LXBFCR_BF2 GENMASK(2, 0) /* Blending Factor 2 */
#define LXBFCR_BF1 GENMASK(10, 8) /* Blending Factor 1 */
+#define LXBFCR_BOR GENMASK(18, 16) /* Blending ORder */
#define LXCFBLR_CFBLL GENMASK(12, 0) /* Color Frame Buffer Line Length */
#define LXCFBLR_CFBP GENMASK(28, 16) /* Color Frame Buffer Pitch in bytes */
@@ -1312,7 +1313,14 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
plane->type != DRM_PLANE_TYPE_PRIMARY)
val = BF1_PAXCA | BF2_1PAXCA;
- regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs, LXBFCR_BF2 | LXBFCR_BF1, val);
+ if (ldev->caps.dynamic_zorder) {
+ val |= (newstate->normalized_zpos << 16);
+ regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,
+ LXBFCR_BF2 | LXBFCR_BF1 | LXBFCR_BOR, val);
+ } else {
+ regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,
+ LXBFCR_BF2 | LXBFCR_BF1, val);
+ }
/* Configures the frame buffer line number */
line_number = y1 - y0 + 1;
@@ -1581,7 +1589,10 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
return -EINVAL;
}
- drm_plane_create_zpos_immutable_property(primary, 0);
+ if (ldev->caps.dynamic_zorder)
+ drm_plane_create_zpos_property(primary, 0, 0, ldev->caps.nb_layers - 1);
+ else
+ drm_plane_create_zpos_immutable_property(primary, 0);
/* Init CRTC according to its hardware features */
if (ldev->caps.crc)
@@ -1610,7 +1621,10 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
DRM_ERROR("Can not create overlay plane %d\n", i);
goto cleanup;
}
- drm_plane_create_zpos_immutable_property(overlay, i);
+ if (ldev->caps.dynamic_zorder)
+ drm_plane_create_zpos_property(overlay, i, 0, ldev->caps.nb_layers - 1);
+ else
+ drm_plane_create_zpos_immutable_property(overlay, i);
}
return 0;
@@ -1740,6 +1754,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
ldev->caps.ycbcr_output = false;
ldev->caps.plane_reg_shadow = false;
ldev->caps.crc = false;
+ ldev->caps.dynamic_zorder = false;
break;
case HWVER_20101:
ldev->caps.layer_ofs = LAY_OFS_0;
@@ -1755,6 +1770,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
ldev->caps.ycbcr_output = false;
ldev->caps.plane_reg_shadow = false;
ldev->caps.crc = false;
+ ldev->caps.dynamic_zorder = false;
break;
case HWVER_40100:
ldev->caps.layer_ofs = LAY_OFS_1;
@@ -1770,6 +1786,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
ldev->caps.ycbcr_output = true;
ldev->caps.plane_reg_shadow = true;
ldev->caps.crc = true;
+ ldev->caps.dynamic_zorder = true;
break;
default:
return -ENODEV;