diff options
| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2017-08-14 15:46:17 -0700 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2017-10-11 23:48:27 -0500 |
| commit | 4e659dbe2d02a56ca0df25c77e099760252a329c (patch) | |
| tree | d41bd3ca1e79a6c1b19a637ea9f34030ae7deb91 /drivers/firmware/qcom_scm-64.c | |
| parent | e691b48dcc7553b423bcbc7ddcd9f51698d093b1 (diff) | |
firmware: qcom: scm: Expose secure IO service
The secure IO service provides operations for reading and writing secure
memory from non-secure mode, expose this API through SCM.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'drivers/firmware/qcom_scm-64.c')
| -rw-r--r-- | drivers/firmware/qcom_scm-64.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 6e6d561708e2..bf50fb59852e 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -439,3 +439,34 @@ int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr, u32 size, return ret; } + +int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr, + unsigned int *val) +{ + struct qcom_scm_desc desc = {0}; + struct arm_smccc_res res; + int ret; + + desc.args[0] = addr; + desc.arginfo = QCOM_SCM_ARGS(1); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_IO, QCOM_SCM_IO_READ, + &desc, &res); + if (ret >= 0) + *val = res.a1; + + return ret < 0 ? ret : 0; +} + +int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val) +{ + struct qcom_scm_desc desc = {0}; + struct arm_smccc_res res; + + desc.args[0] = addr; + desc.args[1] = val; + desc.arginfo = QCOM_SCM_ARGS(2); + + return qcom_scm_call(dev, QCOM_SCM_SVC_IO, QCOM_SCM_IO_WRITE, + &desc, &res); +} |