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authorHeiko Stuebner <heiko@sntech.de>2022-05-11 21:29:10 +0200
committerPalmer Dabbelt <palmer@rivosinc.com>2022-05-11 21:36:31 -0700
commite64f737ad70fee4a3c57d147fc511e5d5014b5dd (patch)
treea7b6a69b39c3238d195371cd24dcbee291db1421 /arch/riscv/kernel/smpboot.c
parent3123109284176b1532874591f7c81f3837bbdc17 (diff)
riscv: integrate alternatives better into the main architecture
Right now the alternatives need to be explicitly enabled and erratas are limited to SiFive ones. We want to use alternatives not only for patching soc erratas, but in the future also for handling different behaviour depending on the existence of future extensions. So move the core alternatives over to the kernel subdirectory and move the CONFIG_RISCV_ALTERNATIVE to be a hidden symbol which we expect relevant erratas and extensions to just select if needed. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Link: https://lore.kernel.org/r/20220511192921.2223629-2-heiko@sntech.de Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/kernel/smpboot.c')
-rw-r--r--arch/riscv/kernel/smpboot.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 622f226454d5..a6d13dca1403 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -41,9 +41,7 @@ static DECLARE_COMPLETION(cpu_running);
void __init smp_prepare_boot_cpu(void)
{
init_cpu_topology();
-#ifdef CONFIG_RISCV_ERRATA_ALTERNATIVE
apply_boot_alternatives();
-#endif
}
void __init smp_prepare_cpus(unsigned int max_cpus)