diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-08-06 10:54:07 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-08-06 10:54:07 -0700 |
commit | b62e419707ce082845c34161fe684d0c743b7953 (patch) | |
tree | 9ecad0aef86a55ca33a0a355c627ff2b4acc4756 /arch/mips/pci | |
parent | 40ddad19131999161c39564815b8df2faff0fc7c (diff) | |
parent | 6c86a3029ce3b44597526909f2e39a77a497f640 (diff) |
Merge tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS upates from Thomas Bogendoerfer:
- improvements for Loongson64
- extended ingenic support
- removal of not maintained paravirt system type
- cleanups and fixes
* tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (81 commits)
MIPS: SGI-IP27: always enable NUMA in Kconfig
MAINTAINERS: Update KVM/MIPS maintainers
MIPS: Update default config file for Loongson-3
MIPS: KVM: Add kvm guest support for Loongson-3
dt-bindings: mips: Document Loongson kvm guest board
MIPS: handle Loongson-specific GSExc exception
MIPS: add definitions for Loongson-specific CP0.Diag1 register
MIPS: only register FTLBPar exception handler for supported models
MIPS: ingenic: Hardcode mem size for qi,lb60 board
MIPS: DTS: ingenic/qi,lb60: Add model and memory node
MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB
MIPS: head.S: Init fw_passed_dtb to builtin DTB
of: address: Fix parser address/size cells initialization
of_address: Guard of_bus_pci_get_flags with CONFIG_PCI
MIPS: DTS: Fix number of msi vectors for Loongson64G
MIPS: Loongson64: Add ISA node for LS7A PCH
MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH
MIPS: Loongson64: Enlarge IO_SPACE_LIMIT
MIPS: Loongson64: Process ISA Node in DeviceTree
of_address: Add bus type match for pci ranges parser
...
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/pci/pci-virtio-guest.c | 131 |
2 files changed, 0 insertions, 132 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 0f68d6849978..f3eecc065e5c 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -23,7 +23,6 @@ obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o -obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o # # These are still pretty much in the old state, watch, go blind. diff --git a/arch/mips/pci/pci-virtio-guest.c b/arch/mips/pci/pci-virtio-guest.c deleted file mode 100644 index 40a078bc4617..000000000000 --- a/arch/mips/pci/pci-virtio-guest.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2013 Cavium, Inc. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/pci.h> - -#include <uapi/asm/bitfield.h> -#include <asm/byteorder.h> -#include <asm/io.h> - -#define PCI_CONFIG_ADDRESS 0xcf8 -#define PCI_CONFIG_DATA 0xcfc - -union pci_config_address { - struct { - __BITFIELD_FIELD(unsigned enable_bit : 1, /* 31 */ - __BITFIELD_FIELD(unsigned reserved : 7, /* 30 .. 24 */ - __BITFIELD_FIELD(unsigned bus_number : 8, /* 23 .. 16 */ - __BITFIELD_FIELD(unsigned devfn_number : 8, /* 15 .. 8 */ - __BITFIELD_FIELD(unsigned register_number : 8, /* 7 .. 0 */ - ))))); - }; - u32 w; -}; - -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} - -int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - return ((pin + slot) % 4)+ MIPS_IRQ_PCIA; -} - -static void pci_virtio_guest_write_config_addr(struct pci_bus *bus, - unsigned int devfn, int reg) -{ - union pci_config_address pca = { .w = 0 }; - - pca.register_number = reg; - pca.devfn_number = devfn; - pca.bus_number = bus->number; - pca.enable_bit = 1; - - outl(pca.w, PCI_CONFIG_ADDRESS); -} - -static int pci_virtio_guest_write_config(struct pci_bus *bus, - unsigned int devfn, int reg, int size, u32 val) -{ - pci_virtio_guest_write_config_addr(bus, devfn, reg); - - switch (size) { - case 1: - outb(val, PCI_CONFIG_DATA + (reg & 3)); - break; - case 2: - outw(val, PCI_CONFIG_DATA + (reg & 2)); - break; - case 4: - outl(val, PCI_CONFIG_DATA); - break; - } - - return PCIBIOS_SUCCESSFUL; -} - -static int pci_virtio_guest_read_config(struct pci_bus *bus, unsigned int devfn, - int reg, int size, u32 *val) -{ - pci_virtio_guest_write_config_addr(bus, devfn, reg); - - switch (size) { - case 1: - *val = inb(PCI_CONFIG_DATA + (reg & 3)); - break; - case 2: - *val = inw(PCI_CONFIG_DATA + (reg & 2)); - break; - case 4: - *val = inl(PCI_CONFIG_DATA); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops pci_virtio_guest_ops = { - .read = pci_virtio_guest_read_config, - .write = pci_virtio_guest_write_config, -}; - -static struct resource pci_virtio_guest_mem_resource = { - .name = "Virtio MEM", - .flags = IORESOURCE_MEM, - .start = 0x10000000, - .end = 0x1dffffff -}; - -static struct resource pci_virtio_guest_io_resource = { - .name = "Virtio IO", - .flags = IORESOURCE_IO, - .start = 0, - .end = 0xffff -}; - -static struct pci_controller pci_virtio_guest_controller = { - .pci_ops = &pci_virtio_guest_ops, - .mem_resource = &pci_virtio_guest_mem_resource, - .io_resource = &pci_virtio_guest_io_resource, -}; - -static int __init pci_virtio_guest_setup(void) -{ - pr_err("pci_virtio_guest_setup\n"); - - /* Virtio comes pre-assigned */ - pci_set_flags(PCI_PROBE_ONLY); - - pci_virtio_guest_controller.io_map_base = mips_io_port_base; - register_pci_controller(&pci_virtio_guest_controller); - return 0; -} -arch_initcall(pci_virtio_guest_setup); |