diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-04 11:56:53 +0100 |
---|---|---|
committer | John Crispin <blogic@openwrt.org> | 2013-02-17 01:25:35 +0100 |
commit | ad4ce92e919f7ad5561a2060deb58899de58b40c (patch) | |
tree | afdb8e34ae87d800095b901b21b822b31b7578da /arch/mips/pci | |
parent | fb167e891d5cc6386840dd092af2d461b38eb802 (diff) |
MIPS: ath79: move global PCI defines into a common header
The constants will be used by a subsequent patch.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4907/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/pci-ar71xx.c | 16 | ||||
-rw-r--r-- | arch/mips/pci/pci-ar724x.c | 8 |
2 files changed, 0 insertions, 24 deletions
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c index 0d8412fc5047..35ee23450d87 100644 --- a/arch/mips/pci/pci-ar71xx.c +++ b/arch/mips/pci/pci-ar71xx.c @@ -25,22 +25,6 @@ #include <asm/mach-ath79/ath79.h> #include <asm/mach-ath79/pci.h> -#define AR71XX_PCI_MEM_BASE 0x10000000 -#define AR71XX_PCI_MEM_SIZE 0x07000000 - -#define AR71XX_PCI_WIN0_OFFS 0x10000000 -#define AR71XX_PCI_WIN1_OFFS 0x11000000 -#define AR71XX_PCI_WIN2_OFFS 0x12000000 -#define AR71XX_PCI_WIN3_OFFS 0x13000000 -#define AR71XX_PCI_WIN4_OFFS 0x14000000 -#define AR71XX_PCI_WIN5_OFFS 0x15000000 -#define AR71XX_PCI_WIN6_OFFS 0x16000000 -#define AR71XX_PCI_WIN7_OFFS 0x07000000 - -#define AR71XX_PCI_CFG_BASE \ - (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000) -#define AR71XX_PCI_CFG_SIZE 0x100 - #define AR71XX_PCI_REG_CRP_AD_CBE 0x00 #define AR71XX_PCI_REG_CRP_WRDATA 0x04 #define AR71XX_PCI_REG_CRP_RDDATA 0x08 diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c index e7aca88ba0c0..b3f9d093c066 100644 --- a/arch/mips/pci/pci-ar724x.c +++ b/arch/mips/pci/pci-ar724x.c @@ -17,14 +17,6 @@ #include <asm/mach-ath79/ar71xx_regs.h> #include <asm/mach-ath79/pci.h> -#define AR724X_PCI_CFG_BASE 0x14000000 -#define AR724X_PCI_CFG_SIZE 0x1000 -#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000) -#define AR724X_PCI_CTRL_SIZE 0x100 - -#define AR724X_PCI_MEM_BASE 0x10000000 -#define AR724X_PCI_MEM_SIZE 0x04000000 - #define AR724X_PCI_REG_RESET 0x18 #define AR724X_PCI_REG_INT_STATUS 0x4c #define AR724X_PCI_REG_INT_MASK 0x50 |