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authorJiri Kosina <jkosina@suse.cz>2012-02-08 15:32:13 +0100
committerTony Luck <tony.luck@intel.com>2012-02-08 14:34:03 -0800
commit0f261ede311bfd718d84bdf50dd7fcee585e82c7 (patch)
tree5c43a00ebc85a68eac612205ca444de0e0229502 /arch/ia64/kernel
parent62aa2b537c6f5957afd98e29f96897419ed5ebab (diff)
[IA64] disable interrupts when exiting from ia64_mca_cmc_int_handler()
SAL specification mandates that ia64_mca_log_sal_error_record() gets called with interrupts enabled, and that's why ia64_mca_cmc_int_handler() is enabling them. It however forgets to re-disable them when exiting, which triggers WARN_ON() in generic IRQ handler. Disable the interrupts again before exiting. This is analogous to a3967685745 ("[IA64] disable interrupts at end of ia64_mca_cpe_int_handler()"). Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel')
-rw-r--r--arch/ia64/kernel/mca.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 84fb405eee87..8192009cb924 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1447,6 +1447,8 @@ out:
/* Get the CMC error record and log it */
ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);
+ local_irq_disable();
+
return IRQ_HANDLED;
}