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| author | Joel Stanley <joel@jms.id.au> | 2019-08-21 15:25:26 +0930 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2019-08-25 23:26:50 +0930 |
| commit | 9afe2c0a376f56f6bd78c7c5b9dec5e8f5d5a327 (patch) | |
| tree | a544e9789abe59c89a1df19cb122a0634d2c051f /arch/arm | |
| parent | e35d7db99430731dae04feeeb5cb6ec3e77cd5e5 (diff) | |
ARM: aspeed: Add ASPEED AST2600 architecture
The AST2600 is a Cortex A7 dual core CPU that uses the ARM GIC for
interrupts and ARM timer as a clocksource.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-aspeed/Kconfig | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig index 2979aa4daeea..56007b0b6120 100644 --- a/arch/arm/mach-aspeed/Kconfig +++ b/arch/arm/mach-aspeed/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only menuconfig ARCH_ASPEED bool "Aspeed BMC architectures" - depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 + depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7 select SRAM select WATCHDOG select ASPEED_WATCHDOG @@ -33,4 +33,16 @@ config MACH_ASPEED_G5 Say yes if you intend to run on an Aspeed ast2500 or similar fifth generation Aspeed BMCs. +config MACH_ASPEED_G6 + bool "Aspeed SoC 6th Generation" + depends on ARCH_MULTI_V7 + select CPU_V7 + select PINCTRL_ASPEED_G6 + select ARM_GIC + select HAVE_ARM_ARCH_TIMER + select HAVE_SMP + help + Say yes if you intend to run on an Aspeed ast2600 or similar + sixth generation Aspeed BMCs. + endif |