diff options
| author | Chintan Pandya <cpandya@codeaurora.org> | 2018-06-06 12:31:20 +0530 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-07-06 13:17:14 +0100 |
| commit | 05f2d2f83b5a02a15b6538017f29ee53a73088fb (patch) | |
| tree | e1217c55c4ebabbf5094fa0f7272854323badb0f /arch/arm64/include | |
| parent | f3551520416978111b422b7c177f6f1f6d75ff62 (diff) | |
arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable
Add an interface to invalidate intermediate page tables
from TLB for kernel.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/tlbflush.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index dfc61d73f740..a4a1901140ee 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -218,6 +218,13 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, dsb(ish); } +static inline void __flush_tlb_kernel_pgtable(unsigned long kaddr) +{ + unsigned long addr = __TLBI_VADDR(kaddr, 0); + + __tlbi(vaae1is, addr); + dsb(ish); +} #endif #endif |