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| author | Dave Airlie <airlied@redhat.com> | 2023-10-23 18:20:06 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2023-10-23 18:20:06 +1000 |
| commit | 7cd62eab9babd1fed9c497141650b31168f4f430 (patch) | |
| tree | 85ef2122ca0d88b2b598f45eb071fcd1f4faa3d2 /arch/arm64/Kconfig | |
| parent | 035fdc38c1f6ddce3544d8a489548e6cc4de508a (diff) | |
| parent | 05d3ef8bba77c1b5f98d941d8b2d4aeab8118ef1 (diff) | |
BackMerge tag 'v6.6-rc7' into drm-next
This is needed to add the msm pr which is based on a higher base.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'arch/arm64/Kconfig')
| -rw-r--r-- | arch/arm64/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index b10515c0200b..78f20e632712 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1037,6 +1037,19 @@ config ARM64_ERRATUM_2645198 If unsure, say Y. +config ARM64_ERRATUM_2966298 + bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load" + default y + help + This option adds the workaround for ARM Cortex-A520 erratum 2966298. + + On an affected Cortex-A520 core, a speculatively executed unprivileged + load might leak data from a privileged level via a cache side channel. + + Work around this problem by executing a TLBI before returning to EL0. + + If unsure, say Y. + config CAVIUM_ERRATUM_22375 bool "Cavium erratum 22375, 24313" default y |