diff options
| author | Fang Xiang <fangxiang3@xiaomi.com> | 2023-10-30 16:32:56 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2023-11-06 01:16:33 +0100 |
| commit | d3badb15613c14dd35d3495b1dde5c90fcd616dd (patch) | |
| tree | d90e3efeb72dbe2d77592012884e05bd2efb0b9e /Kbuild | |
| parent | 8999ad99f4cb19638d9ecb8017831f9a0ab8dc3d (diff) | |
irqchip/gic-v3-its: Flush ITS tables correctly in non-coherent GIC designs
In non-coherent GIC designs, the ITS tables must be flushed before writing
to the GITS_BASER<n> registers, otherwise the ITS could read dirty tables,
which results in unpredictable behavior.
Flush the tables right at the begin of its_setup_baser() to prevent that.
[ tglx: Massage changelog ]
Fixes: a8707f553884 ("irqchip/gic-v3: Add Rockchip 3588001 erratum workaround")
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Fang Xiang <fangxiang3@xiaomi.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231030083256.4345-1-fangxiang3@xiaomi.com
Diffstat (limited to 'Kbuild')
0 files changed, 0 insertions, 0 deletions