diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-05-22 10:41:14 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-05-22 10:41:14 -0700 |
| commit | a85629f435a4e724c414a6ae3e2f327272ab11af (patch) | |
| tree | cc6279ca271f27e55b11a12860cd14cbfc9f15a5 | |
| parent | 0bfbc914d9433d8ac2763a9ce99ce7721ee5c8e0 (diff) | |
| parent | 1482489b5196f4203576ae1dc2ba4ce3ada381c7 (diff) | |
Merge tag 'mfd-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Device Support:
- Add support for X-Powers AXP717 PMIC to AXP22X
- Add support for Rockchip RK816 PMIC to RK8XX
- Add support for TI TPS65224 PMIC to TPS6594
New Functionality:
- Add Power Off functionality to Rohm BD71828
- Allow I2C SMBus access in Renesas RSMU
Fix-ups:
- Device Tree binding adaptions/conversions/creation
- Shift Intel support over to MSI interrupts
- Generify adding platform data away from being ACPI specific
- Use device core supplied attribute to register sysfs entries
- Replace hand-rolled functionality with generic APIs
- Utilise centrally provided helpers and macros
- Clean-up error handling
- Remove superfluous/duplicated/unused sections
- Trivial; spelling, whitespace, coding-style adaptions
- More Maple Tree conversions"
* tag 'mfd-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (44 commits)
dt-bindings: mfd: Use full path to other schemas
mfd: rsmu: support I2C SMBus access
dt-bindings: mfd: Convert lp873x.txt to json-schema
dt-bindings: mfd: aspeed: Drop 'oneOf' for pinctrl node
dt-bindings: mfd: allwinner,sun6i-a31-prcm: Use hyphens in node names
mfd: ssbi: Remove unused field 'slave' from 'struct ssbi'
mfd: kempld: Remove custom DMI matching code
mfd: cs42l43: Update patching revision check
dt-bindings: mfd: qcom: pm8xxx: Add pm8901 compatible
mfd: timberdale: Remove redundant assignment to variable err
dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types
dt-bindings: mfd: syscon: Add ti,am62p-cpsw-mac-efuse compatible
dt-bindings: mfd: qcom,tcsr: Add compatible for SDX75
mfd: axp20x: Convert to use Maple Tree register cache
mfd: bd71828: Remove commented code lines
mfd: intel-m10-bmc: Change staging size to a variable
dt-bindings: mfd: Add ROHM BD71879
mfd: Tidy Kconfig dependency's parentheses
mfd: ocelot-spi: Use spi_sync_transfer()
dt-bindings: mfd: syscon: Add missing simple syscon compatibles
...
77 files changed, 2529 insertions, 732 deletions
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt deleted file mode 100644 index 77ca635765e1..000000000000 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt +++ /dev/null @@ -1,12 +0,0 @@ -Altera SOCFPGA SDRAM Controller - -Required properties: -- compatible : Should contain "altr,sdr-ctl" and "syscon". - syscon is required by the Altera SOCFPGA SDRAM EDAC. -- reg : Should contain 1 register range (address and length) - -Example: - sdr: sdr@ffc25000 { - compatible = "altr,sdr-ctl", "syscon"; - reg = <0xffc25000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/arm/apm/scu.txt b/Documentation/devicetree/bindings/arm/apm/scu.txt deleted file mode 100644 index b45be06625fd..000000000000 --- a/Documentation/devicetree/bindings/arm/apm/scu.txt +++ /dev/null @@ -1,17 +0,0 @@ -APM X-GENE SoC series SCU Registers - -This system clock unit contain various register that control block resets, -clock enable/disables, clock divisors and other deepsleep registers. - -Properties: - - compatible : should contain two values. First value must be: - - "apm,xgene-scu" - second value must be always "syscon". - - - reg : offset and length of the register set. - -Example : - scu: system-clk-controller@17000000 { - compatible = "apm,xgene-scu","syscon"; - reg = <0x0 0x17000000 0x0 0x400>; - }; diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt deleted file mode 100644 index 29fa93dad52b..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt +++ /dev/null @@ -1,32 +0,0 @@ -Power management ----------------- - -For power management (particularly DVFS and AVS), the North Bridge -Power Management component is needed: - -Required properties: -- compatible : should contain "marvell,armada-3700-nb-pm", "syscon"; -- reg : the register start and length for the North Bridge - Power Management - -Example: - -nb_pm: syscon@14000 { - compatible = "marvell,armada-3700-nb-pm", "syscon"; - reg = <0x14000 0x60>; -} - -AVS ---- - -For AVS an other component is needed: - -Required properties: -- compatible : should contain "marvell,armada-3700-avs", "syscon"; -- reg : the register start and length for the AVS - -Example: -avs: avs@11500 { - compatible = "marvell,armada-3700-avs", "syscon"; - reg = <0x11500 0x40>; -} diff --git a/Documentation/devicetree/bindings/input/twl4030-pwrbutton.txt b/Documentation/devicetree/bindings/input/twl4030-pwrbutton.txt deleted file mode 100644 index 6c201a2ba8ac..000000000000 --- a/Documentation/devicetree/bindings/input/twl4030-pwrbutton.txt +++ /dev/null @@ -1,21 +0,0 @@ -Texas Instruments TWL family (twl4030) pwrbutton module - -This module is part of the TWL4030. For more details about the whole -chip see Documentation/devicetree/bindings/mfd/ti,twl.yaml. - -This module provides a simple power button event via an Interrupt. - -Required properties: -- compatible: should be one of the following - - "ti,twl4030-pwrbutton": For controllers compatible with twl4030 -- interrupts: should be one of the following - - <8>: For controllers compatible with twl4030 - -Example: - -&twl { - twl_pwrbutton: pwrbutton { - compatible = "ti,twl4030-pwrbutton"; - interrupts = <8>; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml b/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml index 6811246c5771..9ae419748aa7 100644 --- a/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml +++ b/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml @@ -21,7 +21,7 @@ description: | regulators. allOf: - - $ref: ../input/input.yaml + - $ref: /schemas/input/input.yaml properties: compatible: @@ -57,7 +57,7 @@ properties: switchldo1: type: object - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml properties: regulator-name: true @@ -76,7 +76,7 @@ properties: "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2])$": type: object - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml properties: regulator-name: true diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml index 8789e3639ff7..ca0e9f1f2354 100644 --- a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml +++ b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml @@ -20,7 +20,7 @@ properties: maxItems: 1 patternProperties: - "^.*_(clk|rst)$": + "^.*-(clk|rst)$": type: object unevaluatedProperties: false @@ -171,7 +171,7 @@ examples: compatible = "allwinner,sun6i-a31-prcm"; reg = <0x01f01400 0x200>; - ar100: ar100_clk { + ar100: ar100-clk { compatible = "allwinner,sun6i-a31-ar100-clk"; #clock-cells = <0>; clocks = <&rtc 0>, <&osc24M>, @@ -180,7 +180,7 @@ examples: clock-output-names = "ar100"; }; - ahb0: ahb0_clk { + ahb0: ahb0-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <1>; @@ -189,14 +189,14 @@ examples: clock-output-names = "ahb0"; }; - apb0: apb0_clk { + apb0: apb0-clk { compatible = "allwinner,sun6i-a31-apb0-clk"; #clock-cells = <0>; clocks = <&ahb0>; clock-output-names = "apb0"; }; - apb0_gates: apb0_gates_clk { + apb0_gates: apb0-gates-clk { compatible = "allwinner,sun6i-a31-apb0-gates-clk"; #clock-cells = <1>; clocks = <&apb0>; @@ -206,14 +206,14 @@ examples: "apb0_i2c"; }; - ir_clk: ir_clk { + ir_clk: ir-clk { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; clocks = <&rtc 0>, <&osc24M>; clock-output-names = "ir"; }; - apb0_rst: apb0_rst { + apb0_rst: apb0-rst { compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml index 1689b986f441..86ee69c0f45b 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -47,10 +47,18 @@ patternProperties: type: object '^pinctrl(@[0-9a-f]+)?$': - oneOf: - - $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml - - $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml - - $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml + type: object + additionalProperties: true + properties: + compatible: + contains: + enum: + - aspeed,ast2400-pinctrl + - aspeed,ast2500-pinctrl + - aspeed,ast2600-pinctrl + + required: + - compatible '^interrupt-controller@[0-9a-f]+$': description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt diff --git a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml index b85819fbb07c..04910e4f88b2 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml @@ -34,19 +34,19 @@ properties: patternProperties: '^clock-controller@[a-f0-9]+$': - $ref: ../clock/brcm,iproc-clocks.yaml + $ref: /schemas/clock/brcm,iproc-clocks.yaml '^phy@[a-f0-9]+$': - $ref: ../phy/bcm-ns-usb2-phy.yaml + $ref: /schemas/phy/bcm-ns-usb2-phy.yaml '^pinctrl@[a-f0-9]+$': - $ref: ../pinctrl/brcm,ns-pinmux.yaml + $ref: /schemas/pinctrl/brcm,ns-pinmux.yaml '^syscon@[a-f0-9]+$': $ref: syscon.yaml '^thermal@[a-f0-9]+$': - $ref: ../thermal/brcm,ns-thermal.yaml + $ref: /schemas/thermal/brcm,ns-thermal.yaml additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/brcm,iproc-cdru.txt b/Documentation/devicetree/bindings/mfd/brcm,iproc-cdru.txt deleted file mode 100644 index 82f82e069563..000000000000 --- a/Documentation/devicetree/bindings/mfd/brcm,iproc-cdru.txt +++ /dev/null @@ -1,16 +0,0 @@ -Broadcom iProc Chip Device Resource Unit (CDRU) - -Various Broadcom iProc SoCs have a set of registers that provide various -chip specific device and resource configurations. This node allows access to -these CDRU registers via syscon. - -Required properties: -- compatible: should contain: - "brcm,sr-cdru", "syscon" for Stingray -- reg: base address and range of the CDRU registers - -Example: - cdru: syscon@6641d000 { - compatible = "brcm,sr-cdru", "syscon"; - reg = <0 0x6641d000 0 0x400>; - }; diff --git a/Documentation/devicetree/bindings/mfd/brcm,iproc-mhb.txt b/Documentation/devicetree/bindings/mfd/brcm,iproc-mhb.txt deleted file mode 100644 index 4421e9771b8a..000000000000 --- a/Documentation/devicetree/bindings/mfd/brcm,iproc-mhb.txt +++ /dev/null @@ -1,18 +0,0 @@ -Broadcom iProc Multi Host Bridge (MHB) - -Certain Broadcom iProc SoCs have a multi host bridge (MHB) block that controls -the connection and configuration of 1) internal PCIe serdes; 2) PCIe endpoint -interface; 3) access to the Nitro (network processing) engine - -This node allows access to these MHB registers via syscon. - -Required properties: -- compatible: should contain: - "brcm,sr-mhb", "syscon" for Stingray -- reg: base address and range of the MHB registers - -Example: - mhb: syscon@60401000 { - compatible = "brcm,sr-mhb", "syscon"; - reg = <0 0x60401000 0 0x38c>; - }; diff --git a/Documentation/devicetree/bindings/mfd/brcm,misc.yaml b/Documentation/devicetree/bindings/mfd/brcm,misc.yaml index cff7d772a7db..abe24526f3d7 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,misc.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,misc.yaml @@ -33,7 +33,7 @@ properties: patternProperties: '^reset-controller@[a-f0-9]+$': - $ref: ../reset/brcm,bcm4908-misc-pcie-reset.yaml + $ref: /schemas/reset/brcm,bcm4908-misc-pcie-reset.yaml additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml index 3b3beab9db3f..2451d0f0e4e3 100644 --- a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml @@ -36,7 +36,7 @@ properties: clock-controller: # Child node type: object - $ref: ../clock/canaan,k210-clk.yaml + $ref: /schemas/clock/canaan,k210-clk.yaml description: Clock controller for the SoC clocks. This child node definition should follow the bindings specified in @@ -45,7 +45,7 @@ properties: reset-controller: # Child node type: object - $ref: ../reset/canaan,k210-rst.yaml + $ref: /schemas/reset/canaan,k210-rst.yaml description: Reset controller for the SoC. This child node definition should follow the bindings specified in @@ -54,7 +54,7 @@ properties: syscon-reboot: # Child node type: object - $ref: ../power/reset/syscon-reboot.yaml + $ref: /schemas/power/reset/syscon-reboot.yaml description: Reboot method for the SoC. This child node definition should follow the bindings specified in diff --git a/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml index f6967c1f6235..d3b79140cce2 100644 --- a/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml +++ b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml @@ -42,10 +42,10 @@ required: patternProperties: "^gpio(@[0-9a-f]+)?$": - $ref: ../gpio/delta,tn48m-gpio.yaml + $ref: /schemas/gpio/delta,tn48m-gpio.yaml "^reset-controller?$": - $ref: ../reset/delta,tn48m-reset.yaml + $ref: /schemas/reset/delta,tn48m-reset.yaml additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/iqs62x.yaml b/Documentation/devicetree/bindings/mfd/iqs62x.yaml index f438c2374966..e79ce447a800 100644 --- a/Documentation/devicetree/bindings/mfd/iqs62x.yaml +++ b/Documentation/devicetree/bindings/mfd/iqs62x.yaml @@ -38,10 +38,10 @@ properties: device name with ".bin" as the extension (e.g. iqs620a.bin for IQS620A). keys: - $ref: ../input/iqs62x-keys.yaml + $ref: /schemas/input/iqs62x-keys.yaml pwm: - $ref: ../pwm/iqs620a-pwm.yaml + $ref: /schemas/pwm/iqs620a-pwm.yaml required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml index eb3b43547cb6..37207a97e06c 100644 --- a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml +++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml @@ -39,19 +39,19 @@ properties: patternProperties: "^gpio(@[0-9a-f]+)?$": - $ref: ../gpio/kontron,sl28cpld-gpio.yaml + $ref: /schemas/gpio/kontron,sl28cpld-gpio.yaml "^hwmon(@[0-9a-f]+)?$": - $ref: ../hwmon/kontron,sl28cpld-hwmon.yaml + $ref: /schemas/hwmon/kontron,sl28cpld-hwmon.yaml "^interrupt-controller(@[0-9a-f]+)?$": - $ref: ../interrupt-controller/kontron,sl28cpld-intc.yaml + $ref: /schemas/interrupt-controller/kontron,sl28cpld-intc.yaml "^pwm(@[0-9a-f]+)?$": - $ref: ../pwm/kontron,sl28cpld-pwm.yaml + $ref: /schemas/pwm/kontron,sl28cpld-pwm.yaml "^watchdog(@[0-9a-f]+)?$": - $ref: ../watchdog/kontron,sl28cpld-wdt.yaml + $ref: /schemas/watchdog/kontron,sl28cpld-wdt.yaml required: - "#address-cells" diff --git a/Documentation/devicetree/bindings/mfd/lp873x.txt b/Documentation/devicetree/bindings/mfd/lp873x.txt deleted file mode 100644 index ae9cf39bd101..000000000000 --- a/Documentation/devicetree/bindings/mfd/lp873x.txt +++ /dev/null @@ -1,67 +0,0 @@ -TI LP873X PMIC MFD driver - -Required properties: - - compatible: "ti,lp8732", "ti,lp8733" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx can be - buck0, buck1, ldo0 or ldo1. - - regulators: List of child nodes that specify the regulator - initialization data. -Example: - -pmic: lp8733@60 { - compatible = "ti,lp8733"; - reg = <0x60>; - gpio-controller; - #gpio-cells = <2>; - - buck0-in-supply = <&vsys_3v3>; - buck1-in-supply = <&vsys_3v3>; - ldo0-in-supply = <&vsys_3v3>; - ldo1-in-supply = <&vsys_3v3>; - - regulators { - lp8733_buck0: buck0 { - regulator-name = "lp8733-buck0"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-min-microamp = <1500000>; - regulator-max-microamp = <4000000>; - regulator-ramp-delay = <10000>; - regulator-always-on; - regulator-boot-on; - }; - - lp8733_buck1: buck1 { - regulator-name = "lp8733-buck1"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-min-microamp = <1500000>; - regulator-max-microamp = <4000000>; - regulator-ramp-delay = <10000>; - regulator-boot-on; - regulator-always-on; - }; - - lp8733_ldo0: ldo0 { - regulator-name = "lp8733-ldo0"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - lp8733_ldo1: ldo1 { - regulator-name = "lp8733-ldo1"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/max77650.yaml b/Documentation/devicetree/bindings/mfd/max77650.yaml index 4181174fcf58..d93d84171a31 100644 --- a/Documentation/devicetree/bindings/mfd/max77650.yaml +++ b/Documentation/devicetree/bindings/mfd/max77650.yaml @@ -53,16 +53,16 @@ properties: Single string containing the name of the GPIO line. regulators: - $ref: ../regulator/max77650-regulator.yaml + $ref: /schemas/regulator/max77650-regulator.yaml charger: - $ref: ../power/supply/max77650-charger.yaml + $ref: /schemas/power/supply/max77650-charger.yaml leds: - $ref: ../leds/leds-max77650.yaml + $ref: /schemas/leds/leds-max77650.yaml onkey: - $ref: ../input/max77650-onkey.yaml + $ref: /schemas/input/max77650-onkey.yaml required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml index d027aabe453b..c13d51e462ba 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml @@ -35,7 +35,7 @@ properties: maxItems: 1 voltage-regulators: - $ref: ../regulator/maxim,max77686.yaml + $ref: /schemas/regulator/maxim,max77686.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml index 6a6f222b868f..cce273ba4034 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml @@ -81,7 +81,7 @@ properties: - pwms regulators: - $ref: ../regulator/maxim,max77693.yaml + $ref: /schemas/regulator/maxim,max77693.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 8103fb61a16c..b7f01cbb8fff 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -160,6 +160,10 @@ patternProperties: type: object $ref: /schemas/nvmem/qcom,spmi-sdam.yaml# + "^pbs@[0-9a-f]+$": + type: object + $ref: /schemas/soc/qcom/qcom,pbs.yaml# + "phy@[0-9a-f]+$": type: object $ref: /schemas/phy/qcom,snps-eusb2-repeater.yaml# diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index b97d77015335..c6bd14ec5aa0 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -28,6 +28,7 @@ properties: - qcom,sdm845-tcsr - qcom,sdx55-tcsr - qcom,sdx65-tcsr + - qcom,sdx75-tcsr - qcom,sm4450-tcsr - qcom,sm6115-tcsr - qcom,sm8150-tcsr diff --git a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml index 7fe3875a5996..63e18d6a9c21 100644 --- a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml @@ -19,6 +19,7 @@ properties: - enum: - qcom,pm8058 - qcom,pm8821 + - qcom,pm8901 - qcom,pm8921 - items: - enum: diff --git a/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml index 4762eb1439ce..e3ccba177b21 100644 --- a/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml +++ b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml @@ -37,10 +37,10 @@ properties: maxItems: 1 regulators: - $ref: ../regulator/richtek,rt4831-regulator.yaml + $ref: /schemas/regulator/richtek,rt4831-regulator.yaml backlight: - $ref: ../leds/backlight/richtek,rt4831-backlight.yaml + $ref: /schemas/leds/backlight/richtek,rt4831-backlight.yaml required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/ricoh,rn5t618.yaml b/Documentation/devicetree/bindings/mfd/ricoh,rn5t618.yaml index 032a7fb0b4a7..e3d64307b531 100644 --- a/Documentation/devicetree/bindings/mfd/ricoh,rn5t618.yaml +++ b/Documentation/devicetree/bindings/mfd/ricoh,rn5t618.yaml @@ -28,7 +28,7 @@ allOf: regulators: patternProperties: "^(DCDC[1-4]|LDO[1-5]|LDORTC[12])$": - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml additionalProperties: false - if: properties: @@ -40,7 +40,7 @@ allOf: regulators: patternProperties: "^(DCDC[1-3]|LDO[1-5]|LDORTC[12])$": - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml additionalProperties: false - if: properties: @@ -52,7 +52,7 @@ allOf: regulators: patternProperties: "^(DCDC[1-5]|LDO[1-9]|LDO10|LDORTC[12])$": - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml additionalProperties: false properties: diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml index 44f8188360dd..da2391530c16 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml @@ -82,7 +82,7 @@ properties: patternProperties: "^(DCDC_REG[1-4]|LDO_REG[1-3])$": type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml index d2ac6fbd5ce6..50dfffac8fbf 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml @@ -109,7 +109,7 @@ properties: patternProperties: "^(DCDC_REG[1-4]|LDO_REG[1-8]|SWITCH_REG[1-2])$": type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml new file mode 100644 index 000000000000..0676890f101e --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml @@ -0,0 +1,274 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rockchip,rk816.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RK816 Power Management Integrated Circuit + +maintainers: + - Chris Zhong <zyw@rock-chips.com> + - Zhang Qing <zhangqing@rock-chips.com> + +description: + Rockchip RK816 series PMIC. This device consists of an i2c controlled MFD + that includes regulators, a RTC, a GPIO controller, a power button, and a + battery charger manager with fuel gauge. + +properties: + compatible: + enum: + - rockchip,rk816 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#clock-cells': + description: + See <dt-bindings/clock/rockchip,rk808.h> for clock IDs. + const: 1 + + clock-output-names: + maxItems: 2 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + system-power-controller: + type: boolean + description: + Telling whether or not this PMIC is controlling the system power. + + wakeup-source: + type: boolean + + vcc1-supply: + description: + The input supply for dcdc1. + + vcc2-supply: + description: + The input supply for dcdc2. + + vcc3-supply: + description: + The input supply for dcdc3. + + vcc4-supply: + description: + The input supply for dcdc4. + + vcc5-supply: + description: + The input supply for ldo1, ldo2, and ldo3. + + vcc6-supply: + description: + The input supply for ldo4, ldo5, and ldo6. + + vcc7-supply: + description: + The input supply for boost. + + vcc8-supply: + description: + The input supply for otg-switch. + + regulators: + type: object + patternProperties: + '^(boost|dcdc[1-4]|ldo[1-6]|otg-switch)$': + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + additionalProperties: false + +patternProperties: + '-pins$': + type: object + additionalProperties: false + $ref: /schemas/pinctrl/pinmux-node.yaml + + properties: + function: + enum: [gpio, thermistor] + + pins: + $ref: /schemas/types.yaml#/definitions/string + const: gpio0 + +required: + - compatible + - reg + - interrupts + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/pinctrl/rockchip.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rk816: pmic@1a { + compatible = "rockchip,rk816"; + reg = <0x1a>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; + clock-output-names = "xin32k", "rk816-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + gpio-controller; + system-power-controller; + wakeup-source; + #clock-cells = <1>; + #gpio-cells = <2>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc33_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_cpu: dcdc1 { + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic: dcdc2 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1250000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: dcdc3 { + regulator-name = "vcc_ddr"; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc33_io: dcdc4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_io"; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_pmu: ldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_pmu"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_tp: ldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_tp"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: ldo3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc18_lcd: ldo4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_sd: ldo5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd10_lcd: ldo6 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + + rk816_gpio_pins: gpio-pins { + function = "gpio"; + pins = "gpio0"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml index 92b1592e8942..8c2fd0fabb92 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml @@ -91,7 +91,7 @@ properties: "^(LDO_REG[1-9]|DCDC_REG[1-4]|BOOST|OTG_SWITCH)$": type: object unevaluatedProperties: false - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false clocks: diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml index fd4b9de364aa..90d944c27ba1 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml @@ -101,7 +101,7 @@ properties: patternProperties: "^(DCDC_REG[1-4]|DCDC_BOOST|LDO_REG[1-9]|SWITCH_REG|HDMI_SWITCH|OTG_SWITCH)$": type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml index 05747e012516..bb81307dc11b 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml @@ -61,7 +61,7 @@ properties: default: 30000000 regulators: - $ref: ../regulator/rohm,bd71815-regulator.yaml + $ref: /schemas/regulator/rohm,bd71815-regulator.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml index 11089aa89ec6..fa17686a64f7 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml @@ -17,7 +17,12 @@ description: | properties: compatible: - const: rohm,bd71828 + oneOf: + - const: rohm,bd71828 + + - items: + - const: rohm,bd71879 + - const: rohm,bd71828 reg: description: @@ -60,12 +65,12 @@ properties: here in Ohms. regulators: - $ref: ../regulator/rohm,bd71828-regulator.yaml + $ref: /schemas/regulator/rohm,bd71828-regulator.yaml description: List of child nodes that specify the regulators. leds: - $ref: ../leds/rohm,bd71828-leds.yaml + $ref: /schemas/leds/rohm,bd71828-leds.yaml gpio-reserved-ranges: description: | @@ -73,6 +78,8 @@ properties: used to mark the pins which should not be configured for GPIO. Please see the ../gpio/gpio.txt for more information. + system-power-controller: true + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml index 7aa343f58cb6..08f958dc700d 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml @@ -109,7 +109,7 @@ properties: - 14000 regulators: - $ref: ../regulator/rohm,bd71837-regulator.yaml + $ref: /schemas/regulator/rohm,bd71837-regulator.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd9571mwv.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd9571mwv.yaml index 89f9efee465b..534cf03f36bb 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd9571mwv.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd9571mwv.yaml @@ -67,7 +67,7 @@ properties: patternProperties: "^(vd09|vd18|vd25|vd33|dvfs)$": type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# properties: regulator-name: diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml index b7b323b1a4f2..70fd9b5e4c3f 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml @@ -71,7 +71,7 @@ properties: # (HW) minimum for max timeout is 4ms, maximum 4416 ms. regulators: - $ref: ../regulator/rohm,bd9576-regulator.yaml + $ref: /schemas/regulator/rohm,bd9576-regulator.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml index 055dfc337c2f..ad92eb6fcd3a 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml @@ -27,7 +27,7 @@ properties: maxItems: 1 regulators: - $ref: ../regulator/samsung,s2mpa01.yaml + $ref: /schemas/regulator/samsung,s2mpa01.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml index 5ff6546c72b7..bc8b5940b1c5 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml @@ -27,7 +27,7 @@ properties: - samsung,s2mpu02-pmic clocks: - $ref: ../clock/samsung,s2mps11.yaml + $ref: /schemas/clock/samsung,s2mps11.yaml description: Child node describing clock provider. @@ -75,7 +75,7 @@ allOf: then: properties: regulators: - $ref: ../regulator/samsung,s2mps11.yaml + $ref: /schemas/regulator/samsung,s2mps11.yaml samsung,s2mps11-wrstbi-ground: false - if: @@ -86,7 +86,7 @@ allOf: then: properties: regulators: - $ref: ../regulator/samsung,s2mps13.yaml + $ref: /schemas/regulator/samsung,s2mps13.yaml samsung,s2mps11-acokb-ground: false - if: @@ -97,7 +97,7 @@ allOf: then: properties: regulators: - $ref: ../regulator/samsung,s2mps14.yaml + $ref: /schemas/regulator/samsung,s2mps14.yaml samsung,s2mps11-acokb-ground: false samsung,s2mps11-wrstbi-ground: false @@ -109,7 +109,7 @@ allOf: then: properties: regulators: - $ref: ../regulator/samsung,s2mps15.yaml + $ref: /schemas/regulator/samsung,s2mps15.yaml samsung,s2mps11-acokb-ground: false samsung,s2mps11-wrstbi-ground: false @@ -121,7 +121,7 @@ allOf: then: properties: regulators: - $ref: ../regulator/samsung,s2mpu02.yaml + $ref: /schemas/regulator/samsung,s2mpu02.yaml samsung,s2mps11-acokb-ground: false samsung,s2mps11-wrstbi-ground: false diff --git a/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml b/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml index aea0b7d57d04..249248078c59 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml @@ -21,7 +21,7 @@ properties: const: samsung,s5m8767-pmic clocks: - $ref: ../clock/samsung,s2mps11.yaml + $ref: /schemas/clock/samsung,s2mps11.yaml description: Child node describing clock provider. @@ -32,7 +32,7 @@ properties: maxItems: 1 regulators: - $ref: ../regulator/samsung,s5m8767.yaml + $ref: /schemas/regulator/samsung,s5m8767.yaml description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/mfd/st,stmfx.yaml b/Documentation/devicetree/bindings/mfd/st,stmfx.yaml index 76551c90b128..61daf36b3c80 100644 --- a/Documentation/devicetree/bindings/mfd/st,stmfx.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stmfx.yaml @@ -60,7 +60,7 @@ properties: additionalProperties: false allOf: - - $ref: ../pinctrl/pinmux-node.yaml + - $ref: /schemas/pinctrl/pinmux-node.yaml properties: pins: true diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml index b17ebeb0a42f..e822817188fd 100644 --- a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml @@ -29,7 +29,7 @@ properties: onkey: type: object - $ref: ../input/input.yaml + $ref: /schemas/input/input.yaml properties: compatible: @@ -67,7 +67,7 @@ properties: watchdog: type: object - $ref: ../watchdog/watchdog.yaml + $ref: /schemas/watchdog/watchdog.yaml properties: compatible: diff --git a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml index 94f9767a927d..b2cfa4120b8a 100644 --- a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml +++ b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml @@ -126,7 +126,7 @@ properties: patternProperties: "^channel@[0-9a-f]+$": type: object - $ref: ../iio/adc/adc.yaml# + $ref: /schemas/iio/adc/adc.yaml# description: Represents each of the external channels which are connected to the ADC. @@ -180,22 +180,22 @@ properties: ab8500_fg: description: Node describing the AB8500 fuel gauge control block. type: object - $ref: ../power/supply/stericsson,ab8500-fg.yaml + $ref: /schemas/power/supply/stericsson,ab8500-fg.yaml ab8500_btemp: description: Node describing the AB8500 battery temperature control block. type: object - $ref: ../power/supply/stericsson,ab8500-btemp.yaml + $ref: /schemas/power/supply/stericsson,ab8500-btemp.yaml ab8500_charger: description: Node describing the AB8500 battery charger control block. type: object - $ref: ../power/supply/stericsson,ab8500-charger.yaml + $ref: /schemas/power/supply/stericsson,ab8500-charger.yaml ab8500_chargalg: description: Node describing the AB8500 battery charger algorithm. type: object - $ref: ../power/supply/stericsson,ab8500-chargalg.yaml + $ref: /schemas/power/supply/stericsson,ab8500-chargalg.yaml phy: description: Node describing the AB8500 USB PHY control block. @@ -339,40 +339,40 @@ properties: ab8500_ldo_aux1: description: The voltage for the auxiliary LDO regulator 1 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_aux2: description: The voltage for the auxiliary LDO regulator 2 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_aux3: description: The voltage for the auxiliary LDO regulator 3 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_aux4: description: The voltage for the auxiliary LDO regulator 4 only present on AB8505 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_aux5: description: The voltage for the auxiliary LDO regulator 5 only present on AB8505 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_aux6: description: The voltage for the auxiliary LDO regulator 6 only present on AB8505 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false # There is never any AUX7 regulator which is confusing @@ -381,21 +381,21 @@ properties: description: The voltage for the auxiliary LDO regulator 8 only present on AB8505 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_intcore: description: The LDO regulator for the internal core voltage of the AB8500 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_adc: description: Analog power regulator for the analog to digital converter ADC, only present on AB8505 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_tvout: @@ -404,39 +404,39 @@ properties: the temperature of the NTC thermistor on the battery. Only present on AB8500. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_audio: description: The LDO regulator for the audio codec output type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_anamic1: description: The LDO regulator for the analog microphone 1 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_anamic2: description: The LDO regulator for the analog microphone 2 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_dmic: description: The LDO regulator for the digital microphone only present on AB8500 type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ldo_ana: description: Analog power regulator for CSI and DSI interfaces, Camera Serial Interface CSI and Display Serial Interface DSI. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false required: @@ -459,19 +459,19 @@ properties: ab8500_ext1: description: The voltage for the VSMPS1 external regulator type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ext2: description: The voltage for the VSMPS2 external regulator type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false ab8500_ext3: description: The voltage for the VSMPS3 external regulator type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false required: @@ -482,7 +482,7 @@ properties: patternProperties: "^pwm@[1-9]+?$": type: object - $ref: ../pwm/pwm.yaml# + $ref: /schemas/pwm/pwm.yaml# unevaluatedProperties: false description: Represents each of the PWM blocks in the AB8500 diff --git a/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml b/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml index cb2a42caabb5..d6c13779d44e 100644 --- a/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml +++ b/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml @@ -71,52 +71,52 @@ properties: description: The voltage for the application processor, the main voltage domain for the chip. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_varm: description: The voltage for the ARM Cortex-A9 CPU. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_vmodem: description: The voltage for the modem subsystem. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_vpll: description: The voltage for the phase locked loop clocks. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_vsmps1: description: Also known as VIO12, is a step-down voltage regulator for 1.2V I/O. SMPS means System Management Power Source. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_vsmps2: description: Also known as VIO18, is a step-down voltage regulator for 1.8V I/O. SMPS means System Management Power Source. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_vsmps3: description: This is a step-down voltage regulator for 0.87 thru 1.875V I/O. SMPS means System Management Power Source. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_vrf1: description: RF transceiver voltage regulator. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sva_mmdsp: @@ -124,21 +124,21 @@ properties: voltage regulator. This is the voltage for the accelerator DSP for video encoding and decoding. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sva_mmdsp_ret: description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP) voltage regulator for retention mode. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sva_pipe: description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP) voltage regulator for the data pipe. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sia_mmdsp: @@ -146,21 +146,21 @@ properties: voltage regulator. This is the voltage for the accelerator DSP for image encoding and decoding. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sia_mmdsp_ret: description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP) voltage regulator for retention mode. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sia_pipe: description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP) voltage regulator for the data pipe. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_sga: @@ -168,7 +168,7 @@ properties: This is in effect controlling the power to the MALI400 3D accelerator block. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_b2r2_mcde: @@ -176,33 +176,33 @@ properties: Display Engine (MCDE) voltage regulator. These are two graphics blocks. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_esram12: description: Embedded Static RAM (ESRAM) 1 and 2 voltage regulator. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_esram12_ret: description: Embedded Static RAM (ESRAM) 1 and 2 voltage regulator for retention mode. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_esram34: description: Embedded Static RAM (ESRAM) 3 and 4 voltage regulator. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false db8500_esram34_ret: description: Embedded Static RAM (ESRAM) 3 and 4 voltage regulator for retention mode. type: object - $ref: ../regulator/regulator.yaml# + $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false required: diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 9d55bee155ce..7ed12a938baa 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -38,11 +38,20 @@ properties: - allwinner,sun8i-h3-system-controller - allwinner,sun8i-v3s-system-controller - allwinner,sun50i-a64-system-controller + - altr,sdr-ctl - amd,pensando-elba-syscon + - apm,xgene-csw + - apm,xgene-efuse + - apm,xgene-mcb + - apm,xgene-rb + - apm,xgene-scu - brcm,cru-clkset + - brcm,sr-cdru + - brcm,sr-mhb - freecom,fsg-cs2-system-controller - fsl,imx93-aonmix-ns-syscfg - fsl,imx93-wakeupmix-syscfg + - fsl,ls1088a-reset - hisilicon,dsa-subctrl - hisilicon,hi6220-sramctrl - hisilicon,pcie-sas-subctrl @@ -51,9 +60,15 @@ properties: - intel,lgm-syscon - loongson,ls1b-syscon - loongson,ls1c-syscon + - marvell,armada-3700-cpu-misc + - marvell,armada-3700-nb-pm + - marvell,armada-3700-avs - marvell,armada-3700-usb2-host-misc + - mediatek,mt2712-pctl-a-syscfg + - mediatek,mt6397-pctl-pmic-syscfg - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg + - mediatek,mt8173-pctl-a-syscfg - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon - microchip,sparx5-cpu-syscon @@ -73,6 +88,7 @@ properties: - rockchip,rv1126-qos - starfive,jh7100-sysmain - ti,am62-usb-phy-ctrl + - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - ti,am654-serdes-ctrl - ti,j784s4-pcie-ctrl diff --git a/Documentation/devicetree/bindings/mfd/ti,lp8732.yaml b/Documentation/devicetree/bindings/mfd/ti,lp8732.yaml new file mode 100644 index 000000000000..9a90cee2b545 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp8732.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp8732.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP873X Power Management Integrated Circuit + +maintainers: + - J Keerthy <j-keerthy@ti.com> + +description: + PMIC with two high-current buck converters and two linear regulators. + +properties: + compatible: + enum: + - ti,lp8732 + - ti,lp8733 + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + regulators: + description: + List of child nodes that specify the regulator initialization data. + type: object + patternProperties: + "^buck[01]|ldo[01]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + additionalProperties: false + +patternProperties: + '^(buck[01]|ldo[01])-in-supply$': + description: Phandle to parent supply of each regulator populated under regulators node. + +required: + - compatible + - reg + - regulators + - buck0-in-supply + - buck1-in-supply + - ldo0-in-supply + - ldo1-in-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic: pmic@60 { + compatible = "ti,lp8733"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck0-in-supply = <&vsys_3v3>; + buck1-in-supply = <&vsys_3v3>; + ldo0-in-supply = <&vsys_3v3>; + ldo1-in-supply = <&vsys_3v3>; + + regulators { + buck0: buck0 { + regulator-name = "buck0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-min-microamp = <1500000>; + regulator-max-microamp = <4000000>; + regulator-ramp-delay = <10000>; + regulator-always-on; + regulator-boot-on; + }; + + buck1: buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-min-microamp = <1500000>; + regulator-max-microamp = <4000000>; + regulator-ramp-delay = <10000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo0: ldo0 { + regulator-name = "ldo0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml b/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml index bd36a07c1721..a8eed9065d96 100644 --- a/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml @@ -49,7 +49,7 @@ properties: patternProperties: "^buck[1-6]$": type: object - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml properties: regulator-name: true @@ -72,7 +72,7 @@ properties: "^(ldoa[1-3]|swa1|swb[1-2]|vtt)$": type: object - $ref: ../regulator/regulator.yaml + $ref: /schemas/regulator/regulator.yaml properties: regulator-name: true diff --git a/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml b/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml index 9d43376bebed..6341b6070366 100644 --- a/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml @@ -21,6 +21,7 @@ properties: - ti,lp8764-q1 - ti,tps6593-q1 - ti,tps6594-q1 + - ti,tps65224-q1 reg: description: I2C slave address or SPI chip select number. diff --git a/Documentation/devicetree/bindings/mfd/ti,twl.yaml b/Documentation/devicetree/bindings/mfd/ti,twl.yaml index 52ed228fb1e7..c2357fecb56c 100644 --- a/Documentation/devicetree/bindings/mfd/ti,twl.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,twl.yaml @@ -15,6 +15,67 @@ description: | USB transceiver or Audio amplifier. These chips are connected to an i2c bus. +allOf: + - if: + properties: + compatible: + contains: + const: ti,twl4030 + then: + properties: + madc: + type: object + $ref: /schemas/iio/adc/ti,twl4030-madc.yaml + unevaluatedProperties: false + + bci: + type: object + $ref: /schemas/power/supply/twl4030-charger.yaml + unevaluatedProperties: false + + pwrbutton: + type: object + additionalProperties: false + properties: + compatible: + const: ti,twl4030-pwrbutton + interrupts: + items: + - items: + const: 8 + + watchdog: + type: object + additionalProperties: false + properties: + compatible: + const: ti,twl4030-wdt + + - if: + properties: + compatible: + contains: + const: ti,twl6030 + then: + properties: + gpadc: + type: object + properties: + compatible: + const: ti,twl6030-gpadc + - if: + properties: + compatible: + contains: + const: ti,twl6032 + then: + properties: + gpadc: + type: object + properties: + compatible: + const: ti,twl6032-gpadc + properties: compatible: description: @@ -42,7 +103,16 @@ properties: "#clock-cells": const: 1 -additionalProperties: false + rtc: + type: object + additionalProperties: false + properties: + compatible: + const: ti,twl4030-rtc + interrupts: + maxItems: 1 + +unevaluatedProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/rtc/twl-rtc.txt b/Documentation/devicetree/bindings/rtc/twl-rtc.txt deleted file mode 100644 index 8f9a94f2f896..000000000000 --- a/Documentation/devicetree/bindings/rtc/twl-rtc.txt +++ /dev/null @@ -1,11 +0,0 @@ -* Texas Instruments TWL4030/6030 RTC - -Required properties: -- compatible : Should be "ti,twl4030-rtc" -- interrupts : Should be the interrupt number. - -Example: - rtc { - compatible = "ti,twl4030-rtc"; - interrupts = <11>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/twl4030-wdt.txt b/Documentation/devicetree/bindings/watchdog/twl4030-wdt.txt deleted file mode 100644 index 80a37193c0b8..000000000000 --- a/Documentation/devicetree/bindings/watchdog/twl4030-wdt.txt +++ /dev/null @@ -1,10 +0,0 @@ -Device tree bindings for twl4030-wdt driver (TWL4030 watchdog) - -Required properties: - compatible = "ti,twl4030-wdt"; - -Example: - -watchdog { - compatible = "ti,twl4030-wdt"; -}; diff --git a/drivers/fpga/intel-m10-bmc-sec-update.c b/drivers/fpga/intel-m10-bmc-sec-update.c index 89851b133709..7ac9f9f5af12 100644 --- a/drivers/fpga/intel-m10-bmc-sec-update.c +++ b/drivers/fpga/intel-m10-bmc-sec-update.c @@ -529,11 +529,12 @@ static enum fw_upload_err m10bmc_sec_prepare(struct fw_upload *fwl, const u8 *data, u32 size) { struct m10bmc_sec *sec = fwl->dd_handle; + const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; u32 ret; sec->cancel_request = false; - if (!size || size > M10BMC_STAGING_SIZE) + if (!size || size > csr_map->staging_size) return FW_UPLOAD_ERR_INVALID_SIZE; if (sec->m10bmc->flash_bulk_ops) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 4b023ee229cf..266b4f54af60 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -292,7 +292,7 @@ config MFD_MADERA_SPI config MFD_MAX5970 tristate "Maxim 5970/5978 power switch and monitor" - depends on (I2C && OF) + depends on I2C && OF select MFD_SIMPLE_MFD_I2C help This driver controls a Maxim 5970/5978 switch via I2C bus. @@ -458,7 +458,7 @@ config MFD_EXYNOS_LPASS config MFD_GATEWORKS_GSC tristate "Gateworks System Controller" - depends on (I2C && OF) + depends on I2C && OF select MFD_CORE select REGMAP_I2C select REGMAP_IRQ @@ -473,7 +473,7 @@ config MFD_GATEWORKS_GSC config MFD_MC13XXX tristate - depends on (SPI_MASTER || I2C) + depends on SPI_MASTER || I2C select MFD_CORE select REGMAP_IRQ help @@ -1109,7 +1109,7 @@ config PCF50633_GPIO config MFD_PM8XXX tristate "Qualcomm PM8xxx PMIC chips driver" - depends on (ARM || HEXAGON || COMPILE_TEST) + depends on ARM || HEXAGON || COMPILE_TEST select IRQ_DOMAIN_HIERARCHY select MFD_CORE select REGMAP @@ -1225,7 +1225,7 @@ config MFD_RK8XX select MFD_CORE config MFD_RK8XX_I2C - tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power Management Chip" + tristate "Rockchip RK805/RK808/RK809/RK816/RK817/RK818 Power Management Chip" depends on I2C && OF select MFD_CORE select REGMAP_I2C @@ -1233,7 +1233,7 @@ config MFD_RK8XX_I2C select MFD_RK8XX help If you say yes here you get support for the RK805, RK808, RK809, - RK817 and RK818 Power Management chips. + RK816, RK817 and RK818 Power Management chips. This driver provides common support for accessing the device through I2C interface. The device supports multiple sub-devices including interrupts, RTC, LDO & DCDC regulators, and onkey. @@ -1418,7 +1418,7 @@ config MFD_DB8500_PRCMU config MFD_STMPE bool "STMicroelectronics STMPE" - depends on (I2C=y || SPI_MASTER=y) + depends on I2C=y || SPI_MASTER=y depends on OF select MFD_CORE help @@ -2116,7 +2116,7 @@ config MFD_STM32_TIMERS config MFD_STPMIC1 tristate "Support for STPMIC1 PMIC" - depends on (I2C=y && OF) + depends on I2C=y && OF select REGMAP_I2C select REGMAP_IRQ select MFD_CORE diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 48ce6ea693ce..f2c0f144c0fc 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -422,7 +422,7 @@ static const struct regmap_config axp717_regmap_config = { .wr_table = &axp717_writeable_table, .volatile_table = &axp717_volatile_table, .max_register = AXP717_CPUSLDO_CONTROL, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, }; static const struct regmap_config axp806_regmap_config = { diff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c index a0fb2dc6c3b2..ae8fd37afb75 100644 --- a/drivers/mfd/cs42l43.c +++ b/drivers/mfd/cs42l43.c @@ -43,6 +43,9 @@ #define CS42L43_MCU_UPDATE_TIMEOUT_US 500000 #define CS42L43_MCU_UPDATE_RETRIES 5 +#define CS42L43_MCU_ROM_REV 0x2001 +#define CS42L43_MCU_ROM_BIOS_REV 0x0000 + #define CS42L43_MCU_SUPPORTED_REV 0x2105 #define CS42L43_MCU_SHADOW_REGS_REQUIRED_REV 0x2200 #define CS42L43_MCU_SUPPORTED_BIOS_REV 0x0001 @@ -709,6 +712,23 @@ err: complete(&cs42l43->firmware_download); } +static int cs42l43_mcu_is_hw_compatible(struct cs42l43 *cs42l43, + unsigned int mcu_rev, + unsigned int bios_rev) +{ + /* + * The firmware has two revision numbers bringing either of them up to a + * supported version will provide the disable the driver requires. + */ + if (mcu_rev < CS42L43_MCU_SUPPORTED_REV && + bios_rev < CS42L43_MCU_SUPPORTED_BIOS_REV) { + dev_err(cs42l43->dev, "Firmware too old to support disable\n"); + return -EINVAL; + } + + return 0; +} + /* * The process of updating the firmware is split into a series of steps, at the * end of each step a soft reset of the device might be required which will @@ -745,11 +765,10 @@ static int cs42l43_mcu_update_step(struct cs42l43 *cs42l43) ((mcu_rev & CS42L43_FW_SUBMINOR_REV_MASK) >> 8); /* - * The firmware has two revision numbers bringing either of them up to a - * supported version will provide the features the driver requires. + * The firmware has two revision numbers both of them being at the ROM + * revision indicates no patch has been applied. */ - patched = mcu_rev >= CS42L43_MCU_SUPPORTED_REV || - bios_rev >= CS42L43_MCU_SUPPORTED_BIOS_REV; + patched = mcu_rev != CS42L43_MCU_ROM_REV || bios_rev != CS42L43_MCU_ROM_BIOS_REV; /* * Later versions of the firmwware require the driver to access some * features through a set of shadow registers. @@ -794,10 +813,15 @@ static int cs42l43_mcu_update_step(struct cs42l43 *cs42l43) return cs42l43_mcu_stage_2_3(cs42l43, shadow); } case CS42L43_MCU_BOOT_STAGE3: - if (patched) + if (patched) { + ret = cs42l43_mcu_is_hw_compatible(cs42l43, mcu_rev, bios_rev); + if (ret) + return ret; + return cs42l43_mcu_disable(cs42l43); - else + } else { return cs42l43_mcu_stage_3_2(cs42l43); + } case CS42L43_MCU_BOOT_STAGE4: return 0; default: diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 9f4782bdbf4b..c36a101df7be 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -54,7 +54,7 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev, if (ret) return ret; - ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_INTX); + ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); if (ret < 0) return ret; diff --git a/drivers/mfd/intel-m10-bmc-pmci.c b/drivers/mfd/intel-m10-bmc-pmci.c index 0392ef8b57d8..698c5933938b 100644 --- a/drivers/mfd/intel-m10-bmc-pmci.c +++ b/drivers/mfd/intel-m10-bmc-pmci.c @@ -370,6 +370,7 @@ static const struct m10bmc_csr_map m10bmc_n6000_csr_map = { .pr_reh_addr = M10BMC_N6000_PR_REH_ADDR, .pr_magic = M10BMC_N6000_PR_PROG_MAGIC, .rsu_update_counter = M10BMC_N6000_STAGING_FLASH_COUNT, + .staging_size = M10BMC_STAGING_SIZE, }; static const struct intel_m10bmc_platform_info m10bmc_pmci_n6000 = { diff --git a/drivers/mfd/intel-m10-bmc-spi.c b/drivers/mfd/intel-m10-bmc-spi.c index cbeb7de9e041..d64d28199df6 100644 --- a/drivers/mfd/intel-m10-bmc-spi.c +++ b/drivers/mfd/intel-m10-bmc-spi.c @@ -109,6 +109,7 @@ static const struct m10bmc_csr_map m10bmc_n3000_csr_map = { .pr_reh_addr = M10BMC_N3000_PR_REH_ADDR, .pr_magic = M10BMC_N3000_PR_PROG_MAGIC, .rsu_update_counter = M10BMC_N3000_STAGING_FLASH_COUNT, + .staging_size = M10BMC_STAGING_SIZE, }; static struct mfd_cell m10bmc_d5005_subdevs[] = { diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 5557f023a173..8a332852bf97 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -6,14 +6,17 @@ * Author: Michael Brunner <michael.brunner@kontron.com> */ +#include <linux/err.h> #include <linux/platform_device.h> #include <linux/mfd/core.h> #include <linux/mfd/kempld.h> +#include <linux/mod_devicetable.h> #include <linux/module.h> +#include <linux/property.h> #include <linux/dmi.h> #include <linux/io.h> #include <linux/delay.h> -#include <linux/acpi.h> +#include <linux/sysfs.h> #define MAX_ID_LEN 4 static char force_device_id[MAX_ID_LEN + 1] = ""; @@ -106,7 +109,7 @@ static int kempld_register_cells_generic(struct kempld_device_data *pld) if (pld->feature_mask & KEMPLD_FEATURE_MASK_UART) devs[i++].name = kempld_dev_names[KEMPLD_UART]; - return mfd_add_devices(pld->dev, -1, devs, i, NULL, 0, NULL); + return mfd_add_devices(pld->dev, PLATFORM_DEVID_NONE, devs, i, NULL, 0, NULL); } static struct resource kempld_ioresource = { @@ -126,31 +129,22 @@ static const struct kempld_platform_data kempld_platform_data_generic = { static struct platform_device *kempld_pdev; -static int kempld_create_platform_device(const struct dmi_system_id *id) +static int kempld_create_platform_device(const struct kempld_platform_data *pdata) { - const struct kempld_platform_data *pdata = id->driver_data; - int ret; - - kempld_pdev = platform_device_alloc("kempld", -1); - if (!kempld_pdev) - return -ENOMEM; - - ret = platform_device_add_data(kempld_pdev, pdata, sizeof(*pdata)); - if (ret) - goto err; - - ret = platform_device_add_resources(kempld_pdev, pdata->ioresource, 1); - if (ret) - goto err; - - ret = platform_device_add(kempld_pdev); - if (ret) - goto err; + const struct platform_device_info pdevinfo = { + .name = "kempld", + .id = PLATFORM_DEVID_NONE, + .res = pdata->ioresource, + .num_res = 1, + .data = pdata, + .size_data = sizeof(*pdata), + }; + + kempld_pdev = platform_device_register_full(&pdevinfo); + if (IS_ERR(kempld_pdev)) + return PTR_ERR(kempld_pdev); return 0; -err: - platform_device_put(kempld_pdev); - return ret; } /** @@ -299,11 +293,8 @@ static int kempld_get_info(struct kempld_device_data *pld) else minor = (pld->info.minor - 10) + 'A'; - ret = scnprintf(pld->info.version, sizeof(pld->info.version), - "P%X%c%c.%04X", pld->info.number, major, minor, - pld->info.buildnr); - if (ret < 0) - return ret; + scnprintf(pld->info.version, sizeof(pld->info.version), "P%X%c%c.%04X", + pld->info.number, major, minor, pld->info.buildnr); return 0; } @@ -372,16 +363,13 @@ static DEVICE_ATTR_RO(pld_version); static DEVICE_ATTR_RO(pld_specification); static DEVICE_ATTR_RO(pld_type); -static struct attribute *pld_attributes[] = { +static struct attribute *pld_attrs[] = { &dev_attr_pld_version.attr, &dev_attr_pld_specification.attr, &dev_attr_pld_type.attr, NULL }; - -static const struct attribute_group pld_attr_group = { - .attrs = pld_attributes, -}; +ATTRIBUTE_GROUPS(pld); static int kempld_detect_device(struct kempld_device_data *pld) { @@ -414,36 +402,8 @@ static int kempld_detect_device(struct kempld_device_data *pld) pld->info.version, kempld_get_type_string(pld), pld->info.spec_major, pld->info.spec_minor); - ret = sysfs_create_group(&pld->dev->kobj, &pld_attr_group); - if (ret) - return ret; - - ret = kempld_register_cells(pld); - if (ret) - sysfs_remove_group(&pld->dev->kobj, &pld_attr_group); - - return ret; -} - -#ifdef CONFIG_ACPI -static int kempld_get_acpi_data(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - const struct kempld_platform_data *pdata; - int ret; - - pdata = acpi_device_get_match_data(dev); - ret = platform_device_add_data(pdev, pdata, - sizeof(struct kempld_platform_data)); - - return ret; + return kempld_register_cells(pld); } -#else -static int kempld_get_acpi_data(struct platform_device *pdev) -{ - return -ENODEV; -} -#endif /* CONFIG_ACPI */ static int kempld_probe(struct platform_device *pdev) { @@ -453,15 +413,21 @@ static int kempld_probe(struct platform_device *pdev) struct resource *ioport; int ret; - if (kempld_pdev == NULL) { + if (IS_ERR_OR_NULL(kempld_pdev)) { /* * No kempld_pdev device has been registered in kempld_init, * so we seem to be probing an ACPI platform device. */ - ret = kempld_get_acpi_data(pdev); + pdata = device_get_match_data(dev); + if (!pdata) + return -ENODEV; + + ret = platform_device_add_data(pdev, pdata, sizeof(*pdata)); if (ret) return ret; - } else if (kempld_pdev != pdev) { + } else if (kempld_pdev == pdev) { + pdata = dev_get_platdata(dev); + } else { /* * The platform device we are probing is not the one we * registered in kempld_init using the DMI table, so this one @@ -472,7 +438,6 @@ static int kempld_probe(struct platform_device *pdev) dev_notice(dev, "platform device exists - not using ACPI\n"); return -ENODEV; } - pdata = dev_get_platdata(dev); pld = devm_kzalloc(dev, sizeof(*pld), GFP_KERNEL); if (!pld) @@ -503,25 +468,22 @@ static void kempld_remove(struct platform_device *pdev) struct kempld_device_data *pld = platform_get_drvdata(pdev); const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); - sysfs_remove_group(&pld->dev->kobj, &pld_attr_group); - mfd_remove_devices(&pdev->dev); pdata->release_hardware_mutex(pld); } -#ifdef CONFIG_ACPI static const struct acpi_device_id kempld_acpi_table[] = { { "KEM0000", (kernel_ulong_t)&kempld_platform_data_generic }, { "KEM0001", (kernel_ulong_t)&kempld_platform_data_generic }, {} }; MODULE_DEVICE_TABLE(acpi, kempld_acpi_table); -#endif static struct platform_driver kempld_driver = { .driver = { .name = "kempld", - .acpi_match_table = ACPI_PTR(kempld_acpi_table), + .acpi_match_table = kempld_acpi_table, + .dev_groups = pld_groups, }, .probe = kempld_probe, .remove_new = kempld_remove, @@ -534,375 +496,281 @@ static const struct dmi_system_id kempld_dmi_table[] __initconst = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bBD"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "BBL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bBL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "BDV7", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bDV7"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "BHL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bHL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "BKL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bKL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "BSL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bSL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CAL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cAL"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CBL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cBL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CBW6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cBW6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CCR2", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bIP2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CCR6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bIP6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CDV7", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cDV7"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cHL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHR2", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "ETXexpress-SC T2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHR2", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "ETXe-SC T2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHR2", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bSC2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHR6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "ETXexpress-SC T6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHR6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "ETXe-SC T6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CHR6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bSC6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CKL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cKL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CNTG", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "ETXexpress-PC"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CNTG", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-bPC2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CNTX", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "PXT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CSL6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cSL6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "CVV6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cBT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "FRI2", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BIOS_VERSION, "FRI2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "FRI2", .matches = { DMI_MATCH(DMI_PRODUCT_NAME, "Fish River Island II"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "A203", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "KBox A-203"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "M4A1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-m4AL"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "MAL1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-mAL10"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "MAPL", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "mITX-APL"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "MBR1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "ETX-OH"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "MVV1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-mBT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "NTC1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "nanoETXexpress-TT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "NTC1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "nETXe-TT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "NTC1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-mTT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "NUP1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-mCT"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "PAPL", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "pITX-APL"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "SXAL", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "SMARC-sXAL"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "SXAL4", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "SMARC-sXA4"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "UNP1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "microETXexpress-DC"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "UNP1", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cDC2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "UNTG", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "microETXexpress-PC"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "UNTG", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cPC2"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "UUP6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cCT6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "UTH6", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "COMe-cTH6"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, { .ident = "Q7AL", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), DMI_MATCH(DMI_BOARD_NAME, "Qseven-Q7AL"), }, - .driver_data = (void *)&kempld_platform_data_generic, - .callback = kempld_create_platform_device, }, {} }; @@ -911,27 +779,28 @@ MODULE_DEVICE_TABLE(dmi, kempld_dmi_table); static int __init kempld_init(void) { const struct dmi_system_id *id; + int ret = -ENODEV; - if (force_device_id[0]) { - for (id = kempld_dmi_table; - id->matches[0].slot != DMI_NONE; id++) - if (strstr(id->ident, force_device_id)) - if (id->callback && !id->callback(id)) - break; - if (id->matches[0].slot == DMI_NONE) - return -ENODEV; - } else { - dmi_check_system(kempld_dmi_table); + for (id = dmi_first_match(kempld_dmi_table); id; id = dmi_first_match(id + 1)) { + /* Check, if user asked for the exact device ID match */ + if (force_device_id[0] && !strstr(id->ident, force_device_id)) + continue; + + ret = kempld_create_platform_device(&kempld_platform_data_generic); + if (ret) + continue; + + break; } + if (ret) + return ret; return platform_driver_register(&kempld_driver); } static void __exit kempld_exit(void) { - if (kempld_pdev) - platform_device_unregister(kempld_pdev); - + platform_device_unregister(kempld_pdev); platform_driver_unregister(&kempld_driver); } diff --git a/drivers/mfd/ocelot-spi.c b/drivers/mfd/ocelot-spi.c index 94f82677675b..b015c8683f1b 100644 --- a/drivers/mfd/ocelot-spi.c +++ b/drivers/mfd/ocelot-spi.c @@ -145,7 +145,6 @@ static int ocelot_spi_regmap_bus_read(void *context, const void *reg, size_t reg struct device *dev = context; struct ocelot_ddata *ddata; struct spi_device *spi; - struct spi_message msg; unsigned int index = 0; ddata = dev_get_drvdata(dev); @@ -166,9 +165,7 @@ static int ocelot_spi_regmap_bus_read(void *context, const void *reg, size_t reg xfers[index].len = val_size; index++; - spi_message_init_with_transfers(&msg, xfers, index); - - return spi_sync(spi, &msg); + return spi_sync_transfer(spi, xfers, index); } static int ocelot_spi_regmap_bus_write(void *context, const void *data, size_t count) diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c index e2261b68b844..5eda3c0dbbdf 100644 --- a/drivers/mfd/rk8xx-core.c +++ b/drivers/mfd/rk8xx-core.c @@ -28,6 +28,10 @@ static const struct resource rtc_resources[] = { DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM), }; +static const struct resource rk816_rtc_resources[] = { + DEFINE_RES_IRQ(RK816_IRQ_RTC_ALARM), +}; + static const struct resource rk817_rtc_resources[] = { DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), }; @@ -87,6 +91,22 @@ static const struct mfd_cell rk808s[] = { }, }; +static const struct mfd_cell rk816s[] = { + { .name = "rk805-pinctrl", }, + { .name = "rk808-clkout", }, + { .name = "rk808-regulator", }, + { + .name = "rk805-pwrkey", + .num_resources = ARRAY_SIZE(rk805_key_resources), + .resources = rk805_key_resources, + }, + { + .name = "rk808-rtc", + .num_resources = ARRAY_SIZE(rk816_rtc_resources), + .resources = rk816_rtc_resources, + }, +}; + static const struct mfd_cell rk817s[] = { { .name = "rk808-clkout", }, { .name = "rk808-regulator", }, @@ -148,6 +168,17 @@ static const struct rk808_reg_data rk808_pre_init_reg[] = { VB_LO_SEL_3500MV }, }; +static const struct rk808_reg_data rk816_pre_init_reg[] = { + { RK818_BUCK1_CONFIG_REG, RK817_RAMP_RATE_MASK, + RK817_RAMP_RATE_12_5MV_PER_US }, + { RK818_BUCK2_CONFIG_REG, RK817_RAMP_RATE_MASK, + RK817_RAMP_RATE_12_5MV_PER_US }, + { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_250MA }, + { RK808_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP105C}, + { RK808_VB_MON_REG, VBAT_LOW_VOL_MASK | VBAT_LOW_ACT_MASK, + RK808_VBAT_LOW_3V0 | EN_VABT_LOW_SHUT_DOWN }, +}; + static const struct rk808_reg_data rk817_pre_init_reg[] = { {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, /* Codec specific registers */ @@ -350,6 +381,59 @@ static const struct regmap_irq rk808_irqs[] = { }, }; +static const unsigned int rk816_irq_status_offsets[] = { + RK816_IRQ_STS_OFFSET(RK816_INT_STS_REG1), + RK816_IRQ_STS_OFFSET(RK816_INT_STS_REG2), + RK816_IRQ_STS_OFFSET(RK816_INT_STS_REG3), +}; + +static const unsigned int rk816_irq_mask_offsets[] = { + RK816_IRQ_MSK_OFFSET(RK816_INT_STS_MSK_REG1), + RK816_IRQ_MSK_OFFSET(RK816_INT_STS_MSK_REG2), + RK816_IRQ_MSK_OFFSET(RK816_INT_STS_MSK_REG3), +}; + +static unsigned int rk816_get_irq_reg(struct regmap_irq_chip_data *data, + unsigned int base, int index) +{ + unsigned int irq_reg = base; + + switch (base) { + case RK816_INT_STS_REG1: + irq_reg += rk816_irq_status_offsets[index]; + break; + case RK816_INT_STS_MSK_REG1: + irq_reg += rk816_irq_mask_offsets[index]; + break; + } + + return irq_reg; +}; + +static const struct regmap_irq rk816_irqs[] = { + /* INT_STS_REG1 IRQs */ + REGMAP_IRQ_REG(RK816_IRQ_PWRON_FALL, 0, RK816_INT_STS_PWRON_FALL), + REGMAP_IRQ_REG(RK816_IRQ_PWRON_RISE, 0, RK816_INT_STS_PWRON_RISE), + + /* INT_STS_REG2 IRQs */ + REGMAP_IRQ_REG(RK816_IRQ_VB_LOW, 1, RK816_INT_STS_VB_LOW), + REGMAP_IRQ_REG(RK816_IRQ_PWRON, 1, RK816_INT_STS_PWRON), + REGMAP_IRQ_REG(RK816_IRQ_PWRON_LP, 1, RK816_INT_STS_PWRON_LP), + REGMAP_IRQ_REG(RK816_IRQ_HOTDIE, 1, RK816_INT_STS_HOTDIE), + REGMAP_IRQ_REG(RK816_IRQ_RTC_ALARM, 1, RK816_INT_STS_RTC_ALARM), + REGMAP_IRQ_REG(RK816_IRQ_RTC_PERIOD, 1, RK816_INT_STS_RTC_PERIOD), + REGMAP_IRQ_REG(RK816_IRQ_USB_OV, 1, RK816_INT_STS_USB_OV), + + /* INT_STS3 IRQs */ + REGMAP_IRQ_REG(RK816_IRQ_PLUG_IN, 2, RK816_INT_STS_PLUG_IN), + REGMAP_IRQ_REG(RK816_IRQ_PLUG_OUT, 2, RK816_INT_STS_PLUG_OUT), + REGMAP_IRQ_REG(RK816_IRQ_CHG_OK, 2, RK816_INT_STS_CHG_OK), + REGMAP_IRQ_REG(RK816_IRQ_CHG_TE, 2, RK816_INT_STS_CHG_TE), + REGMAP_IRQ_REG(RK816_IRQ_CHG_TS, 2, RK816_INT_STS_CHG_TS), + REGMAP_IRQ_REG(RK816_IRQ_CHG_CVTLIM, 2, RK816_INT_STS_CHG_CVTLIM), + REGMAP_IRQ_REG(RK816_IRQ_DISCHG_ILIM, 2, RK816_INT_STS_DISCHG_ILIM), +}; + static const struct regmap_irq rk818_irqs[] = { /* INT_STS */ [RK818_IRQ_VOUT_LO] = { @@ -482,6 +566,18 @@ static const struct regmap_irq_chip rk808_irq_chip = { .init_ack_masked = true, }; +static const struct regmap_irq_chip rk816_irq_chip = { + .name = "rk816", + .irqs = rk816_irqs, + .num_irqs = ARRAY_SIZE(rk816_irqs), + .num_regs = 3, + .get_irq_reg = rk816_get_irq_reg, + .status_base = RK816_INT_STS_REG1, + .mask_base = RK816_INT_STS_MSK_REG1, + .ack_base = RK816_INT_STS_REG1, + .init_ack_masked = true, +}; + static struct regmap_irq_chip rk817_irq_chip = { .name = "rk817", .irqs = rk817_irqs, @@ -530,6 +626,7 @@ static int rk808_power_off(struct sys_off_data *data) reg = RK817_SYS_CFG(3); bit = DEV_OFF; break; + case RK816_ID: case RK818_ID: reg = RK818_DEVCTRL_REG; bit = DEV_OFF; @@ -637,6 +734,13 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap cells = rk808s; nr_cells = ARRAY_SIZE(rk808s); break; + case RK816_ID: + rk808->regmap_irq_chip = &rk816_irq_chip; + pre_init_reg = rk816_pre_init_reg; + nr_pre_init_regs = ARRAY_SIZE(rk816_pre_init_reg); + cells = rk816s; + nr_cells = ARRAY_SIZE(rk816s); + break; case RK818_ID: rk808->regmap_irq_chip = &rk818_irq_chip; pre_init_reg = rk818_pre_init_reg; diff --git a/drivers/mfd/rk8xx-i2c.c b/drivers/mfd/rk8xx-i2c.c index 75b5cf09d5a0..69a6b297d723 100644 --- a/drivers/mfd/rk8xx-i2c.c +++ b/drivers/mfd/rk8xx-i2c.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Rockchip RK808/RK818 Core (I2C) driver + * Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver * * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd * Copyright (C) 2016 PHYTEC Messtechnik GmbH @@ -49,6 +49,35 @@ static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg) return false; } +static bool rk816_is_volatile_reg(struct device *dev, unsigned int reg) +{ + /* + * Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but + * we don't use that feature. It's better to cache. + */ + + switch (reg) { + case RK808_SECONDS_REG ... RK808_WEEKS_REG: + case RK808_RTC_STATUS_REG: + case RK808_VB_MON_REG: + case RK808_THERMAL_REG: + case RK816_DCDC_EN_REG1: + case RK816_DCDC_EN_REG2: + case RK816_INT_STS_REG1: + case RK816_INT_STS_REG2: + case RK816_INT_STS_REG3: + case RK808_DEVCTRL_REG: + case RK816_SUP_STS_REG: + case RK816_GGSTS_REG: + case RK816_ZERO_CUR_ADC_REGH: + case RK816_ZERO_CUR_ADC_REGL: + case RK816_GASCNT_REG(0) ... RK816_BAT_VOL_REGL: + return true; + } + + return false; +} + static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg) { /* @@ -100,6 +129,14 @@ static const struct regmap_config rk808_regmap_config = { .volatile_reg = rk808_is_volatile_reg, }; +static const struct regmap_config rk816_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RK816_DATA_REG(18), + .cache_type = REGCACHE_MAPLE, + .volatile_reg = rk816_is_volatile_reg, +}; + static const struct regmap_config rk817_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -123,6 +160,11 @@ static const struct rk8xx_i2c_platform_data rk809_data = { .variant = RK809_ID, }; +static const struct rk8xx_i2c_platform_data rk816_data = { + .regmap_cfg = &rk816_regmap_config, + .variant = RK816_ID, +}; + static const struct rk8xx_i2c_platform_data rk817_data = { .regmap_cfg = &rk817_regmap_config, .variant = RK817_ID, @@ -161,6 +203,7 @@ static const struct of_device_id rk8xx_i2c_of_match[] = { { .compatible = "rockchip,rk805", .data = &rk805_data }, { .compatible = "rockchip,rk808", .data = &rk808_data }, { .compatible = "rockchip,rk809", .data = &rk809_data }, + { .compatible = "rockchip,rk816", .data = &rk816_data }, { .compatible = "rockchip,rk817", .data = &rk817_data }, { .compatible = "rockchip,rk818", .data = &rk818_data }, { }, diff --git a/drivers/mfd/rohm-bd71828.c b/drivers/mfd/rohm-bd71828.c index 2f3826c7eef4..5b4290f116fc 100644 --- a/drivers/mfd/rohm-bd71828.c +++ b/drivers/mfd/rohm-bd71828.c @@ -464,6 +464,27 @@ static int set_clk_mode(struct device *dev, struct regmap *regmap, OUT32K_MODE_CMOS); } +static struct i2c_client *bd71828_dev; +static void bd71828_power_off(void) +{ + while (true) { + s32 val; + + /* We are not allowed to sleep, so do not use regmap involving mutexes here. */ + val = i2c_smbus_read_byte_data(bd71828_dev, BD71828_REG_PS_CTRL_1); + if (val >= 0) + i2c_smbus_write_byte_data(bd71828_dev, + BD71828_REG_PS_CTRL_1, + BD71828_MASK_STATE_HBNT | (u8)val); + mdelay(500); + } +} + +static void bd71828_remove_poweroff(void *data) +{ + pm_power_off = NULL; +} + static int bd71828_i2c_probe(struct i2c_client *i2c) { struct regmap_irq_chip_data *irq_data; @@ -542,7 +563,20 @@ static int bd71828_i2c_probe(struct i2c_client *i2c) ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, mfd, cells, NULL, 0, regmap_irq_get_domain(irq_data)); if (ret) - dev_err_probe(&i2c->dev, ret, "Failed to create subdevices\n"); + return dev_err_probe(&i2c->dev, ret, "Failed to create subdevices\n"); + + if (of_device_is_system_power_controller(i2c->dev.of_node) && + chip_type == ROHM_CHIP_TYPE_BD71828) { + if (!pm_power_off) { + bd71828_dev = i2c; + pm_power_off = bd71828_power_off; + ret = devm_add_action_or_reset(&i2c->dev, + bd71828_remove_poweroff, + NULL); + } else { + dev_warn(&i2c->dev, "Poweroff callback already assigned\n"); + } + } return ret; } diff --git a/drivers/mfd/rsmu_i2c.c b/drivers/mfd/rsmu_i2c.c index 5711e512b6a2..cba64f107a2f 100644 --- a/drivers/mfd/rsmu_i2c.c +++ b/drivers/mfd/rsmu_i2c.c @@ -32,6 +32,8 @@ #define RSMU_SABRE_PAGE_ADDR 0x7F #define RSMU_SABRE_PAGE_WINDOW 128 +typedef int (*rsmu_rw_device)(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes); + static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = { { .range_min = 0, @@ -54,7 +56,28 @@ static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg) } } -static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes) +static int rsmu_smbus_i2c_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes) +{ + struct i2c_client *client = to_i2c_client(rsmu->dev); + + return i2c_smbus_write_i2c_block_data(client, reg, bytes, buf); +} + +static int rsmu_smbus_i2c_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes) +{ + struct i2c_client *client = to_i2c_client(rsmu->dev); + int ret; + + ret = i2c_smbus_read_i2c_block_data(client, reg, bytes, buf); + if (ret == bytes) + return 0; + else if (ret < 0) + return ret; + else + return -EIO; +} + +static int rsmu_i2c_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes) { struct i2c_client *client = to_i2c_client(rsmu->dev); struct i2c_msg msg[2]; @@ -84,10 +107,11 @@ static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes) return 0; } -static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes) +static int rsmu_i2c_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes) { struct i2c_client *client = to_i2c_client(rsmu->dev); - u8 msg[RSMU_MAX_WRITE_COUNT + 1]; /* 1 Byte added for the device register */ + /* we add 1 byte for device register */ + u8 msg[RSMU_MAX_WRITE_COUNT + 1]; int cnt; if (bytes > RSMU_MAX_WRITE_COUNT) @@ -107,7 +131,8 @@ static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes return 0; } -static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg) +static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg, + rsmu_rw_device rsmu_write_device) { u32 page = reg & RSMU_CM_PAGE_MASK; u8 buf[4]; @@ -136,35 +161,35 @@ static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg) return err; } -static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val) +static int rsmu_i2c_reg_read(void *context, unsigned int reg, unsigned int *val) { struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context); u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK); int err; - err = rsmu_write_page_register(rsmu, reg); + err = rsmu_write_page_register(rsmu, reg, rsmu_i2c_write_device); if (err) return err; - err = rsmu_read_device(rsmu, addr, (u8 *)val, 1); + err = rsmu_i2c_read_device(rsmu, addr, (u8 *)val, 1); if (err) dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr); return err; } -static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val) +static int rsmu_i2c_reg_write(void *context, unsigned int reg, unsigned int val) { struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context); u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK); u8 data = (u8)val; int err; - err = rsmu_write_page_register(rsmu, reg); + err = rsmu_write_page_register(rsmu, reg, rsmu_i2c_write_device); if (err) return err; - err = rsmu_write_device(rsmu, addr, &data, 1); + err = rsmu_i2c_write_device(rsmu, addr, &data, 1); if (err) dev_err(rsmu->dev, "Failed to write offset address 0x%x\n", addr); @@ -172,12 +197,57 @@ static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val) return err; } -static const struct regmap_config rsmu_cm_regmap_config = { +static int rsmu_smbus_i2c_reg_read(void *context, unsigned int reg, unsigned int *val) +{ + struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context); + u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK); + int err; + + err = rsmu_write_page_register(rsmu, reg, rsmu_smbus_i2c_write_device); + if (err) + return err; + + err = rsmu_smbus_i2c_read_device(rsmu, addr, (u8 *)val, 1); + if (err) + dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr); + + return err; +} + +static int rsmu_smbus_i2c_reg_write(void *context, unsigned int reg, unsigned int val) +{ + struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context); + u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK); + u8 data = (u8)val; + int err; + + err = rsmu_write_page_register(rsmu, reg, rsmu_smbus_i2c_write_device); + if (err) + return err; + + err = rsmu_smbus_i2c_write_device(rsmu, addr, &data, 1); + if (err) + dev_err(rsmu->dev, + "Failed to write offset address 0x%x\n", addr); + + return err; +} + +static const struct regmap_config rsmu_i2c_cm_regmap_config = { .reg_bits = 32, .val_bits = 8, .max_register = 0x20120000, - .reg_read = rsmu_reg_read, - .reg_write = rsmu_reg_write, + .reg_read = rsmu_i2c_reg_read, + .reg_write = rsmu_i2c_reg_write, + .cache_type = REGCACHE_NONE, +}; + +static const struct regmap_config rsmu_smbus_i2c_cm_regmap_config = { + .reg_bits = 32, + .val_bits = 8, + .max_register = 0x20120000, + .reg_read = rsmu_smbus_i2c_reg_read, + .reg_write = rsmu_smbus_i2c_reg_write, .cache_type = REGCACHE_NONE, }; @@ -219,7 +289,15 @@ static int rsmu_i2c_probe(struct i2c_client *client) switch (rsmu->type) { case RSMU_CM: - cfg = &rsmu_cm_regmap_config; + if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + cfg = &rsmu_i2c_cm_regmap_config; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_I2C_BLOCK)) { + cfg = &rsmu_smbus_i2c_cm_regmap_config; + } else { + dev_err(rsmu->dev, "Unsupported i2c adapter\n"); + return -ENOTSUPP; + } break; case RSMU_SABRE: cfg = &rsmu_sabre_regmap_config; @@ -236,6 +314,7 @@ static int rsmu_i2c_probe(struct i2c_client *client) rsmu->regmap = devm_regmap_init(&client->dev, NULL, client, cfg); else rsmu->regmap = devm_regmap_init_i2c(client, cfg); + if (IS_ERR(rsmu->regmap)) { ret = PTR_ERR(rsmu->regmap); dev_err(rsmu->dev, "Failed to allocate register map: %d\n", ret); diff --git a/drivers/mfd/rsmu_spi.c b/drivers/mfd/rsmu_spi.c index ca0a1202c3ce..39d9be1e141f 100644 --- a/drivers/mfd/rsmu_spi.c +++ b/drivers/mfd/rsmu_spi.c @@ -106,10 +106,10 @@ static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg) return 0; page_reg = RSMU_CM_PAGE_ADDR; page = reg & RSMU_PAGE_MASK; - buf[0] = (u8)(page & 0xff); - buf[1] = (u8)((page >> 8) & 0xff); - buf[2] = (u8)((page >> 16) & 0xff); - buf[3] = (u8)((page >> 24) & 0xff); + buf[0] = (u8)(page & 0xFF); + buf[1] = (u8)((page >> 8) & 0xFF); + buf[2] = (u8)((page >> 16) & 0xFF); + buf[3] = (u8)((page >> 24) & 0xFF); bytes = 4; break; case RSMU_SABRE: diff --git a/drivers/mfd/ssbi.c b/drivers/mfd/ssbi.c index b0b0be483dbf..f849f2d34ec7 100644 --- a/drivers/mfd/ssbi.c +++ b/drivers/mfd/ssbi.c @@ -64,7 +64,6 @@ enum ssbi_controller_type { }; struct ssbi { - struct device *slave; void __iomem *base; spinlock_t lock; enum ssbi_controller_type controller_type; diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c index 07e5aa10a146..a41e9a3e2064 100644 --- a/drivers/mfd/timberdale.c +++ b/drivers/mfd/timberdale.c @@ -765,7 +765,6 @@ static int timb_probe(struct pci_dev *dev, default: dev_err(&dev->dev, "Unknown IP setup: %d.%d.%d\n", priv->fw.major, priv->fw.minor, ip_setup); - err = -ENODEV; goto err_mfd; } diff --git a/drivers/mfd/tps6594-core.c b/drivers/mfd/tps6594-core.c index 783ee59901e8..c59f3d7e32b0 100644 --- a/drivers/mfd/tps6594-core.c +++ b/drivers/mfd/tps6594-core.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Core functions for TI TPS6594/TPS6593/LP8764 PMICs + * Core functions for TI TPS65224/TPS6594/TPS6593/LP8764 PMICs * * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ */ @@ -278,16 +278,159 @@ static const unsigned int tps6594_irq_reg[] = { TPS6594_REG_RTC_STATUS, }; +/* TPS65224 Resources */ + +static const struct resource tps65224_regulator_resources[] = { + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BUCK1_UVOV, TPS65224_IRQ_NAME_BUCK1_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BUCK2_UVOV, TPS65224_IRQ_NAME_BUCK2_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BUCK3_UVOV, TPS65224_IRQ_NAME_BUCK3_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BUCK4_UVOV, TPS65224_IRQ_NAME_BUCK4_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_LDO1_UVOV, TPS65224_IRQ_NAME_LDO1_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_LDO2_UVOV, TPS65224_IRQ_NAME_LDO2_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_LDO3_UVOV, TPS65224_IRQ_NAME_LDO3_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_VCCA_UVOV, TPS65224_IRQ_NAME_VCCA_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_VMON1_UVOV, TPS65224_IRQ_NAME_VMON1_UVOV), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_VMON2_UVOV, TPS65224_IRQ_NAME_VMON2_UVOV), +}; + +static const struct resource tps65224_pinctrl_resources[] = { + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_GPIO1, TPS65224_IRQ_NAME_GPIO1), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_GPIO2, TPS65224_IRQ_NAME_GPIO2), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_GPIO3, TPS65224_IRQ_NAME_GPIO3), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_GPIO4, TPS65224_IRQ_NAME_GPIO4), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_GPIO5, TPS65224_IRQ_NAME_GPIO5), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_GPIO6, TPS65224_IRQ_NAME_GPIO6), +}; + +static const struct resource tps65224_pfsm_resources[] = { + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_VSENSE, TPS65224_IRQ_NAME_VSENSE), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_ENABLE, TPS65224_IRQ_NAME_ENABLE), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_PB_SHORT, TPS65224_IRQ_NAME_PB_SHORT), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_FSD, TPS65224_IRQ_NAME_FSD), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_SOFT_REBOOT, TPS65224_IRQ_NAME_SOFT_REBOOT), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BIST_PASS, TPS65224_IRQ_NAME_BIST_PASS), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_EXT_CLK, TPS65224_IRQ_NAME_EXT_CLK), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_REG_UNLOCK, TPS65224_IRQ_NAME_REG_UNLOCK), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_TWARN, TPS65224_IRQ_NAME_TWARN), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_PB_LONG, TPS65224_IRQ_NAME_PB_LONG), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_PB_FALL, TPS65224_IRQ_NAME_PB_FALL), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_PB_RISE, TPS65224_IRQ_NAME_PB_RISE), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_TSD_ORD, TPS65224_IRQ_NAME_TSD_ORD), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BIST_FAIL, TPS65224_IRQ_NAME_BIST_FAIL), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_REG_CRC_ERR, TPS65224_IRQ_NAME_REG_CRC_ERR), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_RECOV_CNT, TPS65224_IRQ_NAME_RECOV_CNT), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_TSD_IMM, TPS65224_IRQ_NAME_TSD_IMM), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_VCCA_OVP, TPS65224_IRQ_NAME_VCCA_OVP), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_PFSM_ERR, TPS65224_IRQ_NAME_PFSM_ERR), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_BG_XMON, TPS65224_IRQ_NAME_BG_XMON), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_IMM_SHUTDOWN, TPS65224_IRQ_NAME_IMM_SHUTDOWN), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_ORD_SHUTDOWN, TPS65224_IRQ_NAME_ORD_SHUTDOWN), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_MCU_PWR_ERR, TPS65224_IRQ_NAME_MCU_PWR_ERR), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_SOC_PWR_ERR, TPS65224_IRQ_NAME_SOC_PWR_ERR), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_COMM_ERR, TPS65224_IRQ_NAME_COMM_ERR), + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_I2C2_ERR, TPS65224_IRQ_NAME_I2C2_ERR), +}; + +static const struct resource tps65224_adc_resources[] = { + DEFINE_RES_IRQ_NAMED(TPS65224_IRQ_ADC_CONV_READY, TPS65224_IRQ_NAME_ADC_CONV_READY), +}; + +static const struct mfd_cell tps65224_common_cells[] = { + MFD_CELL_RES("tps65224-adc", tps65224_adc_resources), + MFD_CELL_RES("tps6594-pfsm", tps65224_pfsm_resources), + MFD_CELL_RES("tps6594-pinctrl", tps65224_pinctrl_resources), + MFD_CELL_RES("tps6594-regulator", tps65224_regulator_resources), +}; + +static const struct regmap_irq tps65224_irqs[] = { + /* INT_BUCK register */ + REGMAP_IRQ_REG(TPS65224_IRQ_BUCK1_UVOV, 0, TPS65224_BIT_BUCK1_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_BUCK2_UVOV, 0, TPS65224_BIT_BUCK2_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_BUCK3_UVOV, 0, TPS65224_BIT_BUCK3_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_BUCK4_UVOV, 0, TPS65224_BIT_BUCK4_UVOV_INT), + + /* INT_VMON_LDO register */ + REGMAP_IRQ_REG(TPS65224_IRQ_LDO1_UVOV, 1, TPS65224_BIT_LDO1_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_LDO2_UVOV, 1, TPS65224_BIT_LDO2_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_LDO3_UVOV, 1, TPS65224_BIT_LDO3_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_VCCA_UVOV, 1, TPS65224_BIT_VCCA_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_VMON1_UVOV, 1, TPS65224_BIT_VMON1_UVOV_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_VMON2_UVOV, 1, TPS65224_BIT_VMON2_UVOV_INT), + + /* INT_GPIO register */ + REGMAP_IRQ_REG(TPS65224_IRQ_GPIO1, 2, TPS65224_BIT_GPIO1_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_GPIO2, 2, TPS65224_BIT_GPIO2_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_GPIO3, 2, TPS65224_BIT_GPIO3_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_GPIO4, 2, TPS65224_BIT_GPIO4_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_GPIO5, 2, TPS65224_BIT_GPIO5_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_GPIO6, 2, TPS65224_BIT_GPIO6_INT), + + /* INT_STARTUP register */ + REGMAP_IRQ_REG(TPS65224_IRQ_VSENSE, 3, TPS65224_BIT_VSENSE_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_ENABLE, 3, TPS6594_BIT_ENABLE_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_PB_SHORT, 3, TPS65224_BIT_PB_SHORT_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_FSD, 3, TPS6594_BIT_FSD_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_SOFT_REBOOT, 3, TPS6594_BIT_SOFT_REBOOT_INT), + + /* INT_MISC register */ + REGMAP_IRQ_REG(TPS65224_IRQ_BIST_PASS, 4, TPS6594_BIT_BIST_PASS_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_EXT_CLK, 4, TPS6594_BIT_EXT_CLK_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_REG_UNLOCK, 4, TPS65224_BIT_REG_UNLOCK_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_TWARN, 4, TPS6594_BIT_TWARN_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_PB_LONG, 4, TPS65224_BIT_PB_LONG_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_PB_FALL, 4, TPS65224_BIT_PB_FALL_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_PB_RISE, 4, TPS65224_BIT_PB_RISE_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_ADC_CONV_READY, 4, TPS65224_BIT_ADC_CONV_READY_INT), + + /* INT_MODERATE_ERR register */ + REGMAP_IRQ_REG(TPS65224_IRQ_TSD_ORD, 5, TPS6594_BIT_TSD_ORD_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_BIST_FAIL, 5, TPS6594_BIT_BIST_FAIL_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_REG_CRC_ERR, 5, TPS6594_BIT_REG_CRC_ERR_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_RECOV_CNT, 5, TPS6594_BIT_RECOV_CNT_INT), + + /* INT_SEVERE_ERR register */ + REGMAP_IRQ_REG(TPS65224_IRQ_TSD_IMM, 6, TPS6594_BIT_TSD_IMM_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_VCCA_OVP, 6, TPS6594_BIT_VCCA_OVP_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_PFSM_ERR, 6, TPS6594_BIT_PFSM_ERR_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_BG_XMON, 6, TPS65224_BIT_BG_XMON_INT), + + /* INT_FSM_ERR register */ + REGMAP_IRQ_REG(TPS65224_IRQ_IMM_SHUTDOWN, 7, TPS6594_BIT_IMM_SHUTDOWN_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_ORD_SHUTDOWN, 7, TPS6594_BIT_ORD_SHUTDOWN_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_MCU_PWR_ERR, 7, TPS6594_BIT_MCU_PWR_ERR_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_SOC_PWR_ERR, 7, TPS6594_BIT_SOC_PWR_ERR_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_COMM_ERR, 7, TPS6594_BIT_COMM_ERR_INT), + REGMAP_IRQ_REG(TPS65224_IRQ_I2C2_ERR, 7, TPS65224_BIT_I2C2_ERR_INT), +}; + +static const unsigned int tps65224_irq_reg[] = { + TPS6594_REG_INT_BUCK, + TPS6594_REG_INT_LDO_VMON, + TPS6594_REG_INT_GPIO, + TPS6594_REG_INT_STARTUP, + TPS6594_REG_INT_MISC, + TPS6594_REG_INT_MODERATE_ERR, + TPS6594_REG_INT_SEVERE_ERR, + TPS6594_REG_INT_FSM_ERR, +}; + static inline unsigned int tps6594_get_irq_reg(struct regmap_irq_chip_data *data, unsigned int base, int index) { return tps6594_irq_reg[index]; }; +static inline unsigned int tps65224_get_irq_reg(struct regmap_irq_chip_data *data, + unsigned int base, int index) +{ + return tps65224_irq_reg[index]; +}; + static int tps6594_handle_post_irq(void *irq_drv_data) { struct tps6594 *tps = irq_drv_data; int ret = 0; + unsigned int regmap_reg, mask_val; /* * When CRC is enabled, writing to a read-only bit triggers an error, @@ -299,10 +442,17 @@ static int tps6594_handle_post_irq(void *irq_drv_data) * COMM_ADR_ERR_INT bit set. Clear immediately this bit to avoid raising * a new interrupt. */ - if (tps->use_crc) - ret = regmap_write_bits(tps->regmap, TPS6594_REG_INT_COMM_ERR, - TPS6594_BIT_COMM_ADR_ERR_INT, - TPS6594_BIT_COMM_ADR_ERR_INT); + if (tps->use_crc) { + if (tps->chip_id == TPS65224) { + regmap_reg = TPS6594_REG_INT_FSM_ERR; + mask_val = TPS6594_BIT_COMM_ERR_INT; + } else { + regmap_reg = TPS6594_REG_INT_COMM_ERR; + mask_val = TPS6594_BIT_COMM_ADR_ERR_INT; + } + + ret = regmap_write_bits(tps->regmap, regmap_reg, mask_val, mask_val); + } return ret; }; @@ -319,24 +469,58 @@ static struct regmap_irq_chip tps6594_irq_chip = { .handle_post_irq = tps6594_handle_post_irq, }; -bool tps6594_is_volatile_reg(struct device *dev, unsigned int reg) -{ - return (reg >= TPS6594_REG_INT_TOP && reg <= TPS6594_REG_STAT_READBACK_ERR) || - reg == TPS6594_REG_RTC_STATUS; -} -EXPORT_SYMBOL_GPL(tps6594_is_volatile_reg); +static struct regmap_irq_chip tps65224_irq_chip = { + .ack_base = TPS6594_REG_INT_BUCK, + .ack_invert = 1, + .clear_ack = 1, + .init_ack_masked = 1, + .num_regs = ARRAY_SIZE(tps65224_irq_reg), + .irqs = tps65224_irqs, + .num_irqs = ARRAY_SIZE(tps65224_irqs), + .get_irq_reg = tps65224_get_irq_reg, + .handle_post_irq = tps6594_handle_post_irq, +}; + +static const struct regmap_range tps6594_volatile_ranges[] = { + regmap_reg_range(TPS6594_REG_INT_TOP, TPS6594_REG_STAT_READBACK_ERR), + regmap_reg_range(TPS6594_REG_RTC_STATUS, TPS6594_REG_RTC_STATUS), +}; + +const struct regmap_access_table tps6594_volatile_table = { + .yes_ranges = tps6594_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(tps6594_volatile_ranges), +}; +EXPORT_SYMBOL_GPL(tps6594_volatile_table); + +static const struct regmap_range tps65224_volatile_ranges[] = { + regmap_reg_range(TPS6594_REG_INT_TOP, TPS6594_REG_STAT_SEVERE_ERR), +}; + +const struct regmap_access_table tps65224_volatile_table = { + .yes_ranges = tps65224_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(tps65224_volatile_ranges), +}; +EXPORT_SYMBOL_GPL(tps65224_volatile_table); static int tps6594_check_crc_mode(struct tps6594 *tps, bool primary_pmic) { int ret; + unsigned int regmap_reg, mask_val; + + if (tps->chip_id == TPS65224) { + regmap_reg = TPS6594_REG_CONFIG_2; + mask_val = TPS65224_BIT_I2C1_SPI_CRC_EN; + } else { + regmap_reg = TPS6594_REG_SERIAL_IF_CONFIG; + mask_val = TPS6594_BIT_I2C1_SPI_CRC_EN; + }; /* * Check if CRC is enabled. * Once CRC is enabled, it can't be disabled until next power cycle. */ tps->use_crc = true; - ret = regmap_test_bits(tps->regmap, TPS6594_REG_SERIAL_IF_CONFIG, - TPS6594_BIT_I2C1_SPI_CRC_EN); + ret = regmap_test_bits(tps->regmap, regmap_reg, mask_val); if (ret == 0) { ret = -EIO; } else if (ret > 0) { @@ -351,6 +535,15 @@ static int tps6594_check_crc_mode(struct tps6594 *tps, bool primary_pmic) static int tps6594_set_crc_feature(struct tps6594 *tps) { int ret; + unsigned int regmap_reg, mask_val; + + if (tps->chip_id == TPS65224) { + regmap_reg = TPS6594_REG_CONFIG_2; + mask_val = TPS65224_BIT_I2C1_SPI_CRC_EN; + } else { + regmap_reg = TPS6594_REG_FSM_I2C_TRIGGERS; + mask_val = TPS6594_BIT_TRIGGER_I2C(2); + } ret = tps6594_check_crc_mode(tps, true); if (ret) { @@ -359,8 +552,7 @@ static int tps6594_set_crc_feature(struct tps6594 *tps) * on primary PMIC. */ tps->use_crc = false; - ret = regmap_write_bits(tps->regmap, TPS6594_REG_FSM_I2C_TRIGGERS, - TPS6594_BIT_TRIGGER_I2C(2), TPS6594_BIT_TRIGGER_I2C(2)); + ret = regmap_write_bits(tps->regmap, regmap_reg, mask_val, mask_val); if (ret) return ret; @@ -416,6 +608,9 @@ int tps6594_device_init(struct tps6594 *tps, bool enable_crc) { struct device *dev = tps->dev; int ret; + struct regmap_irq_chip *irq_chip; + const struct mfd_cell *cells; + int n_cells; if (enable_crc) { ret = tps6594_enable_crc(tps); @@ -429,26 +624,35 @@ int tps6594_device_init(struct tps6594 *tps, bool enable_crc) if (ret) return dev_err_probe(dev, ret, "Failed to set PMIC state\n"); - tps6594_irq_chip.irq_drv_data = tps; - tps6594_irq_chip.name = devm_kasprintf(dev, GFP_KERNEL, "%s-%ld-0x%02x", - dev->driver->name, tps->chip_id, tps->reg); + if (tps->chip_id == TPS65224) { + irq_chip = &tps65224_irq_chip; + n_cells = ARRAY_SIZE(tps65224_common_cells); + cells = tps65224_common_cells; + } else { + irq_chip = &tps6594_irq_chip; + n_cells = ARRAY_SIZE(tps6594_common_cells); + cells = tps6594_common_cells; + } + + irq_chip->irq_drv_data = tps; + irq_chip->name = devm_kasprintf(dev, GFP_KERNEL, "%s-%ld-0x%02x", + dev->driver->name, tps->chip_id, tps->reg); - if (!tps6594_irq_chip.name) + if (!irq_chip->name) return -ENOMEM; ret = devm_regmap_add_irq_chip(dev, tps->regmap, tps->irq, IRQF_SHARED | IRQF_ONESHOT, - 0, &tps6594_irq_chip, &tps->irq_data); + 0, irq_chip, &tps->irq_data); if (ret) return dev_err_probe(dev, ret, "Failed to add regmap IRQ\n"); - ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, tps6594_common_cells, - ARRAY_SIZE(tps6594_common_cells), NULL, 0, + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, n_cells, NULL, 0, regmap_irq_get_domain(tps->irq_data)); if (ret) return dev_err_probe(dev, ret, "Failed to add common child devices\n"); - /* No RTC for LP8764 */ - if (tps->chip_id != LP8764) { + /* No RTC for LP8764 and TPS65224 */ + if (tps->chip_id != LP8764 && tps->chip_id != TPS65224) { ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, tps6594_rtc_cells, ARRAY_SIZE(tps6594_rtc_cells), NULL, 0, regmap_irq_get_domain(tps->irq_data)); @@ -461,5 +665,6 @@ int tps6594_device_init(struct tps6594 *tps, bool enable_crc) EXPORT_SYMBOL_GPL(tps6594_device_init); MODULE_AUTHOR("Julien Panis <jpanis@baylibre.com>"); +MODULE_AUTHOR("Bhargav Raviprakash <bhargav.r@ltts.com"); MODULE_DESCRIPTION("TPS6594 Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/tps6594-i2c.c b/drivers/mfd/tps6594-i2c.c index 899c88c0fe77..4ab91c34d9fb 100644 --- a/drivers/mfd/tps6594-i2c.c +++ b/drivers/mfd/tps6594-i2c.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * I2C access driver for TI TPS6594/TPS6593/LP8764 PMICs + * I2C access driver for TI TPS65224/TPS6594/TPS6593/LP8764 PMICs * * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ */ @@ -183,11 +183,11 @@ static int tps6594_i2c_write(void *context, const void *data, size_t count) return ret; } -static const struct regmap_config tps6594_i2c_regmap_config = { +static struct regmap_config tps6594_i2c_regmap_config = { .reg_bits = 16, .val_bits = 8, .max_register = TPS6594_REG_DWD_FAIL_CNT_REG, - .volatile_reg = tps6594_is_volatile_reg, + .volatile_table = &tps6594_volatile_table, .read = tps6594_i2c_read, .write = tps6594_i2c_write, }; @@ -196,6 +196,7 @@ static const struct of_device_id tps6594_i2c_of_match_table[] = { { .compatible = "ti,tps6594-q1", .data = (void *)TPS6594, }, { .compatible = "ti,tps6593-q1", .data = (void *)TPS6593, }, { .compatible = "ti,lp8764-q1", .data = (void *)LP8764, }, + { .compatible = "ti,tps65224-q1", .data = (void *)TPS65224, }, {} }; MODULE_DEVICE_TABLE(of, tps6594_i2c_of_match_table); @@ -216,15 +217,18 @@ static int tps6594_i2c_probe(struct i2c_client *client) tps->reg = client->addr; tps->irq = client->irq; - tps->regmap = devm_regmap_init(dev, NULL, client, &tps6594_i2c_regmap_config); - if (IS_ERR(tps->regmap)) - return dev_err_probe(dev, PTR_ERR(tps->regmap), "Failed to init regmap\n"); - match = of_match_device(tps6594_i2c_of_match_table, dev); if (!match) return dev_err_probe(dev, -EINVAL, "Failed to find matching chip ID\n"); tps->chip_id = (unsigned long)match->data; + if (tps->chip_id == TPS65224) + tps6594_i2c_regmap_config.volatile_table = &tps65224_volatile_table; + + tps->regmap = devm_regmap_init(dev, NULL, client, &tps6594_i2c_regmap_config); + if (IS_ERR(tps->regmap)) + return dev_err_probe(dev, PTR_ERR(tps->regmap), "Failed to init regmap\n"); + crc8_populate_msb(tps6594_i2c_crc_table, TPS6594_CRC8_POLYNOMIAL); return tps6594_device_init(tps, enable_crc); @@ -240,5 +244,5 @@ static struct i2c_driver tps6594_i2c_driver = { module_i2c_driver(tps6594_i2c_driver); MODULE_AUTHOR("Julien Panis <jpanis@baylibre.com>"); -MODULE_DESCRIPTION("TPS6594 I2C Interface Driver"); +MODULE_DESCRIPTION("I2C Interface Driver for TPS65224, TPS6594/3, and LP8764"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/tps6594-spi.c b/drivers/mfd/tps6594-spi.c index 24b72847e3f5..6ebccb79f0cc 100644 --- a/drivers/mfd/tps6594-spi.c +++ b/drivers/mfd/tps6594-spi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * SPI access driver for TI TPS6594/TPS6593/LP8764 PMICs + * SPI access driver for TI TPS65224/TPS6594/TPS6593/LP8764 PMICs * * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ */ @@ -66,11 +66,11 @@ static int tps6594_spi_reg_write(void *context, unsigned int reg, unsigned int v return spi_write(spi, buf, count); } -static const struct regmap_config tps6594_spi_regmap_config = { +static struct regmap_config tps6594_spi_regmap_config = { .reg_bits = 16, .val_bits = 8, .max_register = TPS6594_REG_DWD_FAIL_CNT_REG, - .volatile_reg = tps6594_is_volatile_reg, + .volatile_table = &tps6594_volatile_table, .reg_read = tps6594_spi_reg_read, .reg_write = tps6594_spi_reg_write, .use_single_read = true, @@ -81,6 +81,7 @@ static const struct of_device_id tps6594_spi_of_match_table[] = { { .compatible = "ti,tps6594-q1", .data = (void *)TPS6594, }, { .compatible = "ti,tps6593-q1", .data = (void *)TPS6593, }, { .compatible = "ti,lp8764-q1", .data = (void *)LP8764, }, + { .compatible = "ti,tps65224-q1", .data = (void *)TPS65224, }, {} }; MODULE_DEVICE_TABLE(of, tps6594_spi_of_match_table); @@ -101,15 +102,18 @@ static int tps6594_spi_probe(struct spi_device *spi) tps->reg = spi_get_chipselect(spi, 0); tps->irq = spi->irq; - tps->regmap = devm_regmap_init(dev, NULL, spi, &tps6594_spi_regmap_config); - if (IS_ERR(tps->regmap)) - return dev_err_probe(dev, PTR_ERR(tps->regmap), "Failed to init regmap\n"); - match = of_match_device(tps6594_spi_of_match_table, dev); if (!match) return dev_err_probe(dev, -EINVAL, "Failed to find matching chip ID\n"); tps->chip_id = (unsigned long)match->data; + if (tps->chip_id == TPS65224) + tps6594_spi_regmap_config.volatile_table = &tps65224_volatile_table; + + tps->regmap = devm_regmap_init(dev, NULL, spi, &tps6594_spi_regmap_config); + if (IS_ERR(tps->regmap)) + return dev_err_probe(dev, PTR_ERR(tps->regmap), "Failed to init regmap\n"); + crc8_populate_msb(tps6594_spi_crc_table, TPS6594_CRC8_POLYNOMIAL); return tps6594_device_init(tps, enable_crc); @@ -125,5 +129,5 @@ static struct spi_driver tps6594_spi_driver = { module_spi_driver(tps6594_spi_driver); MODULE_AUTHOR("Julien Panis <jpanis@baylibre.com>"); -MODULE_DESCRIPTION("TPS6594 SPI Interface Driver"); +MODULE_DESCRIPTION("SPI Interface Driver for TPS65224, TPS6594/3, and LP8764"); MODULE_LICENSE("GPL"); diff --git a/drivers/misc/tps6594-pfsm.c b/drivers/misc/tps6594-pfsm.c index 88dcac814892..9bcca1856bfe 100644 --- a/drivers/misc/tps6594-pfsm.c +++ b/drivers/misc/tps6594-pfsm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * PFSM (Pre-configurable Finite State Machine) driver for TI TPS6594/TPS6593/LP8764 PMICs + * PFSM (Pre-configurable Finite State Machine) driver for TI TPS65224/TPS6594/TPS6593/LP8764 PMICs * * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ */ @@ -39,10 +39,12 @@ * * @miscdev: misc device infos * @regmap: regmap for accessing the device registers + * @chip_id: chip identifier of the device */ struct tps6594_pfsm { struct miscdevice miscdev; struct regmap *regmap; + unsigned long chip_id; }; static ssize_t tps6594_pfsm_read(struct file *f, char __user *buf, @@ -133,21 +135,29 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a struct tps6594_pfsm *pfsm = TPS6594_FILE_TO_PFSM(f); struct pmic_state_opt state_opt; void __user *argp = (void __user *)arg; + unsigned int regmap_reg, mask; int ret = -ENOIOCTLCMD; switch (cmd) { case PMIC_GOTO_STANDBY: - /* Disable LP mode */ - ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, - TPS6594_BIT_LP_STANDBY_SEL); - if (ret) - return ret; + /* Disable LP mode on TPS6594 Family PMIC */ + if (pfsm->chip_id != TPS65224) { + ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, + TPS6594_BIT_LP_STANDBY_SEL); + + if (ret) + return ret; + } /* Force trigger */ ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_FSM_I2C_TRIGGERS, TPS6594_BIT_TRIGGER_I2C(0), TPS6594_BIT_TRIGGER_I2C(0)); break; case PMIC_GOTO_LP_STANDBY: + /* TPS65224 does not support LP STANDBY */ + if (pfsm->chip_id == TPS65224) + return ret; + /* Enable LP mode */ ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, TPS6594_BIT_LP_STANDBY_SEL); @@ -169,6 +179,10 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a TPS6594_BIT_NSLEEP1B | TPS6594_BIT_NSLEEP2B); break; case PMIC_SET_MCU_ONLY_STATE: + /* TPS65224 does not support MCU_ONLY_STATE */ + if (pfsm->chip_id == TPS65224) + return ret; + if (copy_from_user(&state_opt, argp, sizeof(state_opt))) return -EFAULT; @@ -192,14 +206,20 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a return -EFAULT; /* Configure wake-up destination */ + if (pfsm->chip_id == TPS65224) { + regmap_reg = TPS65224_REG_STARTUP_CTRL; + mask = TPS65224_MASK_STARTUP_DEST; + } else { + regmap_reg = TPS6594_REG_RTC_CTRL_2; + mask = TPS6594_MASK_STARTUP_DEST; + } + if (state_opt.mcu_only_startup_dest) - ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, - TPS6594_MASK_STARTUP_DEST, - TPS6594_STARTUP_DEST_MCU_ONLY); + ret = regmap_write_bits(pfsm->regmap, regmap_reg, + mask, TPS6594_STARTUP_DEST_MCU_ONLY); else - ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, - TPS6594_MASK_STARTUP_DEST, - TPS6594_STARTUP_DEST_ACTIVE); + ret = regmap_write_bits(pfsm->regmap, regmap_reg, + mask, TPS6594_STARTUP_DEST_ACTIVE); if (ret) return ret; @@ -211,7 +231,8 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a /* Modify NSLEEP1-2 bits */ ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS, - TPS6594_BIT_NSLEEP2B); + pfsm->chip_id == TPS65224 ? + TPS6594_BIT_NSLEEP1B : TPS6594_BIT_NSLEEP2B); break; } @@ -262,6 +283,7 @@ static int tps6594_pfsm_probe(struct platform_device *pdev) tps->chip_id, tps->reg); pfsm->miscdev.fops = &tps6594_pfsm_fops; pfsm->miscdev.parent = dev->parent; + pfsm->chip_id = tps->chip_id; for (i = 0 ; i < pdev->num_resources ; i++) { irq = platform_get_irq_byname(pdev, pdev->resource[i].name); diff --git a/drivers/pinctrl/pinctrl-rk805.c b/drivers/pinctrl/pinctrl-rk805.c index 56d916f2cee6..c42f1bf93404 100644 --- a/drivers/pinctrl/pinctrl-rk805.c +++ b/drivers/pinctrl/pinctrl-rk805.c @@ -93,6 +93,11 @@ enum rk806_pinmux_option { RK806_PINMUX_FUN5, }; +enum rk816_pinmux_option { + RK816_PINMUX_THERMISTOR, + RK816_PINMUX_GPIO, +}; + enum { RK805_GPIO0, RK805_GPIO1, @@ -104,6 +109,10 @@ enum { RK806_GPIO_DVS3 }; +enum { + RK816_GPIO0, +}; + static const char *const rk805_gpio_groups[] = { "gpio0", "gpio1", @@ -115,6 +124,10 @@ static const char *const rk806_gpio_groups[] = { "gpio_pwrctrl3", }; +static const char *const rk816_gpio_groups[] = { + "gpio0", +}; + /* RK805: 2 output only GPIOs */ static const struct pinctrl_pin_desc rk805_pins_desc[] = { PINCTRL_PIN(RK805_GPIO0, "gpio0"), @@ -128,6 +141,11 @@ static const struct pinctrl_pin_desc rk806_pins_desc[] = { PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"), }; +/* RK816 */ +static const struct pinctrl_pin_desc rk816_pins_desc[] = { + PINCTRL_PIN(RK816_GPIO0, "gpio0"), +}; + static const struct rk805_pin_function rk805_pin_functions[] = { { .name = "gpio", @@ -176,6 +194,21 @@ static const struct rk805_pin_function rk806_pin_functions[] = { }, }; +static const struct rk805_pin_function rk816_pin_functions[] = { + { + .name = "gpio", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK816_PINMUX_GPIO, + }, + { + .name = "thermistor", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK816_PINMUX_THERMISTOR, + }, +}; + static const struct rk805_pin_group rk805_pin_groups[] = { { .name = "gpio0", @@ -207,6 +240,14 @@ static const struct rk805_pin_group rk806_pin_groups[] = { } }; +static const struct rk805_pin_group rk816_pin_groups[] = { + { + .name = "gpio0", + .pins = { RK816_GPIO0 }, + .npins = 1, + }, +}; + #define RK805_GPIO0_VAL_MSK BIT(0) #define RK805_GPIO1_VAL_MSK BIT(1) @@ -255,6 +296,20 @@ static struct rk805_pin_config rk806_gpio_cfgs[] = { } }; +#define RK816_FUN_MASK BIT(2) +#define RK816_VAL_MASK BIT(3) +#define RK816_DIR_MASK BIT(4) + +static struct rk805_pin_config rk816_gpio_cfgs[] = { + { + .fun_reg = RK818_IO_POL_REG, + .fun_msk = RK816_FUN_MASK, + .reg = RK818_IO_POL_REG, + .val_msk = RK816_VAL_MASK, + .dir_msk = RK816_DIR_MASK, + }, +}; + /* generic gpio chip */ static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) { @@ -439,6 +494,8 @@ static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO); case RK806_ID: return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5); + case RK816_ID: + return _rk805_pinctrl_set_mux(pctldev, offset, RK816_PINMUX_GPIO); } return -ENOTSUPP; @@ -588,6 +645,18 @@ static int rk805_pinctrl_probe(struct platform_device *pdev) pci->pin_cfg = rk806_gpio_cfgs; pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs); break; + case RK816_ID: + pci->pins = rk816_pins_desc; + pci->num_pins = ARRAY_SIZE(rk816_pins_desc); + pci->functions = rk816_pin_functions; + pci->num_functions = ARRAY_SIZE(rk816_pin_functions); + pci->groups = rk816_pin_groups; + pci->num_pin_groups = ARRAY_SIZE(rk816_pin_groups); + pci->pinctrl_desc.pins = rk816_pins_desc; + pci->pinctrl_desc.npins = ARRAY_SIZE(rk816_pins_desc); + pci->pin_cfg = rk816_gpio_cfgs; + pci->gpio_chip.ngpio = ARRAY_SIZE(rk816_gpio_cfgs); + break; default: dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", pci->rk808->variant); diff --git a/drivers/pinctrl/pinctrl-tps6594.c b/drivers/pinctrl/pinctrl-tps6594.c index 66985e54b74a..085047320853 100644 --- a/drivers/pinctrl/pinctrl-tps6594.c +++ b/drivers/pinctrl/pinctrl-tps6594.c @@ -14,8 +14,6 @@ #include <linux/mfd/tps6594.h> -#define TPS6594_PINCTRL_PINS_NB 11 - #define TPS6594_PINCTRL_GPIO_FUNCTION 0 #define TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1 #define TPS6594_PINCTRL_TRIG_WDOG_FUNCTION 1 @@ -40,17 +38,40 @@ #define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8 3 #define TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9 3 +/* TPS65224 pin muxval */ +#define TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 1 +#define TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1 +#define TPS65224_PINCTRL_VMON1_FUNCTION 1 +#define TPS65224_PINCTRL_VMON2_FUNCTION 1 +#define TPS65224_PINCTRL_WKUP_FUNCTION 1 +#define TPS65224_PINCTRL_NSLEEP2_FUNCTION 2 +#define TPS65224_PINCTRL_NSLEEP1_FUNCTION 2 +#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION 2 +#define TPS65224_PINCTRL_NERR_MCU_FUNCTION 2 +#define TPS65224_PINCTRL_NINT_FUNCTION 3 +#define TPS65224_PINCTRL_TRIG_WDOG_FUNCTION 3 +#define TPS65224_PINCTRL_PB_FUNCTION 3 +#define TPS65224_PINCTRL_ADC_IN_FUNCTION 3 + +/* TPS65224 Special muxval for recalcitrant pins */ +#define TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5 1 +#define TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5 4 +#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5 3 + #define TPS6594_OFFSET_GPIO_SEL 5 -#define FUNCTION(fname, v) \ +#define TPS65224_NGPIO_PER_REG 6 +#define TPS6594_NGPIO_PER_REG 8 + +#define FUNCTION(dev_name, fname, v) \ { \ .pinfunction = PINCTRL_PINFUNCTION(#fname, \ - tps6594_##fname##_func_group_names, \ - ARRAY_SIZE(tps6594_##fname##_func_group_names)),\ + dev_name##_##fname##_func_group_names, \ + ARRAY_SIZE(dev_name##_##fname##_func_group_names)),\ .muxval = v, \ } -static const struct pinctrl_pin_desc tps6594_pins[TPS6594_PINCTRL_PINS_NB] = { +static const struct pinctrl_pin_desc tps6594_pins[] = { PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"), PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"), PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"), @@ -143,30 +164,127 @@ static const char *const tps6594_syncclkin_func_group_names[] = { "GPIO9", }; +static const struct pinctrl_pin_desc tps65224_pins[] = { + PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"), + PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"), + PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"), +}; + +static const char *const tps65224_gpio_func_group_names[] = { + "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", +}; + +static const char *const tps65224_sda_i2c2_sdo_spi_func_group_names[] = { + "GPIO0", +}; + +static const char *const tps65224_nsleep2_func_group_names[] = { + "GPIO0", "GPIO5", +}; + +static const char *const tps65224_nint_func_group_names[] = { + "GPIO0", +}; + +static const char *const tps65224_scl_i2c2_cs_spi_func_group_names[] = { + "GPIO1", +}; + +static const char *const tps65224_nsleep1_func_group_names[] = { + "GPIO1", "GPIO2", "GPIO3", +}; + +static const char *const tps65224_trig_wdog_func_group_names[] = { + "GPIO1", +}; + +static const char *const tps65224_vmon1_func_group_names[] = { + "GPIO2", +}; + +static const char *const tps65224_pb_func_group_names[] = { + "GPIO2", +}; + +static const char *const tps65224_vmon2_func_group_names[] = { + "GPIO3", +}; + +static const char *const tps65224_adc_in_func_group_names[] = { + "GPIO3", "GPIO4", +}; + +static const char *const tps65224_wkup_func_group_names[] = { + "GPIO4", "GPIO5", +}; + +static const char *const tps65224_syncclkin_func_group_names[] = { + "GPIO4", "GPIO5", +}; + +static const char *const tps65224_nerr_mcu_func_group_names[] = { + "GPIO5", +}; + struct tps6594_pinctrl_function { struct pinfunction pinfunction; u8 muxval; }; +struct muxval_remap { + unsigned int group; + u8 muxval; + u8 remap; +}; + +struct muxval_remap tps65224_muxval_remap[] = { + {5, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5}, + {5, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5}, + {5, TPS65224_PINCTRL_NSLEEP2_FUNCTION, TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5}, +}; + +struct muxval_remap tps6594_muxval_remap[] = { + {8, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8}, + {8, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8}, + {9, TPS6594_PINCTRL_CLK32KOUT_FUNCTION, TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9}, +}; + static const struct tps6594_pinctrl_function pinctrl_functions[] = { - FUNCTION(gpio, TPS6594_PINCTRL_GPIO_FUNCTION), - FUNCTION(nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION), - FUNCTION(nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION), - FUNCTION(wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION), - FUNCTION(wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION), - FUNCTION(scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), - FUNCTION(nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION), - FUNCTION(trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION), - FUNCTION(sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), - FUNCTION(clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION), - FUNCTION(nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION), - FUNCTION(sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION), - FUNCTION(sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION), - FUNCTION(nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION), - FUNCTION(syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION), - FUNCTION(disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION), - FUNCTION(pdog, TPS6594_PINCTRL_PDOG_FUNCTION), - FUNCTION(syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION), + FUNCTION(tps6594, gpio, TPS6594_PINCTRL_GPIO_FUNCTION), + FUNCTION(tps6594, nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION), + FUNCTION(tps6594, nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION), + FUNCTION(tps6594, wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION), + FUNCTION(tps6594, wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION), + FUNCTION(tps6594, scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), + FUNCTION(tps6594, nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION), + FUNCTION(tps6594, trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION), + FUNCTION(tps6594, sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), + FUNCTION(tps6594, clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION), + FUNCTION(tps6594, nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION), + FUNCTION(tps6594, sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION), + FUNCTION(tps6594, sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION), + FUNCTION(tps6594, nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION), + FUNCTION(tps6594, syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION), + FUNCTION(tps6594, disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION), + FUNCTION(tps6594, pdog, TPS6594_PINCTRL_PDOG_FUNCTION), + FUNCTION(tps6594, syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION), +}; + +static const struct tps6594_pinctrl_function tps65224_pinctrl_functions[] = { + FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION), + FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), + FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION), + FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION), + FUNCTION(tps65224, scl_i2c2_cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), + FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION), + FUNCTION(tps65224, trig_wdog, TPS65224_PINCTRL_TRIG_WDOG_FUNCTION), + FUNCTION(tps65224, vmon1, TPS65224_PINCTRL_VMON1_FUNCTION), + FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION), + FUNCTION(tps65224, vmon2, TPS65224_PINCTRL_VMON2_FUNCTION), + FUNCTION(tps65224, adc_in, TPS65224_PINCTRL_ADC_IN_FUNCTION), + FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION), + FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION), + FUNCTION(tps65224, nerr_mcu, TPS65224_PINCTRL_NERR_MCU_FUNCTION), }; struct tps6594_pinctrl { @@ -175,6 +293,31 @@ struct tps6594_pinctrl { struct pinctrl_dev *pctl_dev; const struct tps6594_pinctrl_function *funcs; const struct pinctrl_pin_desc *pins; + int func_cnt; + int num_pins; + u8 mux_sel_mask; + unsigned int remap_cnt; + struct muxval_remap *remap; +}; + +static struct tps6594_pinctrl tps65224_template_pinctrl = { + .funcs = tps65224_pinctrl_functions, + .func_cnt = ARRAY_SIZE(tps65224_pinctrl_functions), + .pins = tps65224_pins, + .num_pins = ARRAY_SIZE(tps65224_pins), + .mux_sel_mask = TPS65224_MASK_GPIO_SEL, + .remap = tps65224_muxval_remap, + .remap_cnt = ARRAY_SIZE(tps65224_muxval_remap), +}; + +static struct tps6594_pinctrl tps6594_template_pinctrl = { + .funcs = pinctrl_functions, + .func_cnt = ARRAY_SIZE(pinctrl_functions), + .pins = tps6594_pins, + .num_pins = ARRAY_SIZE(tps6594_pins), + .mux_sel_mask = TPS6594_MASK_GPIO_SEL, + .remap = tps6594_muxval_remap, + .remap_cnt = ARRAY_SIZE(tps6594_muxval_remap), }; static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio, @@ -201,7 +344,9 @@ static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio, static int tps6594_pmx_func_cnt(struct pinctrl_dev *pctldev) { - return ARRAY_SIZE(pinctrl_functions); + struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); + + return pinctrl->func_cnt; } static const char *tps6594_pmx_func_name(struct pinctrl_dev *pctldev, @@ -229,10 +374,16 @@ static int tps6594_pmx_set(struct tps6594_pinctrl *pinctrl, unsigned int pin, u8 muxval) { u8 mux_sel_val = muxval << TPS6594_OFFSET_GPIO_SEL; + u8 mux_sel_mask = pinctrl->mux_sel_mask; + + if (pinctrl->tps->chip_id == TPS65224 && pin == 5) { + /* GPIO6 has a different mask in TPS65224*/ + mux_sel_mask = TPS65224_MASK_GPIO_SEL_GPIO6; + } return regmap_update_bits(pinctrl->tps->regmap, TPS6594_REG_GPIOX_CONF(pin), - TPS6594_MASK_GPIO_SEL, mux_sel_val); + mux_sel_mask, mux_sel_val); } static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev, @@ -240,16 +391,14 @@ static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev, { struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); u8 muxval = pinctrl->funcs[function].muxval; - - /* Some pins don't have the same muxval for the same function... */ - if (group == 8) { - if (muxval == TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION) - muxval = TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8; - else if (muxval == TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION) - muxval = TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8; - } else if (group == 9) { - if (muxval == TPS6594_PINCTRL_CLK32KOUT_FUNCTION) - muxval = TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9; + unsigned int remap_cnt = pinctrl->remap_cnt; + struct muxval_remap *remap = pinctrl->remap; + + for (unsigned int i = 0; i < remap_cnt; i++) { + if (group == remap[i].group && muxval == remap[i].muxval) { + muxval = remap[i].remap; + break; + } } return tps6594_pmx_set(pinctrl, group, muxval); @@ -276,7 +425,9 @@ static const struct pinmux_ops tps6594_pmx_ops = { static int tps6594_groups_cnt(struct pinctrl_dev *pctldev) { - return ARRAY_SIZE(tps6594_pins); + struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); + + return pinctrl->num_pins; } static int tps6594_group_pins(struct pinctrl_dev *pctldev, @@ -318,33 +469,54 @@ static int tps6594_pinctrl_probe(struct platform_device *pdev) pctrl_desc = devm_kzalloc(dev, sizeof(*pctrl_desc), GFP_KERNEL); if (!pctrl_desc) return -ENOMEM; - pctrl_desc->name = dev_name(dev); - pctrl_desc->owner = THIS_MODULE; - pctrl_desc->pins = tps6594_pins; - pctrl_desc->npins = ARRAY_SIZE(tps6594_pins); - pctrl_desc->pctlops = &tps6594_pctrl_ops; - pctrl_desc->pmxops = &tps6594_pmx_ops; pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL); if (!pinctrl) return -ENOMEM; - pinctrl->tps = dev_get_drvdata(dev->parent); - pinctrl->funcs = pinctrl_functions; - pinctrl->pins = tps6594_pins; - pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl); - if (IS_ERR(pinctrl->pctl_dev)) - return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev), - "Couldn't register pinctrl driver\n"); + + switch (tps->chip_id) { + case TPS65224: + pctrl_desc->pins = tps65224_pins; + pctrl_desc->npins = ARRAY_SIZE(tps65224_pins); + + *pinctrl = tps65224_template_pinctrl; + + config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names); + config.ngpio_per_reg = TPS65224_NGPIO_PER_REG; + break; + case TPS6593: + case TPS6594: + pctrl_desc->pins = tps6594_pins; + pctrl_desc->npins = ARRAY_SIZE(tps6594_pins); + + *pinctrl = tps6594_template_pinctrl; + + config.ngpio = ARRAY_SIZE(tps6594_gpio_func_group_names); + config.ngpio_per_reg = TPS6594_NGPIO_PER_REG; + break; + default: + break; + } + + pinctrl->tps = tps; + + pctrl_desc->name = dev_name(dev); + pctrl_desc->owner = THIS_MODULE; + pctrl_desc->pctlops = &tps6594_pctrl_ops; + pctrl_desc->pmxops = &tps6594_pmx_ops; config.parent = tps->dev; config.regmap = tps->regmap; - config.ngpio = TPS6594_PINCTRL_PINS_NB; - config.ngpio_per_reg = 8; config.reg_dat_base = TPS6594_REG_GPIO_IN_1; config.reg_set_base = TPS6594_REG_GPIO_OUT_1; config.reg_dir_out_base = TPS6594_REG_GPIOX_CONF(0); config.reg_mask_xlate = tps6594_gpio_regmap_xlate; + pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl); + if (IS_ERR(pinctrl->pctl_dev)) + return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev), + "Couldn't register pinctrl driver\n"); + pinctrl->gpio_regmap = devm_gpio_regmap_register(dev, &config); if (IS_ERR(pinctrl->gpio_regmap)) return dev_err_probe(dev, PTR_ERR(pinctrl->gpio_regmap), @@ -369,5 +541,6 @@ static struct platform_driver tps6594_pinctrl_driver = { module_platform_driver(tps6594_pinctrl_driver); MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>"); +MODULE_AUTHOR("Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>"); MODULE_DESCRIPTION("TPS6594 pinctrl and GPIO driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index acdb02a4ac0c..d333be2bea3b 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1571,13 +1571,15 @@ config REGULATOR_TPS6594 depends on MFD_TPS6594 && OF default MFD_TPS6594 help - This driver supports TPS6594 voltage regulator chips. + This driver supports TPS6594 series and TPS65224 voltage regulator chips. TPS6594 series of PMICs have 5 BUCKs and 4 LDOs voltage regulators. BUCKs 1,2,3,4 can be used in single phase or multiphase mode. Part number defines which single or multiphase mode is i used. It supports software based voltage control for different voltage domains. + TPS65224 PMIC has 4 BUCKs and 3 LDOs. BUCK12 can be used in dual phase. + All BUCKs and LDOs volatge can be controlled through software. config REGULATOR_TPS6524X tristate "TI TPS6524X Power regulators" diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c index d89ae7f16d7a..14b60abd6afc 100644 --- a/drivers/regulator/rk808-regulator.c +++ b/drivers/regulator/rk808-regulator.c @@ -158,6 +158,11 @@ RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops) +#define RK816_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _disval, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk816_reg_ops) + #define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ _vmask, _ereg, _emask, _disval, _etime) \ RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ @@ -258,7 +263,7 @@ static const unsigned int rk808_buck1_2_ramp_table[] = { 2000, 4000, 6000, 10000 }; -/* RK817 RK809 */ +/* RK817/RK809/RK816 (buck 1/2 only) */ static const unsigned int rk817_buck1_4_ramp_table[] = { 3000, 6300, 12500, 25000 }; @@ -534,15 +539,25 @@ static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) { unsigned int reg; int sel = regulator_map_voltage_linear_range(rdev, uv, uv); + int ret; if (sel < 0) return -EINVAL; reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; - return regmap_update_bits(rdev->regmap, reg, - rdev->desc->vsel_mask, - sel); + ret = regmap_update_bits(rdev->regmap, reg, + rdev->desc->vsel_mask, + sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + + return ret; } static int rk805_set_suspend_enable(struct regulator_dev *rdev) @@ -630,6 +645,38 @@ static int rk808_set_suspend_disable(struct regulator_dev *rdev) rdev->desc->enable_mask); } +static const struct rk8xx_register_bit rk816_suspend_bits[] = { + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 0), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 1), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 2), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 3), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 0), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 1), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 2), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 3), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 4), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 5), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 5), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 6), +}; + +static int rk816_set_suspend_enable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk816_suspend_bits[rid].reg, + rk816_suspend_bits[rid].bit, + rk816_suspend_bits[rid].bit); +} + +static int rk816_set_suspend_disable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk816_suspend_bits[rid].reg, + rk816_suspend_bits[rid].bit, 0); +} + static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev, unsigned int en) { @@ -903,6 +950,54 @@ static const struct regulator_ops rk809_buck5_ops_range = { .set_suspend_disable = rk817_set_suspend_disable, }; +static const struct regulator_ops rk816_buck1_2_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk816_buck4_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk816_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + static const struct regulator_ops rk817_reg_ops = { .list_voltage = regulator_list_voltage_linear, .map_voltage = regulator_map_voltage_linear, @@ -1382,6 +1477,117 @@ static const struct regulator_desc rk809_reg[] = { DISABLE_VAL(3)), }; +static const struct linear_range rk816_buck_4_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 26, 100000), + REGULATOR_LINEAR_RANGE(3500000, 27, 31, 0), +}; + +static const struct regulator_desc rk816_reg[] = { + { + .name = "dcdc1", + .supply_name = "vcc1", + .of_match = of_match_ptr("dcdc1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC1, + .ops = &rk816_buck1_2_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK818_BUCK1_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .apply_reg = RK816_DCDC_EN_REG2, + .apply_bit = RK816_BUCK_DVS_CONFIRM, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(4) | BIT(0), + .enable_val = BIT(4) | BIT(0), + .disable_val = BIT(4), + .ramp_reg = RK818_BUCK1_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "dcdc2", + .supply_name = "vcc2", + .of_match = of_match_ptr("dcdc2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC2, + .ops = &rk816_buck1_2_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK818_BUCK2_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .apply_reg = RK816_DCDC_EN_REG2, + .apply_bit = RK816_BUCK_DVS_CONFIRM, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(5) | BIT(1), + .enable_val = BIT(5) | BIT(1), + .disable_val = BIT(5), + .ramp_reg = RK818_BUCK2_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "dcdc3", + .supply_name = "vcc3", + .of_match = of_match_ptr("dcdc3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC3, + .ops = &rk808_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(6) | BIT(2), + .enable_val = BIT(6) | BIT(2), + .disable_val = BIT(6), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "dcdc4", + .supply_name = "vcc4", + .of_match = of_match_ptr("dcdc4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC4, + .ops = &rk816_buck4_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 32, + .linear_ranges = rk816_buck_4_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk816_buck_4_voltage_ranges), + .vsel_reg = RK818_BUCK4_ON_VSEL_REG, + .vsel_mask = RK818_BUCK4_VSEL_MASK, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(7) | BIT(3), + .enable_val = BIT(7) | BIT(3), + .disable_val = BIT(7), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK816_DESC(RK816_ID_LDO1, "ldo1", "vcc5", 800, 3400, 100, + RK818_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK816_DESC(RK816_ID_LDO2, "ldo2", "vcc5", 800, 3400, 100, + RK818_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(1), DISABLE_VAL(1), 400), + RK816_DESC(RK816_ID_LDO3, "ldo3", "vcc5", 800, 3400, 100, + RK818_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(2), DISABLE_VAL(2), 400), + RK816_DESC(RK816_ID_LDO4, "ldo4", "vcc6", 800, 3400, 100, + RK818_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(3), DISABLE_VAL(3), 400), + RK816_DESC(RK816_ID_LDO5, "ldo5", "vcc6", 800, 3400, 100, + RK818_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG2, ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK816_DESC(RK816_ID_LDO6, "ldo6", "vcc6", 800, 3400, 100, + RK818_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG2, ENABLE_MASK(1), DISABLE_VAL(1), 400), +}; + static const struct regulator_desc rk817_reg[] = { { .name = "DCDC_REG1", @@ -1704,6 +1910,10 @@ static int rk808_regulator_probe(struct platform_device *pdev) regulators = rk809_reg; nregulators = RK809_NUM_REGULATORS; break; + case RK816_ID: + regulators = rk816_reg; + nregulators = ARRAY_SIZE(rk816_reg); + break; case RK817_ID: regulators = rk817_reg; nregulators = RK817_NUM_REGULATORS; diff --git a/drivers/regulator/tps6594-regulator.c b/drivers/regulator/tps6594-regulator.c index b7f0c8779757..9e7886bd4149 100644 --- a/drivers/regulator/tps6594-regulator.c +++ b/drivers/regulator/tps6594-regulator.c @@ -18,10 +18,13 @@ #include <linux/mfd/tps6594.h> -#define BUCK_NB 5 -#define LDO_NB 4 -#define MULTI_PHASE_NB 4 -#define REGS_INT_NB 4 +#define BUCK_NB 5 +#define LDO_NB 4 +#define MULTI_PHASE_NB 4 +/* TPS6593 and LP8764 supports OV, UV, SC, ILIM */ +#define REGS_INT_NB 4 +/* TPS65224 supports OV or UV */ +#define TPS65224_REGS_INT_NB 1 enum tps6594_regulator_id { /* DCDC's */ @@ -66,6 +69,15 @@ static struct tps6594_regulator_irq_type tps6594_ext_regulator_irq_types[] = { REGULATOR_EVENT_OVER_VOLTAGE_WARN }, }; +static struct tps6594_regulator_irq_type tps65224_ext_regulator_irq_types[] = { + { TPS65224_IRQ_NAME_VCCA_UVOV, "VCCA", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, + { TPS65224_IRQ_NAME_VMON1_UVOV, "VMON1", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, + { TPS65224_IRQ_NAME_VMON2_UVOV, "VMON2", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + struct tps6594_regulator_irq_data { struct device *dev; struct tps6594_regulator_irq_type *type; @@ -122,6 +134,27 @@ static const struct linear_range ldos_4_ranges[] = { REGULATOR_LINEAR_RANGE(1200000, 0x20, 0x74, 25000), }; +/* Voltage range for TPS65224 Bucks and LDOs */ +static const struct linear_range tps65224_bucks_1_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0x0a, 0x0e, 20000), + REGULATOR_LINEAR_RANGE(600000, 0x0f, 0x72, 5000), + REGULATOR_LINEAR_RANGE(1100000, 0x73, 0xaa, 10000), + REGULATOR_LINEAR_RANGE(1660000, 0xab, 0xfd, 20000), +}; + +static const struct linear_range tps65224_bucks_2_3_4_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0x0, 0x1a, 25000), + REGULATOR_LINEAR_RANGE(1200000, 0x1b, 0x45, 50000), +}; + +static const struct linear_range tps65224_ldos_1_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0xC, 0x36, 50000), +}; + +static const struct linear_range tps65224_ldos_2_3_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x38, 50000), +}; + /* Operations permitted on BUCK1/2/3/4/5 */ static const struct regulator_ops tps6594_bucks_ops = { .is_enabled = regulator_is_enabled_regmap, @@ -197,6 +230,38 @@ static const struct regulator_desc buck_regs[] = { 4, 0, 0, NULL, 0, 0), }; +/* Buck configuration for TPS65224 */ +static const struct regulator_desc tps65224_buck_regs[] = { + TPS6594_REGULATOR("BUCK1", "buck1", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_1_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK2", "buck2", TPS6594_BUCK_2, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(1), + TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(1), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_2_3_4_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK3", "buck3", TPS6594_BUCK_3, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(2), + TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(2), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_2_3_4_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK4", "buck4", TPS6594_BUCK_4, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(3), + TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(3), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_2_3_4_ranges, + 4, 0, 0, NULL, 0, 0), +}; + static struct tps6594_regulator_irq_type tps6594_buck1_irq_types[] = { { TPS6594_IRQ_NAME_BUCK1_OV, "BUCK1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, { TPS6594_IRQ_NAME_BUCK1_UV, "BUCK1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, @@ -269,6 +334,41 @@ static struct tps6594_regulator_irq_type tps6594_ldo4_irq_types[] = { REGULATOR_EVENT_OVER_CURRENT }, }; +static struct tps6594_regulator_irq_type tps65224_buck1_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK1_UVOV, "BUCK1", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static struct tps6594_regulator_irq_type tps65224_buck2_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK2_UVOV, "BUCK2", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static struct tps6594_regulator_irq_type tps65224_buck3_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK3_UVOV, "BUCK3", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static struct tps6594_regulator_irq_type tps65224_buck4_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK4_UVOV, "BUCK4", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static struct tps6594_regulator_irq_type tps65224_ldo1_irq_types[] = { + { TPS65224_IRQ_NAME_LDO1_UVOV, "LDO1", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static struct tps6594_regulator_irq_type tps65224_ldo2_irq_types[] = { + { TPS65224_IRQ_NAME_LDO2_UVOV, "LDO2", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static struct tps6594_regulator_irq_type tps65224_ldo3_irq_types[] = { + { TPS65224_IRQ_NAME_LDO3_UVOV, "LDO3", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + static struct tps6594_regulator_irq_type *tps6594_bucks_irq_types[] = { tps6594_buck1_irq_types, tps6594_buck2_irq_types, @@ -284,7 +384,20 @@ static struct tps6594_regulator_irq_type *tps6594_ldos_irq_types[] = { tps6594_ldo4_irq_types, }; -static const struct regulator_desc multi_regs[] = { +static struct tps6594_regulator_irq_type *tps65224_bucks_irq_types[] = { + tps65224_buck1_irq_types, + tps65224_buck2_irq_types, + tps65224_buck3_irq_types, + tps65224_buck4_irq_types, +}; + +static struct tps6594_regulator_irq_type *tps65224_ldos_irq_types[] = { + tps65224_ldo1_irq_types, + tps65224_ldo2_irq_types, + tps65224_ldo3_irq_types, +}; + +static const struct regulator_desc tps6594_multi_regs[] = { TPS6594_REGULATOR("BUCK12", "buck12", TPS6594_BUCK_1, REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, TPS6594_REG_BUCKX_VOUT_1(1), @@ -315,7 +428,17 @@ static const struct regulator_desc multi_regs[] = { 4, 4000, 0, NULL, 0, 0), }; -static const struct regulator_desc ldo_regs[] = { +static const struct regulator_desc tps65224_multi_regs[] = { + TPS6594_REGULATOR("BUCK12", "buck12", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_1_ranges, + 4, 4000, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps6594_ldo_regs[] = { TPS6594_REGULATOR("LDO1", "ldo1", TPS6594_LDO_1, REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, TPS6594_REG_LDOX_VOUT(0), @@ -346,6 +469,30 @@ static const struct regulator_desc ldo_regs[] = { 1, 0, 0, NULL, 0, 0), }; +static const struct regulator_desc tps65224_ldo_regs[] = { + TPS6594_REGULATOR("LDO1", "ldo1", TPS6594_LDO_1, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(0), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(0), + TPS6594_BIT_LDO_EN, 0, 0, tps65224_ldos_1_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO2", "ldo2", TPS6594_LDO_2, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(1), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(1), + TPS6594_BIT_LDO_EN, 0, 0, tps65224_ldos_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO3", "ldo3", TPS6594_LDO_3, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(2), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(2), + TPS6594_BIT_LDO_EN, 0, 0, tps65224_ldos_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), +}; + static irqreturn_t tps6594_regulator_irq_handler(int irq, void *data) { struct tps6594_regulator_irq_data *irq_data = data; @@ -369,17 +516,18 @@ static irqreturn_t tps6594_regulator_irq_handler(int irq, void *data) static int tps6594_request_reg_irqs(struct platform_device *pdev, struct regulator_dev *rdev, struct tps6594_regulator_irq_data *irq_data, - struct tps6594_regulator_irq_type *tps6594_regs_irq_types, + struct tps6594_regulator_irq_type *regs_irq_types, + size_t interrupt_cnt, int *irq_idx) { struct tps6594_regulator_irq_type *irq_type; struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent); - int j; + size_t j; int irq; int error; - for (j = 0; j < REGS_INT_NB; j++) { - irq_type = &tps6594_regs_irq_types[j]; + for (j = 0; j < interrupt_cnt; j++) { + irq_type = ®s_irq_types[j]; irq = platform_get_irq_byname(pdev, irq_type->irq_name); if (irq < 0) return -EINVAL; @@ -411,23 +559,47 @@ static int tps6594_regulator_probe(struct platform_device *pdev) struct tps6594_regulator_irq_data *irq_data; struct tps6594_ext_regulator_irq_data *irq_ext_reg_data; struct tps6594_regulator_irq_type *irq_type; - u8 buck_configured[BUCK_NB] = { 0 }; - u8 buck_multi[MULTI_PHASE_NB] = { 0 }; - static const char * const multiphases[] = {"buck12", "buck123", "buck1234", "buck34"}; + struct tps6594_regulator_irq_type *irq_types; + bool buck_configured[BUCK_NB] = { false }; + bool buck_multi[MULTI_PHASE_NB] = { false }; + static const char *npname; - int error, i, irq, multi, delta; + int error, i, irq, multi; int irq_idx = 0; int buck_idx = 0; - size_t ext_reg_irq_nb = 2; + int nr_ldo; + int nr_buck; + int nr_types; + unsigned int irq_count; + unsigned int multi_phase_cnt; size_t reg_irq_nb; + struct tps6594_regulator_irq_type **bucks_irq_types; + const struct regulator_desc *multi_regs; + struct tps6594_regulator_irq_type **ldos_irq_types; + const struct regulator_desc *ldo_regs; + size_t interrupt_count; + + if (tps->chip_id == TPS65224) { + bucks_irq_types = tps65224_bucks_irq_types; + interrupt_count = ARRAY_SIZE(tps65224_buck1_irq_types); + multi_regs = tps65224_multi_regs; + ldos_irq_types = tps65224_ldos_irq_types; + ldo_regs = tps65224_ldo_regs; + multi_phase_cnt = ARRAY_SIZE(tps65224_multi_regs); + } else { + bucks_irq_types = tps6594_bucks_irq_types; + interrupt_count = ARRAY_SIZE(tps6594_buck1_irq_types); + multi_regs = tps6594_multi_regs; + ldos_irq_types = tps6594_ldos_irq_types; + ldo_regs = tps6594_ldo_regs; + multi_phase_cnt = ARRAY_SIZE(tps6594_multi_regs); + } + enum { MULTI_BUCK12, + MULTI_BUCK12_34, MULTI_BUCK123, MULTI_BUCK1234, - MULTI_BUCK12_34, - MULTI_FIRST = MULTI_BUCK12, - MULTI_LAST = MULTI_BUCK12_34, - MULTI_NUM = MULTI_LAST - MULTI_FIRST + 1 }; config.dev = tps->dev; @@ -442,61 +614,68 @@ static int tps6594_regulator_probe(struct platform_device *pdev) * In case of Multiphase configuration, value should be defined for * buck_configured to avoid creating bucks for every buck in multiphase */ - for (multi = MULTI_FIRST; multi < MULTI_NUM; multi++) { - np = of_find_node_by_name(tps->dev->of_node, multiphases[multi]); + for (multi = 0; multi < multi_phase_cnt; multi++) { + np = of_find_node_by_name(tps->dev->of_node, multi_regs[multi].supply_name); npname = of_node_full_name(np); np_pmic_parent = of_get_parent(of_get_parent(np)); if (of_node_cmp(of_node_full_name(np_pmic_parent), tps->dev->of_node->full_name)) continue; - delta = strcmp(npname, multiphases[multi]); - if (!delta) { + if (strcmp(npname, multi_regs[multi].supply_name) == 0) { switch (multi) { case MULTI_BUCK12: - buck_multi[0] = 1; - buck_configured[0] = 1; - buck_configured[1] = 1; + buck_multi[0] = true; + buck_configured[0] = true; + buck_configured[1] = true; break; /* multiphase buck34 is supported only with buck12 */ case MULTI_BUCK12_34: - buck_multi[0] = 1; - buck_multi[1] = 1; - buck_configured[0] = 1; - buck_configured[1] = 1; - buck_configured[2] = 1; - buck_configured[3] = 1; + buck_multi[0] = true; + buck_multi[1] = true; + buck_configured[0] = true; + buck_configured[1] = true; + buck_configured[2] = true; + buck_configured[3] = true; break; case MULTI_BUCK123: - buck_multi[2] = 1; - buck_configured[0] = 1; - buck_configured[1] = 1; - buck_configured[2] = 1; + buck_multi[2] = true; + buck_configured[0] = true; + buck_configured[1] = true; + buck_configured[2] = true; break; case MULTI_BUCK1234: - buck_multi[3] = 1; - buck_configured[0] = 1; - buck_configured[1] = 1; - buck_configured[2] = 1; - buck_configured[3] = 1; + buck_multi[3] = true; + buck_configured[0] = true; + buck_configured[1] = true; + buck_configured[2] = true; + buck_configured[3] = true; break; } } } if (tps->chip_id == LP8764) { - /* There is only 4 buck on LP8764 */ - buck_configured[4] = 1; - reg_irq_nb = size_mul(REGS_INT_NB, (BUCK_NB - 1)); + nr_buck = ARRAY_SIZE(buck_regs); + nr_ldo = 0; + nr_types = REGS_INT_NB; + } else if (tps->chip_id == TPS65224) { + nr_buck = ARRAY_SIZE(tps65224_buck_regs); + nr_ldo = ARRAY_SIZE(tps65224_ldo_regs); + nr_types = REGS_INT_NB; } else { - reg_irq_nb = size_mul(REGS_INT_NB, (size_add(BUCK_NB, LDO_NB))); + nr_buck = ARRAY_SIZE(buck_regs); + nr_ldo = ARRAY_SIZE(tps6594_ldo_regs); + nr_types = TPS65224_REGS_INT_NB; } + reg_irq_nb = nr_types * (nr_buck + nr_ldo); + irq_data = devm_kmalloc_array(tps->dev, reg_irq_nb, sizeof(struct tps6594_regulator_irq_data), GFP_KERNEL); if (!irq_data) return -ENOMEM; - for (i = 0; i < MULTI_PHASE_NB; i++) { - if (buck_multi[i] == 0) + for (i = 0; i < multi_phase_cnt; i++) { + if (!buck_multi[i]) continue; rdev = devm_regulator_register(&pdev->dev, &multi_regs[i], &config); @@ -506,52 +685,60 @@ static int tps6594_regulator_probe(struct platform_device *pdev) pdev->name); /* config multiphase buck12+buck34 */ - if (i == 1) + if (i == MULTI_BUCK12_34) buck_idx = 2; + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, - tps6594_bucks_irq_types[buck_idx], &irq_idx); + bucks_irq_types[buck_idx], + interrupt_count, &irq_idx); if (error) return error; + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, - tps6594_bucks_irq_types[buck_idx + 1], &irq_idx); + bucks_irq_types[buck_idx + 1], + interrupt_count, &irq_idx); if (error) return error; - if (i == 2 || i == 3) { + if (i == MULTI_BUCK123 || i == MULTI_BUCK1234) { error = tps6594_request_reg_irqs(pdev, rdev, irq_data, tps6594_bucks_irq_types[buck_idx + 2], + interrupt_count, &irq_idx); if (error) return error; } - if (i == 3) { + if (i == MULTI_BUCK1234) { error = tps6594_request_reg_irqs(pdev, rdev, irq_data, tps6594_bucks_irq_types[buck_idx + 3], + interrupt_count, &irq_idx); if (error) return error; } } - for (i = 0; i < BUCK_NB; i++) { - if (buck_configured[i] == 1) + for (i = 0; i < nr_buck; i++) { + if (buck_configured[i]) continue; - rdev = devm_regulator_register(&pdev->dev, &buck_regs[i], &config); + const struct regulator_desc *buck_cfg = (tps->chip_id == TPS65224) ? + tps65224_buck_regs : buck_regs; + + rdev = devm_regulator_register(&pdev->dev, &buck_cfg[i], &config); if (IS_ERR(rdev)) return dev_err_probe(tps->dev, PTR_ERR(rdev), - "failed to register %s regulator\n", - pdev->name); + "failed to register %s regulator\n", pdev->name); error = tps6594_request_reg_irqs(pdev, rdev, irq_data, - tps6594_bucks_irq_types[i], &irq_idx); + bucks_irq_types[i], interrupt_count, &irq_idx); if (error) return error; } - /* LP8764 dosen't have LDO */ + /* LP8764 doesn't have LDO */ if (tps->chip_id != LP8764) { - for (i = 0; i < ARRAY_SIZE(ldo_regs); i++) { + for (i = 0; i < nr_ldo; i++) { rdev = devm_regulator_register(&pdev->dev, &ldo_regs[i], &config); if (IS_ERR(rdev)) return dev_err_probe(tps->dev, PTR_ERR(rdev), @@ -559,26 +746,34 @@ static int tps6594_regulator_probe(struct platform_device *pdev) pdev->name); error = tps6594_request_reg_irqs(pdev, rdev, irq_data, - tps6594_ldos_irq_types[i], + ldos_irq_types[i], interrupt_count, &irq_idx); if (error) return error; } } - if (tps->chip_id == LP8764) - ext_reg_irq_nb = ARRAY_SIZE(tps6594_ext_regulator_irq_types); + if (tps->chip_id == TPS65224) { + irq_types = tps65224_ext_regulator_irq_types; + irq_count = ARRAY_SIZE(tps65224_ext_regulator_irq_types); + } else { + irq_types = tps6594_ext_regulator_irq_types; + if (tps->chip_id == LP8764) + irq_count = ARRAY_SIZE(tps6594_ext_regulator_irq_types); + else + /* TPS6593 supports only VCCA OV and UV */ + irq_count = 2; + } irq_ext_reg_data = devm_kmalloc_array(tps->dev, - ext_reg_irq_nb, - sizeof(struct tps6594_ext_regulator_irq_data), - GFP_KERNEL); + irq_count, + sizeof(struct tps6594_ext_regulator_irq_data), + GFP_KERNEL); if (!irq_ext_reg_data) return -ENOMEM; - for (i = 0; i < ext_reg_irq_nb; ++i) { - irq_type = &tps6594_ext_regulator_irq_types[i]; - + for (i = 0; i < irq_count; ++i) { + irq_type = &irq_types[i]; irq = platform_get_irq_byname(pdev, irq_type->irq_name); if (irq < 0) return -EINVAL; @@ -610,5 +805,6 @@ module_platform_driver(tps6594_regulator_driver); MODULE_ALIAS("platform:tps6594-regulator"); MODULE_AUTHOR("Jerome Neanne <jneanne@baylibre.com>"); +MODULE_AUTHOR("Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>"); MODULE_DESCRIPTION("TPS6594 voltage regulator driver"); MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h index ee66c9751003..988f1cd90032 100644 --- a/include/linux/mfd/intel-m10-bmc.h +++ b/include/linux/mfd/intel-m10-bmc.h @@ -205,6 +205,7 @@ struct m10bmc_csr_map { unsigned int pr_reh_addr; unsigned int pr_magic; unsigned int rsu_update_counter; + unsigned int staging_size; }; /** diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 78e167a92483..69cbea78b430 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -113,6 +113,148 @@ enum rk808_reg { #define RK808_INT_STS_MSK_REG2 0x4f #define RK808_IO_POL_REG 0x50 +/* RK816 */ +enum rk816_reg { + RK816_ID_DCDC1, + RK816_ID_DCDC2, + RK816_ID_DCDC3, + RK816_ID_DCDC4, + RK816_ID_LDO1, + RK816_ID_LDO2, + RK816_ID_LDO3, + RK816_ID_LDO4, + RK816_ID_LDO5, + RK816_ID_LDO6, + RK816_ID_BOOST, + RK816_ID_OTG_SW, +}; + +enum rk816_irqs { + /* INT_STS_REG1 */ + RK816_IRQ_PWRON_FALL, + RK816_IRQ_PWRON_RISE, + + /* INT_STS_REG2 */ + RK816_IRQ_VB_LOW, + RK816_IRQ_PWRON, + RK816_IRQ_PWRON_LP, + RK816_IRQ_HOTDIE, + RK816_IRQ_RTC_ALARM, + RK816_IRQ_RTC_PERIOD, + RK816_IRQ_USB_OV, + + /* INT_STS_REG3 */ + RK816_IRQ_PLUG_IN, + RK816_IRQ_PLUG_OUT, + RK816_IRQ_CHG_OK, + RK816_IRQ_CHG_TE, + RK816_IRQ_CHG_TS, + RK816_IRQ_CHG_CVTLIM, + RK816_IRQ_DISCHG_ILIM, +}; + +/* power channel registers */ +#define RK816_DCDC_EN_REG1 0x23 + +#define RK816_DCDC_EN_REG2 0x24 +#define RK816_BOOST_EN BIT(1) +#define RK816_OTG_EN BIT(2) +#define RK816_BOOST_EN_MSK BIT(5) +#define RK816_OTG_EN_MSK BIT(6) +#define RK816_BUCK_DVS_CONFIRM BIT(7) + +#define RK816_LDO_EN_REG1 0x27 + +#define RK816_LDO_EN_REG2 0x28 + +/* interrupt registers and irq definitions */ +#define RK816_INT_STS_REG1 0x49 +#define RK816_INT_STS_MSK_REG1 0x4a +#define RK816_INT_STS_PWRON_FALL BIT(5) +#define RK816_INT_STS_PWRON_RISE BIT(6) + +#define RK816_INT_STS_REG2 0x4c +#define RK816_INT_STS_MSK_REG2 0x4d +#define RK816_INT_STS_VB_LOW BIT(1) +#define RK816_INT_STS_PWRON BIT(2) +#define RK816_INT_STS_PWRON_LP BIT(3) +#define RK816_INT_STS_HOTDIE BIT(4) +#define RK816_INT_STS_RTC_ALARM BIT(5) +#define RK816_INT_STS_RTC_PERIOD BIT(6) +#define RK816_INT_STS_USB_OV BIT(7) + +#define RK816_INT_STS_REG3 0x4e +#define RK816_INT_STS_MSK_REG3 0x4f +#define RK816_INT_STS_PLUG_IN BIT(0) +#define RK816_INT_STS_PLUG_OUT BIT(1) +#define RK816_INT_STS_CHG_OK BIT(2) +#define RK816_INT_STS_CHG_TE BIT(3) +#define RK816_INT_STS_CHG_TS BIT(4) +#define RK816_INT_STS_CHG_CVTLIM BIT(6) +#define RK816_INT_STS_DISCHG_ILIM BIT(7) + +#define RK816_IRQ_STS_OFFSET(x) ((x) - RK816_INT_STS_REG1) +#define RK816_IRQ_MSK_OFFSET(x) ((x) - RK816_INT_STS_MSK_REG1) + +/* charger, boost and OTG registers */ +#define RK816_OTG_BUCK_LDO_CONFIG_REG 0x2a +#define RK816_CHRG_CONFIG_REG 0x2b +#define RK816_BOOST_ON_VESL_REG 0x54 +#define RK816_BOOST_SLP_VSEL_REG 0x55 +#define RK816_CHRG_BOOST_CONFIG_REG 0x9a +#define RK816_SUP_STS_REG 0xa0 +#define RK816_USB_CTRL_REG 0xa1 +#define RK816_CHRG_CTRL(x) (0xa3 + (x)) +#define RK816_BAT_CTRL_REG 0xa6 +#define RK816_BAT_HTS_TS_REG 0xa8 +#define RK816_BAT_LTS_TS_REG 0xa9 + +/* adc and fuel gauge registers */ +#define RK816_TS_CTRL_REG 0xac +#define RK816_ADC_CTRL_REG 0xad +#define RK816_GGCON_REG 0xb0 +#define RK816_GGSTS_REG 0xb1 +#define RK816_ZERO_CUR_ADC_REGH 0xb2 +#define RK816_ZERO_CUR_ADC_REGL 0xb3 +#define RK816_GASCNT_CAL_REG(x) (0xb7 - (x)) +#define RK816_GASCNT_REG(x) (0xbb - (x)) +#define RK816_BAT_CUR_AVG_REGH 0xbc +#define RK816_BAT_CUR_AVG_REGL 0xbd +#define RK816_TS_ADC_REGH 0xbe +#define RK816_TS_ADC_REGL 0xbf +#define RK816_USB_ADC_REGH 0xc0 +#define RK816_USB_ADC_REGL 0xc1 +#define RK816_BAT_OCV_REGH 0xc2 +#define RK816_BAT_OCV_REGL 0xc3 +#define RK816_BAT_VOL_REGH 0xc4 +#define RK816_BAT_VOL_REGL 0xc5 +#define RK816_RELAX_ENTRY_THRES_REGH 0xc6 +#define RK816_RELAX_ENTRY_THRES_REGL 0xc7 +#define RK816_RELAX_EXIT_THRES_REGH 0xc8 +#define RK816_RELAX_EXIT_THRES_REGL 0xc9 +#define RK816_RELAX_VOL1_REGH 0xca +#define RK816_RELAX_VOL1_REGL 0xcb +#define RK816_RELAX_VOL2_REGH 0xcc +#define RK816_RELAX_VOL2_REGL 0xcd +#define RK816_RELAX_CUR1_REGH 0xce +#define RK816_RELAX_CUR1_REGL 0xcf +#define RK816_RELAX_CUR2_REGH 0xd0 +#define RK816_RELAX_CUR2_REGL 0xd1 +#define RK816_CAL_OFFSET_REGH 0xd2 +#define RK816_CAL_OFFSET_REGL 0xd3 +#define RK816_NON_ACT_TIMER_CNT_REG 0xd4 +#define RK816_VCALIB0_REGH 0xd5 +#define RK816_VCALIB0_REGL 0xd6 +#define RK816_VCALIB1_REGH 0xd7 +#define RK816_VCALIB1_REGL 0xd8 +#define RK816_FCC_GASCNT_REG(x) (0xdc - (x)) +#define RK816_IOFFSET_REGH 0xdd +#define RK816_IOFFSET_REGL 0xde +#define RK816_SLEEP_CON_SAMP_CUR_REG 0xdf + +/* general purpose data registers 0xe0 ~ 0xf2 */ +#define RK816_DATA_REG(x) (0xe0 + (x)) + /* RK818 */ #define RK818_DCDC1 0 #define RK818_LDO1 4 @@ -791,6 +933,7 @@ enum rk806_dvs_mode { #define VOUT_LO_INT BIT(0) #define CLK32KOUT2_EN BIT(0) +#define TEMP105C 0x08 #define TEMP115C 0x0c #define TEMP_HOTDIE_MSK 0x0c #define SLP_SD_MSK (0x3 << 2) @@ -1191,6 +1334,7 @@ enum { RK806_ID = 0x8060, RK808_ID = 0x0000, RK809_ID = 0x8090, + RK816_ID = 0x8160, RK817_ID = 0x8170, RK818_ID = 0x8180, }; diff --git a/include/linux/mfd/rohm-bd71828.h b/include/linux/mfd/rohm-bd71828.h index 3b5f3a7db4bd..ce786c96404a 100644 --- a/include/linux/mfd/rohm-bd71828.h +++ b/include/linux/mfd/rohm-bd71828.h @@ -4,6 +4,7 @@ #ifndef __LINUX_MFD_BD71828_H__ #define __LINUX_MFD_BD71828_H__ +#include <linux/bits.h> #include <linux/mfd/rohm-generic.h> #include <linux/mfd/rohm-shared.h> @@ -41,7 +42,8 @@ enum { #define BD71828_REG_PS_CTRL_2 0x05 #define BD71828_REG_PS_CTRL_3 0x06 -//#define BD71828_REG_SWRESET 0x06 +#define BD71828_MASK_STATE_HBNT BIT(1) + #define BD71828_MASK_RUN_LVL_CTRL 0x30 /* Regulator control masks */ @@ -133,7 +135,6 @@ enum { #define BD71828_REG_LDO5_VOLT 0x43 #define BD71828_REG_LDO5_VOLT_OPT 0x42 #define BD71828_REG_LDO6_EN 0x44 -//#define BD71828_REG_LDO6_VOLT 0x4 #define BD71828_REG_LDO7_EN 0x45 #define BD71828_REG_LDO7_VOLT 0x46 diff --git a/include/linux/mfd/tps6594.h b/include/linux/mfd/tps6594.h index 3f7c5e23cd4c..16543fd4d83e 100644 --- a/include/linux/mfd/tps6594.h +++ b/include/linux/mfd/tps6594.h @@ -18,12 +18,13 @@ enum pmic_id { TPS6594, TPS6593, LP8764, + TPS65224, }; /* Macro to get page index from register address */ #define TPS6594_REG_TO_PAGE(reg) ((reg) >> 8) -/* Registers for page 0 of TPS6594 */ +/* Registers for page 0 */ #define TPS6594_REG_DEV_REV 0x01 #define TPS6594_REG_NVM_CODE_1 0x02 @@ -56,9 +57,6 @@ enum pmic_id { #define TPS6594_REG_GPIOX_OUT(gpio_inst) (TPS6594_REG_GPIO_OUT_1 + (gpio_inst) / 8) #define TPS6594_REG_GPIOX_IN(gpio_inst) (TPS6594_REG_GPIO_IN_1 + (gpio_inst) / 8) -#define TPS6594_REG_GPIO_IN_1 0x3f -#define TPS6594_REG_GPIO_IN_2 0x40 - #define TPS6594_REG_RAIL_SEL_1 0x41 #define TPS6594_REG_RAIL_SEL_2 0x42 #define TPS6594_REG_RAIL_SEL_3 0x43 @@ -70,13 +68,15 @@ enum pmic_id { #define TPS6594_REG_FSM_TRIG_MASK_3 0x48 #define TPS6594_REG_MASK_BUCK1_2 0x49 +#define TPS65224_REG_MASK_BUCKS 0x49 #define TPS6594_REG_MASK_BUCK3_4 0x4a #define TPS6594_REG_MASK_BUCK5 0x4b #define TPS6594_REG_MASK_LDO1_2 0x4c +#define TPS65224_REG_MASK_LDOS 0x4c #define TPS6594_REG_MASK_LDO3_4 0x4d #define TPS6594_REG_MASK_VMON 0x4e -#define TPS6594_REG_MASK_GPIO1_8_FALL 0x4f -#define TPS6594_REG_MASK_GPIO1_8_RISE 0x50 +#define TPS6594_REG_MASK_GPIO_FALL 0x4f +#define TPS6594_REG_MASK_GPIO_RISE 0x50 #define TPS6594_REG_MASK_GPIO9_11 0x51 #define TPS6594_REG_MASK_STARTUP 0x52 #define TPS6594_REG_MASK_MISC 0x53 @@ -174,6 +174,10 @@ enum pmic_id { #define TPS6594_REG_REGISTER_LOCK 0xa1 +#define TPS65224_REG_SRAM_ACCESS_1 0xa2 +#define TPS65224_REG_SRAM_ACCESS_2 0xa3 +#define TPS65224_REG_SRAM_ADDR_CTRL 0xa4 +#define TPS65224_REG_RECOV_CNT_PFSM_INCR 0xa5 #define TPS6594_REG_MANUFACTURING_VER 0xa6 #define TPS6594_REG_CUSTOMER_NVM_ID_REG 0xa7 @@ -182,6 +186,9 @@ enum pmic_id { #define TPS6594_REG_SOFT_REBOOT_REG 0xab +#define TPS65224_REG_ADC_CTRL 0xac +#define TPS65224_REG_ADC_RESULT_REG_1 0xad +#define TPS65224_REG_ADC_RESULT_REG_2 0xae #define TPS6594_REG_RTC_SECONDS 0xb5 #define TPS6594_REG_RTC_MINUTES 0xb6 #define TPS6594_REG_RTC_HOURS 0xb7 @@ -199,6 +206,7 @@ enum pmic_id { #define TPS6594_REG_RTC_CTRL_1 0xc2 #define TPS6594_REG_RTC_CTRL_2 0xc3 +#define TPS65224_REG_STARTUP_CTRL 0xc3 #define TPS6594_REG_RTC_STATUS 0xc4 #define TPS6594_REG_RTC_INTERRUPTS 0xc5 #define TPS6594_REG_RTC_COMP_LSB 0xc6 @@ -214,13 +222,17 @@ enum pmic_id { #define TPS6594_REG_PFSM_DELAY_REG_2 0xce #define TPS6594_REG_PFSM_DELAY_REG_3 0xcf #define TPS6594_REG_PFSM_DELAY_REG_4 0xd0 +#define TPS65224_REG_ADC_GAIN_COMP_REG 0xd0 +#define TPS65224_REG_CRC_CALC_CONTROL 0xef +#define TPS65224_REG_REGMAP_USER_CRC_LOW 0xf0 +#define TPS65224_REG_REGMAP_USER_CRC_HIGH 0xf1 -/* Registers for page 1 of TPS6594 */ +/* Registers for page 1 */ #define TPS6594_REG_SERIAL_IF_CONFIG 0x11a #define TPS6594_REG_I2C1_ID 0x122 #define TPS6594_REG_I2C2_ID 0x123 -/* Registers for page 4 of TPS6594 */ +/* Registers for page 4 */ #define TPS6594_REG_WD_ANSWER_REG 0x401 #define TPS6594_REG_WD_QUESTION_ANSW_CNT 0x402 #define TPS6594_REG_WD_WIN1_CFG 0x403 @@ -241,16 +253,26 @@ enum pmic_id { #define TPS6594_BIT_BUCK_PLDN BIT(5) #define TPS6594_BIT_BUCK_RV_SEL BIT(7) -/* BUCKX_CONF register field definition */ +/* TPS6594 BUCKX_CONF register field definition */ #define TPS6594_MASK_BUCK_SLEW_RATE GENMASK(2, 0) #define TPS6594_MASK_BUCK_ILIM GENMASK(5, 3) -/* BUCKX_PG_WINDOW register field definition */ +/* TPS65224 BUCKX_CONF register field definition */ +#define TPS65224_MASK_BUCK_SLEW_RATE GENMASK(1, 0) + +/* TPS6594 BUCKX_PG_WINDOW register field definition */ #define TPS6594_MASK_BUCK_OV_THR GENMASK(2, 0) #define TPS6594_MASK_BUCK_UV_THR GENMASK(5, 3) -/* BUCKX VSET */ -#define TPS6594_MASK_BUCKS_VSET GENMASK(7, 0) +/* TPS65224 BUCKX_PG_WINDOW register field definition */ +#define TPS65224_MASK_BUCK_VMON_THR GENMASK(1, 0) + +/* TPS6594 BUCKX_VOUT register field definition */ +#define TPS6594_MASK_BUCKS_VSET GENMASK(7, 0) + +/* TPS65224 BUCKX_VOUT register field definition */ +#define TPS65224_MASK_BUCK1_VSET GENMASK(7, 0) +#define TPS65224_MASK_BUCKS_VSET GENMASK(6, 0) /* LDOX_CTRL register field definition */ #define TPS6594_BIT_LDO_EN BIT(0) @@ -258,6 +280,7 @@ enum pmic_id { #define TPS6594_BIT_LDO_VMON_EN BIT(4) #define TPS6594_MASK_LDO_PLDN GENMASK(6, 5) #define TPS6594_BIT_LDO_RV_SEL BIT(7) +#define TPS65224_BIT_LDO_DISCHARGE_EN BIT(5) /* LDORTC_CTRL register field definition */ #define TPS6594_BIT_LDORTC_DIS BIT(0) @@ -271,6 +294,9 @@ enum pmic_id { #define TPS6594_MASK_LDO_OV_THR GENMASK(2, 0) #define TPS6594_MASK_LDO_UV_THR GENMASK(5, 3) +/* LDOX_PG_WINDOW register field definition */ +#define TPS65224_MASK_LDO_VMON_THR GENMASK(1, 0) + /* VCCA_VMON_CTRL register field definition */ #define TPS6594_BIT_VMON_EN BIT(0) #define TPS6594_BIT_VMON1_EN BIT(1) @@ -278,10 +304,12 @@ enum pmic_id { #define TPS6594_BIT_VMON2_EN BIT(3) #define TPS6594_BIT_VMON2_RV_SEL BIT(4) #define TPS6594_BIT_VMON_DEGLITCH_SEL BIT(5) +#define TPS65224_BIT_VMON_DEGLITCH_SEL GENMASK(7, 5) /* VCCA_PG_WINDOW register field definition */ #define TPS6594_MASK_VCCA_OV_THR GENMASK(2, 0) #define TPS6594_MASK_VCCA_UV_THR GENMASK(5, 3) +#define TPS65224_MASK_VCCA_VMON_THR GENMASK(1, 0) #define TPS6594_BIT_VCCA_PG_SET BIT(6) /* VMONX_PG_WINDOW register field definition */ @@ -289,6 +317,9 @@ enum pmic_id { #define TPS6594_MASK_VMONX_UV_THR GENMASK(5, 3) #define TPS6594_BIT_VMONX_RANGE BIT(6) +/* VMONX_PG_WINDOW register field definition */ +#define TPS65224_MASK_VMONX_THR GENMASK(1, 0) + /* GPIOX_CONF register field definition */ #define TPS6594_BIT_GPIO_DIR BIT(0) #define TPS6594_BIT_GPIO_OD BIT(1) @@ -296,6 +327,8 @@ enum pmic_id { #define TPS6594_BIT_GPIO_PU_PD_EN BIT(3) #define TPS6594_BIT_GPIO_DEGLITCH_EN BIT(4) #define TPS6594_MASK_GPIO_SEL GENMASK(7, 5) +#define TPS65224_MASK_GPIO_SEL GENMASK(6, 5) +#define TPS65224_MASK_GPIO_SEL_GPIO6 GENMASK(7, 5) /* NPWRON_CONF register field definition */ #define TPS6594_BIT_NRSTOUT_OD BIT(0) @@ -305,6 +338,12 @@ enum pmic_id { #define TPS6594_BIT_ENABLE_POL BIT(5) #define TPS6594_MASK_NPWRON_SEL GENMASK(7, 6) +/* POWER_ON_CONFIG register field definition */ +#define TPS65224_BIT_NINT_ENDRV_PU_SEL BIT(0) +#define TPS65224_BIT_NINT_ENDRV_SEL BIT(1) +#define TPS65224_BIT_EN_PB_DEGL BIT(5) +#define TPS65224_MASK_EN_PB_VSENSE_CONFIG GENMASK(7, 6) + /* GPIO_OUT_X register field definition */ #define TPS6594_BIT_GPIOX_OUT(gpio_inst) BIT((gpio_inst) % 8) @@ -312,6 +351,12 @@ enum pmic_id { #define TPS6594_BIT_GPIOX_IN(gpio_inst) BIT((gpio_inst) % 8) #define TPS6594_BIT_NPWRON_IN BIT(3) +/* GPIO_OUT_X register field definition */ +#define TPS65224_BIT_GPIOX_OUT(gpio_inst) BIT((gpio_inst)) + +/* GPIO_IN_X register field definition */ +#define TPS65224_BIT_GPIOX_IN(gpio_inst) BIT((gpio_inst)) + /* RAIL_SEL_1 register field definition */ #define TPS6594_MASK_BUCK1_GRP_SEL GENMASK(1, 0) #define TPS6594_MASK_BUCK2_GRP_SEL GENMASK(3, 2) @@ -343,6 +388,9 @@ enum pmic_id { #define TPS6594_BIT_GPIOX_FSM_MASK(gpio_inst) BIT(((gpio_inst) << 1) % 8) #define TPS6594_BIT_GPIOX_FSM_MASK_POL(gpio_inst) BIT(((gpio_inst) << 1) % 8 + 1) +#define TPS65224_BIT_GPIOX_FSM_MASK(gpio_inst) BIT(((gpio_inst) << 1) % 6) +#define TPS65224_BIT_GPIOX_FSM_MASK_POL(gpio_inst) BIT(((gpio_inst) << 1) % 6 + 1) + /* MASK_BUCKX register field definition */ #define TPS6594_BIT_BUCKX_OV_MASK(buck_inst) BIT(((buck_inst) << 2) % 8) #define TPS6594_BIT_BUCKX_UV_MASK(buck_inst) BIT(((buck_inst) << 2) % 8 + 1) @@ -361,22 +409,46 @@ enum pmic_id { #define TPS6594_BIT_VMON2_OV_MASK BIT(5) #define TPS6594_BIT_VMON2_UV_MASK BIT(6) +/* MASK_BUCK Register field definition */ +#define TPS65224_BIT_BUCK1_UVOV_MASK BIT(0) +#define TPS65224_BIT_BUCK2_UVOV_MASK BIT(1) +#define TPS65224_BIT_BUCK3_UVOV_MASK BIT(2) +#define TPS65224_BIT_BUCK4_UVOV_MASK BIT(4) + +/* MASK_LDO_VMON register field definition */ +#define TPS65224_BIT_LDO1_UVOV_MASK BIT(0) +#define TPS65224_BIT_LDO2_UVOV_MASK BIT(1) +#define TPS65224_BIT_LDO3_UVOV_MASK BIT(2) +#define TPS65224_BIT_VCCA_UVOV_MASK BIT(4) +#define TPS65224_BIT_VMON1_UVOV_MASK BIT(5) +#define TPS65224_BIT_VMON2_UVOV_MASK BIT(6) + /* MASK_GPIOX register field definition */ #define TPS6594_BIT_GPIOX_FALL_MASK(gpio_inst) BIT((gpio_inst) < 8 ? \ (gpio_inst) : (gpio_inst) % 8) #define TPS6594_BIT_GPIOX_RISE_MASK(gpio_inst) BIT((gpio_inst) < 8 ? \ (gpio_inst) : (gpio_inst) % 8 + 3) +/* MASK_GPIOX register field definition */ +#define TPS65224_BIT_GPIOX_FALL_MASK(gpio_inst) BIT((gpio_inst)) +#define TPS65224_BIT_GPIOX_RISE_MASK(gpio_inst) BIT((gpio_inst)) /* MASK_STARTUP register field definition */ #define TPS6594_BIT_NPWRON_START_MASK BIT(0) #define TPS6594_BIT_ENABLE_MASK BIT(1) #define TPS6594_BIT_FSD_MASK BIT(4) #define TPS6594_BIT_SOFT_REBOOT_MASK BIT(5) +#define TPS65224_BIT_VSENSE_MASK BIT(0) +#define TPS65224_BIT_PB_SHORT_MASK BIT(2) /* MASK_MISC register field definition */ #define TPS6594_BIT_BIST_PASS_MASK BIT(0) #define TPS6594_BIT_EXT_CLK_MASK BIT(1) +#define TPS65224_BIT_REG_UNLOCK_MASK BIT(2) #define TPS6594_BIT_TWARN_MASK BIT(3) +#define TPS65224_BIT_PB_LONG_MASK BIT(4) +#define TPS65224_BIT_PB_FALL_MASK BIT(5) +#define TPS65224_BIT_PB_RISE_MASK BIT(6) +#define TPS65224_BIT_ADC_CONV_READY_MASK BIT(7) /* MASK_MODERATE_ERR register field definition */ #define TPS6594_BIT_BIST_FAIL_MASK BIT(1) @@ -391,6 +463,8 @@ enum pmic_id { #define TPS6594_BIT_ORD_SHUTDOWN_MASK BIT(1) #define TPS6594_BIT_MCU_PWR_ERR_MASK BIT(2) #define TPS6594_BIT_SOC_PWR_ERR_MASK BIT(3) +#define TPS65224_BIT_COMM_ERR_MASK BIT(4) +#define TPS65224_BIT_I2C2_ERR_MASK BIT(5) /* MASK_COMM_ERR register field definition */ #define TPS6594_BIT_COMM_FRM_ERR_MASK BIT(0) @@ -426,6 +500,12 @@ enum pmic_id { #define TPS6594_BIT_BUCK3_4_INT BIT(1) #define TPS6594_BIT_BUCK5_INT BIT(2) +/* INT_BUCK register field definition */ +#define TPS65224_BIT_BUCK1_UVOV_INT BIT(0) +#define TPS65224_BIT_BUCK2_UVOV_INT BIT(1) +#define TPS65224_BIT_BUCK3_UVOV_INT BIT(2) +#define TPS65224_BIT_BUCK4_UVOV_INT BIT(3) + /* INT_BUCKX register field definition */ #define TPS6594_BIT_BUCKX_OV_INT(buck_inst) BIT(((buck_inst) << 2) % 8) #define TPS6594_BIT_BUCKX_UV_INT(buck_inst) BIT(((buck_inst) << 2) % 8 + 1) @@ -437,6 +517,14 @@ enum pmic_id { #define TPS6594_BIT_LDO3_4_INT BIT(1) #define TPS6594_BIT_VCCA_INT BIT(4) +/* INT_LDO_VMON register field definition */ +#define TPS65224_BIT_LDO1_UVOV_INT BIT(0) +#define TPS65224_BIT_LDO2_UVOV_INT BIT(1) +#define TPS65224_BIT_LDO3_UVOV_INT BIT(2) +#define TPS65224_BIT_VCCA_UVOV_INT BIT(4) +#define TPS65224_BIT_VMON1_UVOV_INT BIT(5) +#define TPS65224_BIT_VMON2_UVOV_INT BIT(6) + /* INT_LDOX register field definition */ #define TPS6594_BIT_LDOX_OV_INT(ldo_inst) BIT(((ldo_inst) << 2) % 8) #define TPS6594_BIT_LDOX_UV_INT(ldo_inst) BIT(((ldo_inst) << 2) % 8 + 1) @@ -462,17 +550,32 @@ enum pmic_id { /* INT_GPIOX register field definition */ #define TPS6594_BIT_GPIOX_INT(gpio_inst) BIT(gpio_inst) +/* INT_GPIO register field definition */ +#define TPS65224_BIT_GPIO1_INT BIT(0) +#define TPS65224_BIT_GPIO2_INT BIT(1) +#define TPS65224_BIT_GPIO3_INT BIT(2) +#define TPS65224_BIT_GPIO4_INT BIT(3) +#define TPS65224_BIT_GPIO5_INT BIT(4) +#define TPS65224_BIT_GPIO6_INT BIT(5) + /* INT_STARTUP register field definition */ #define TPS6594_BIT_NPWRON_START_INT BIT(0) +#define TPS65224_BIT_VSENSE_INT BIT(0) #define TPS6594_BIT_ENABLE_INT BIT(1) #define TPS6594_BIT_RTC_INT BIT(2) +#define TPS65224_BIT_PB_SHORT_INT BIT(2) #define TPS6594_BIT_FSD_INT BIT(4) #define TPS6594_BIT_SOFT_REBOOT_INT BIT(5) /* INT_MISC register field definition */ #define TPS6594_BIT_BIST_PASS_INT BIT(0) #define TPS6594_BIT_EXT_CLK_INT BIT(1) +#define TPS65224_BIT_REG_UNLOCK_INT BIT(2) #define TPS6594_BIT_TWARN_INT BIT(3) +#define TPS65224_BIT_PB_LONG_INT BIT(4) +#define TPS65224_BIT_PB_FALL_INT BIT(5) +#define TPS65224_BIT_PB_RISE_INT BIT(6) +#define TPS65224_BIT_ADC_CONV_READY_INT BIT(7) /* INT_MODERATE_ERR register field definition */ #define TPS6594_BIT_TSD_ORD_INT BIT(0) @@ -488,6 +591,7 @@ enum pmic_id { #define TPS6594_BIT_TSD_IMM_INT BIT(0) #define TPS6594_BIT_VCCA_OVP_INT BIT(1) #define TPS6594_BIT_PFSM_ERR_INT BIT(2) +#define TPS65224_BIT_BG_XMON_INT BIT(3) /* INT_FSM_ERR register field definition */ #define TPS6594_BIT_IMM_SHUTDOWN_INT BIT(0) @@ -496,6 +600,7 @@ enum pmic_id { #define TPS6594_BIT_SOC_PWR_ERR_INT BIT(3) #define TPS6594_BIT_COMM_ERR_INT BIT(4) #define TPS6594_BIT_READBACK_ERR_INT BIT(5) +#define TPS65224_BIT_I2C2_ERR_INT BIT(5) #define TPS6594_BIT_ESM_INT BIT(6) #define TPS6594_BIT_WD_INT BIT(7) @@ -536,8 +641,18 @@ enum pmic_id { #define TPS6594_BIT_VMON2_OV_STAT BIT(5) #define TPS6594_BIT_VMON2_UV_STAT BIT(6) +/* STAT_LDO_VMON register field definition */ +#define TPS65224_BIT_LDO1_UVOV_STAT BIT(0) +#define TPS65224_BIT_LDO2_UVOV_STAT BIT(1) +#define TPS65224_BIT_LDO3_UVOV_STAT BIT(2) +#define TPS65224_BIT_VCCA_UVOV_STAT BIT(4) +#define TPS65224_BIT_VMON1_UVOV_STAT BIT(5) +#define TPS65224_BIT_VMON2_UVOV_STAT BIT(6) + /* STAT_STARTUP register field definition */ +#define TPS65224_BIT_VSENSE_STAT BIT(0) #define TPS6594_BIT_ENABLE_STAT BIT(1) +#define TPS65224_BIT_PB_LEVEL_STAT BIT(2) /* STAT_MISC register field definition */ #define TPS6594_BIT_EXT_CLK_STAT BIT(1) @@ -549,6 +664,7 @@ enum pmic_id { /* STAT_SEVERE_ERR register field definition */ #define TPS6594_BIT_TSD_IMM_STAT BIT(0) #define TPS6594_BIT_VCCA_OVP_STAT BIT(1) +#define TPS65224_BIT_BG_XMON_STAT BIT(3) /* STAT_READBACK_ERR register field definition */ #define TPS6594_BIT_EN_DRV_READBACK_STAT BIT(0) @@ -597,6 +713,8 @@ enum pmic_id { #define TPS6594_BIT_BB_CHARGER_EN BIT(0) #define TPS6594_BIT_BB_ICHR BIT(1) #define TPS6594_MASK_BB_VEOC GENMASK(3, 2) +#define TPS65224_BIT_I2C1_SPI_CRC_EN BIT(4) +#define TPS65224_BIT_I2C2_CRC_EN BIT(5) #define TPS6594_BB_EOC_RDY BIT(7) /* ENABLE_DRV_REG register field definition */ @@ -617,6 +735,7 @@ enum pmic_id { #define TPS6594_BIT_NRSTOUT_SOC_IN BIT(2) #define TPS6594_BIT_FORCE_EN_DRV_LOW BIT(3) #define TPS6594_BIT_SPMI_LPM_EN BIT(4) +#define TPS65224_BIT_TSD_DISABLE BIT(5) /* RECOV_CNT_REG_1 register field definition */ #define TPS6594_MASK_RECOV_CNT GENMASK(3, 0) @@ -671,15 +790,27 @@ enum pmic_id { /* ESM_SOC_START_REG register field definition */ #define TPS6594_BIT_ESM_SOC_START BIT(0) +/* ESM_MCU_START_REG register field definition */ +#define TPS65224_BIT_ESM_MCU_START BIT(0) + /* ESM_SOC_MODE_CFG register field definition */ #define TPS6594_MASK_ESM_SOC_ERR_CNT_TH GENMASK(3, 0) #define TPS6594_BIT_ESM_SOC_ENDRV BIT(5) #define TPS6594_BIT_ESM_SOC_EN BIT(6) #define TPS6594_BIT_ESM_SOC_MODE BIT(7) +/* ESM_MCU_MODE_CFG register field definition */ +#define TPS65224_MASK_ESM_MCU_ERR_CNT_TH GENMASK(3, 0) +#define TPS65224_BIT_ESM_MCU_ENDRV BIT(5) +#define TPS65224_BIT_ESM_MCU_EN BIT(6) +#define TPS65224_BIT_ESM_MCU_MODE BIT(7) + /* ESM_SOC_ERR_CNT_REG register field definition */ #define TPS6594_MASK_ESM_SOC_ERR_CNT GENMASK(4, 0) +/* ESM_MCU_ERR_CNT_REG register field definition */ +#define TPS6594_MASK_ESM_MCU_ERR_CNT GENMASK(4, 0) + /* REGISTER_LOCK register field definition */ #define TPS6594_BIT_REGISTER_LOCK_STATUS BIT(0) @@ -687,6 +818,29 @@ enum pmic_id { #define TPS6594_MASK_VMON1_SLEW_RATE GENMASK(2, 0) #define TPS6594_MASK_VMON2_SLEW_RATE GENMASK(5, 3) +/* SRAM_ACCESS_1 Register field definition */ +#define TPS65224_MASk_SRAM_UNLOCK_SEQ GENMASK(7, 0) + +/* SRAM_ACCESS_2 Register field definition */ +#define TPS65224_BIT_SRAM_WRITE_MODE BIT(0) +#define TPS65224_BIT_OTP_PROG_USER BIT(1) +#define TPS65224_BIT_OTP_PROG_PFSM BIT(2) +#define TPS65224_BIT_OTP_PROG_STATUS BIT(3) +#define TPS65224_BIT_SRAM_UNLOCKED BIT(6) +#define TPS65224_USER_PROG_ALLOWED BIT(7) + +/* SRAM_ADDR_CTRL Register field definition */ +#define TPS65224_MASk_SRAM_SEL GENMASK(1, 0) + +/* RECOV_CNT_PFSM_INCR Register field definition */ +#define TPS65224_BIT_INCREMENT_RECOV_CNT BIT(0) + +/* MANUFACTURING_VER Register field definition */ +#define TPS65224_MASK_SILICON_REV GENMASK(7, 0) + +/* CUSTOMER_NVM_ID_REG Register field definition */ +#define TPS65224_MASK_CUSTOMER_NVM_ID GENMASK(7, 0) + /* SOFT_REBOOT_REG register field definition */ #define TPS6594_BIT_SOFT_REBOOT BIT(0) @@ -755,14 +909,83 @@ enum pmic_id { #define TPS6594_BIT_I2C2_CRC_EN BIT(2) #define TPS6594_MASK_T_CRC GENMASK(7, 3) +/* ADC_CTRL Register field definition */ +#define TPS65224_BIT_ADC_START BIT(0) +#define TPS65224_BIT_ADC_CONT_CONV BIT(1) +#define TPS65224_BIT_ADC_THERMAL_SEL BIT(2) +#define TPS65224_BIT_ADC_RDIV_EN BIT(3) +#define TPS65224_BIT_ADC_STATUS BIT(7) + +/* ADC_RESULT_REG_1 Register field definition */ +#define TPS65224_MASK_ADC_RESULT_11_4 GENMASK(7, 0) + +/* ADC_RESULT_REG_2 Register field definition */ +#define TPS65224_MASK_ADC_RESULT_3_0 GENMASK(7, 4) + +/* STARTUP_CTRL Register field definition */ +#define TPS65224_MASK_STARTUP_DEST GENMASK(6, 5) +#define TPS65224_BIT_FIRST_STARTUP_DONE BIT(7) + +/* SCRATCH_PAD_REG_1 Register field definition */ +#define TPS6594_MASK_SCRATCH_PAD_1 GENMASK(7, 0) + +/* SCRATCH_PAD_REG_2 Register field definition */ +#define TPS6594_MASK_SCRATCH_PAD_2 GENMASK(7, 0) + +/* SCRATCH_PAD_REG_3 Register field definition */ +#define TPS6594_MASK_SCRATCH_PAD_3 GENMASK(7, 0) + +/* SCRATCH_PAD_REG_4 Register field definition */ +#define TPS6594_MASK_SCRATCH_PAD_4 GENMASK(7, 0) + +/* PFSM_DELAY_REG_1 Register field definition */ +#define TPS6594_MASK_PFSM_DELAY1 GENMASK(7, 0) + +/* PFSM_DELAY_REG_2 Register field definition */ +#define TPS6594_MASK_PFSM_DELAY2 GENMASK(7, 0) + +/* PFSM_DELAY_REG_3 Register field definition */ +#define TPS6594_MASK_PFSM_DELAY3 GENMASK(7, 0) + +/* PFSM_DELAY_REG_4 Register field definition */ +#define TPS6594_MASK_PFSM_DELAY4 GENMASK(7, 0) + +/* CRC_CALC_CONTROL Register field definition */ +#define TPS65224_BIT_RUN_CRC_BIST BIT(0) +#define TPS65224_BIT_RUN_CRC_UPDATE BIT(1) + +/* ADC_GAIN_COMP_REG Register field definition */ +#define TPS65224_MASK_ADC_GAIN_COMP GENMASK(7, 0) + +/* REGMAP_USER_CRC_LOW Register field definition */ +#define TPS65224_MASK_REGMAP_USER_CRC16_LOW GENMASK(7, 0) + +/* REGMAP_USER_CRC_HIGH Register field definition */ +#define TPS65224_MASK_REGMAP_USER_CRC16_HIGH GENMASK(7, 0) + +/* WD_ANSWER_REG Register field definition */ +#define TPS6594_MASK_WD_ANSWER GENMASK(7, 0) + /* WD_QUESTION_ANSW_CNT register field definition */ #define TPS6594_MASK_WD_QUESTION GENMASK(3, 0) #define TPS6594_MASK_WD_ANSW_CNT GENMASK(5, 4) +#define TPS65224_BIT_INT_TOP_STATUS BIT(7) + +/* WD WIN1_CFG register field definition */ +#define TPS6594_MASK_WD_WIN1_CFG GENMASK(6, 0) + +/* WD WIN2_CFG register field definition */ +#define TPS6594_MASK_WD_WIN2_CFG GENMASK(6, 0) + +/* WD LongWin register field definition */ +#define TPS6594_MASK_WD_LONGWIN_CFG GENMASK(7, 0) /* WD_MODE_REG register field definition */ #define TPS6594_BIT_WD_RETURN_LONGWIN BIT(0) #define TPS6594_BIT_WD_MODE_SELECT BIT(1) #define TPS6594_BIT_WD_PWRHOLD BIT(2) +#define TPS65224_BIT_WD_ENDRV_SEL BIT(6) +#define TPS65224_BIT_WD_CNT_SEL BIT(7) /* WD_QA_CFG register field definition */ #define TPS6594_MASK_WD_QUESTION_SEED GENMASK(3, 0) @@ -993,6 +1216,106 @@ enum tps6594_irqs { #define TPS6594_IRQ_NAME_ALARM "alarm" #define TPS6594_IRQ_NAME_POWERUP "powerup" +/* IRQs */ +enum tps65224_irqs { + /* INT_BUCK register */ + TPS65224_IRQ_BUCK1_UVOV, + TPS65224_IRQ_BUCK2_UVOV, + TPS65224_IRQ_BUCK3_UVOV, + TPS65224_IRQ_BUCK4_UVOV, + /* INT_LDO_VMON register */ + TPS65224_IRQ_LDO1_UVOV, + TPS65224_IRQ_LDO2_UVOV, + TPS65224_IRQ_LDO3_UVOV, + TPS65224_IRQ_VCCA_UVOV, + TPS65224_IRQ_VMON1_UVOV, + TPS65224_IRQ_VMON2_UVOV, + /* INT_GPIO register */ + TPS65224_IRQ_GPIO1, + TPS65224_IRQ_GPIO2, + TPS65224_IRQ_GPIO3, + TPS65224_IRQ_GPIO4, + TPS65224_IRQ_GPIO5, + TPS65224_IRQ_GPIO6, + /* INT_STARTUP register */ + TPS65224_IRQ_VSENSE, + TPS65224_IRQ_ENABLE, + TPS65224_IRQ_PB_SHORT, + TPS65224_IRQ_FSD, + TPS65224_IRQ_SOFT_REBOOT, + /* INT_MISC register */ + TPS65224_IRQ_BIST_PASS, + TPS65224_IRQ_EXT_CLK, + TPS65224_IRQ_REG_UNLOCK, + TPS65224_IRQ_TWARN, + TPS65224_IRQ_PB_LONG, + TPS65224_IRQ_PB_FALL, + TPS65224_IRQ_PB_RISE, + TPS65224_IRQ_ADC_CONV_READY, + /* INT_MODERATE_ERR register */ + TPS65224_IRQ_TSD_ORD, + TPS65224_IRQ_BIST_FAIL, + TPS65224_IRQ_REG_CRC_ERR, + TPS65224_IRQ_RECOV_CNT, + /* INT_SEVERE_ERR register */ + TPS65224_IRQ_TSD_IMM, + TPS65224_IRQ_VCCA_OVP, + TPS65224_IRQ_PFSM_ERR, + TPS65224_IRQ_BG_XMON, + /* INT_FSM_ERR register */ + TPS65224_IRQ_IMM_SHUTDOWN, + TPS65224_IRQ_ORD_SHUTDOWN, + TPS65224_IRQ_MCU_PWR_ERR, + TPS65224_IRQ_SOC_PWR_ERR, + TPS65224_IRQ_COMM_ERR, + TPS65224_IRQ_I2C2_ERR, +}; + +#define TPS65224_IRQ_NAME_BUCK1_UVOV "buck1_uvov" +#define TPS65224_IRQ_NAME_BUCK2_UVOV "buck2_uvov" +#define TPS65224_IRQ_NAME_BUCK3_UVOV "buck3_uvov" +#define TPS65224_IRQ_NAME_BUCK4_UVOV "buck4_uvov" +#define TPS65224_IRQ_NAME_LDO1_UVOV "ldo1_uvov" +#define TPS65224_IRQ_NAME_LDO2_UVOV "ldo2_uvov" +#define TPS65224_IRQ_NAME_LDO3_UVOV "ldo3_uvov" +#define TPS65224_IRQ_NAME_VCCA_UVOV "vcca_uvov" +#define TPS65224_IRQ_NAME_VMON1_UVOV "vmon1_uvov" +#define TPS65224_IRQ_NAME_VMON2_UVOV "vmon2_uvov" +#define TPS65224_IRQ_NAME_GPIO1 "gpio1" +#define TPS65224_IRQ_NAME_GPIO2 "gpio2" +#define TPS65224_IRQ_NAME_GPIO3 "gpio3" +#define TPS65224_IRQ_NAME_GPIO4 "gpio4" +#define TPS65224_IRQ_NAME_GPIO5 "gpio5" +#define TPS65224_IRQ_NAME_GPIO6 "gpio6" +#define TPS65224_IRQ_NAME_VSENSE "vsense" +#define TPS65224_IRQ_NAME_ENABLE "enable" +#define TPS65224_IRQ_NAME_PB_SHORT "pb_short" +#define TPS65224_IRQ_NAME_FSD "fsd" +#define TPS65224_IRQ_NAME_SOFT_REBOOT "soft_reboot" +#define TPS65224_IRQ_NAME_BIST_PASS "bist_pass" +#define TPS65224_IRQ_NAME_EXT_CLK "ext_clk" +#define TPS65224_IRQ_NAME_REG_UNLOCK "reg_unlock" +#define TPS65224_IRQ_NAME_TWARN "twarn" +#define TPS65224_IRQ_NAME_PB_LONG "pb_long" +#define TPS65224_IRQ_NAME_PB_FALL "pb_fall" +#define TPS65224_IRQ_NAME_PB_RISE "pb_rise" +#define TPS65224_IRQ_NAME_ADC_CONV_READY "adc_conv_ready" +#define TPS65224_IRQ_NAME_TSD_ORD "tsd_ord" +#define TPS65224_IRQ_NAME_BIST_FAIL "bist_fail" +#define TPS65224_IRQ_NAME_REG_CRC_ERR "reg_crc_err" +#define TPS65224_IRQ_NAME_RECOV_CNT "recov_cnt" +#define TPS65224_IRQ_NAME_TSD_IMM "tsd_imm" +#define TPS65224_IRQ_NAME_VCCA_OVP "vcca_ovp" +#define TPS65224_IRQ_NAME_PFSM_ERR "pfsm_err" +#define TPS65224_IRQ_NAME_BG_XMON "bg_xmon" +#define TPS65224_IRQ_NAME_IMM_SHUTDOWN "imm_shutdown" +#define TPS65224_IRQ_NAME_ORD_SHUTDOWN "ord_shutdown" +#define TPS65224_IRQ_NAME_MCU_PWR_ERR "mcu_pwr_err" +#define TPS65224_IRQ_NAME_SOC_PWR_ERR "soc_pwr_err" +#define TPS65224_IRQ_NAME_COMM_ERR "comm_err" +#define TPS65224_IRQ_NAME_I2C2_ERR "i2c2_err" +#define TPS65224_IRQ_NAME_POWERUP "powerup" + /** * struct tps6594 - device private data structure * @@ -1014,7 +1337,9 @@ struct tps6594 { struct regmap_irq_chip_data *irq_data; }; -bool tps6594_is_volatile_reg(struct device *dev, unsigned int reg); +extern const struct regmap_access_table tps6594_volatile_table; +extern const struct regmap_access_table tps65224_volatile_table; + int tps6594_device_init(struct tps6594 *tps, bool enable_crc); #endif /* __LINUX_MFD_TPS6594_H */ |