diff options
author | Alexandru Ardelean <alexandru.ardelean@analog.com> | 2020-04-10 23:40:37 +0800 |
---|---|---|
committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-04-11 01:45:52 +0800 |
commit | 6dd5d3b8ad2b5a30509c76f164a61b32351aafdd (patch) | |
tree | a9da23b32714dbcab7a29d4e11b54a565c4cb6ac | |
parent | f26e433185cb2830b933df3a4d378558fe2fccd9 (diff) |
arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'
There is no more 'altr,gpio-bank-width' in the 'altr,pio-1.0' driver.
There is a 'altr,ngpio' which is what the property wants to configure.
This change updates all occurrences of 'altr,gpio-bank-width' to
'altr,ngpio'.
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
-rw-r--r-- | Documentation/devicetree/bindings/fpga/fpga-region.txt | 4 | ||||
-rw-r--r-- | arch/nios2/boot/dts/10m50_devboard.dts | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt index 90c44694a30b..b0dacb6a3390 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt @@ -263,7 +263,7 @@ Overlay contains: gpio@10040 { compatible = "altr,pio-1.0"; reg = <0x10040 0x20>; - altr,gpio-bank-width = <4>; + altr,ngpio = <4>; #gpio-cells = <2>; clocks = <2>; gpio-controller; @@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1. compatible = "altr,pio-1.0"; reg = <0x10040 0x20>; clocks = <0x2>; - altr,gpio-bank-width = <0x4>; + altr,ngpio = <0x4>; resetvalue = <0x0>; #gpio-cells = <0x2>; gpio-controller; diff --git a/arch/nios2/boot/dts/10m50_devboard.dts b/arch/nios2/boot/dts/10m50_devboard.dts index 5e4ab032c1e8..739ad96a6cc1 100644 --- a/arch/nios2/boot/dts/10m50_devboard.dts +++ b/arch/nios2/boot/dts/10m50_devboard.dts @@ -179,7 +179,7 @@ led_pio: gpio@180014d0 { compatible = "altr,pio-1.0"; reg = <0x180014d0 0x00000010>; - altr,gpio-bank-width = <4>; + altr,ngpio = <4>; resetvalue = <15>; #gpio-cells = <2>; gpio-controller; @@ -190,7 +190,7 @@ reg = <0x180014c0 0x00000010>; interrupt-parent = <&cpu>; interrupts = <6>; - altr,gpio-bank-width = <3>; + altr,ngpio = <3>; altr,interrupt-type = <2>; edge_type = <1>; level_trigger = <0>; |