diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2022-01-01 19:28:06 +0100 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@kernel.org> | 2023-01-22 09:11:57 +0100 |
| commit | 40f75457983f1d3fb01a89dfa8f1f3d5339decbc (patch) | |
| tree | 5213ddc30d742049225cc2aaf45092a071dc561a | |
| parent | 3697f1089cd04fbc8c3c3058b20b5f1eb6bd776e (diff) | |
media: i2c: max9286: Select HS as data enable signal
GMSL can transport three synchronization signals: VSync, HSync and Data
Enable. The MAX9286 can select either HS or DE as a line valid signal.
Not all serializers (and transmission formats) support the DE signal.
The MAX9271, used by the RDACM20 and RDACM21 cameras, doesn't document
DE support. Nonetheless, the max9286 driver selects the DE signal as
line valid in register 0x0c (by not setting the DESEL bit). It's not
clear why this works. As HS is a more common line valid qualifier, set
the DESEL bit by default. This is needed to support the onsemi MARS
cameras.
If a camera requires usage of the DE signal in the future, this will
need to be made configurable.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo@jmondi.org> # On Eagle V3M with RDACM20
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
| -rw-r--r-- | drivers/media/i2c/max9286.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c index bc423218eb83..0aa936c95a13 100644 --- a/drivers/media/i2c/max9286.c +++ b/drivers/media/i2c/max9286.c @@ -567,9 +567,12 @@ static void max9286_set_video_format(struct max9286_priv *priv, MAX9286_CSILANECNT(priv->csi2_data_lanes) | info->datatype); - /* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */ - max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS | - MAX9286_HVSRC_D14); + /* + * Enable HS/VS encoding, use HS as line valid source, use D14/15 for + * HS/VS, invert VS. + */ + max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_DESEL | + MAX9286_INVVS | MAX9286_HVSRC_D14); } static void max9286_set_fsync_period(struct max9286_priv *priv) |