1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
[ { "ArchStdEvent": "CPU_CYCLES" }, { "ArchStdEvent": "BUS_CYCLES" }, { "ArchStdEvent": "BUS_ACCESS_RD" }, { "ArchStdEvent": "BUS_ACCESS_WR" }, { "ArchStdEvent": "BUS_ACCESS" }, { "ArchStdEvent": "CNT_CYCLES" } ]