1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355
4356
4357
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385
4386
4387
4388
4389
4390
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427
4428
4429
4430
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469
4470
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503
4504
4505
4506
4507
4508
4509
4510
4511
4512
4513
4514
4515
4516
4517
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
4534
4535
4536
4537
4538
4539
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592
4593
4594
4595
4596
4597
4598
4599
4600
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622
4623
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639
4640
4641
4642
4643
4644
4645
4646
4647
4648
4649
4650
4651
4652
4653
4654
4655
4656
4657
4658
4659
4660
4661
4662
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676
4677
4678
4679
4680
4681
4682
4683
4684
4685
4686
4687
4688
4689
4690
4691
4692
4693
4694
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706
4707
4708
4709
4710
4711
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728
4729
4730
4731
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741
4742
4743
4744
4745
4746
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
|
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
*/
#ifndef ATH11K_WMI_H
#define ATH11K_WMI_H
#include <net/mac80211.h>
#include "htc.h"
struct ath11k_base;
struct ath11k;
struct ath11k_fw_stats;
#define PSOC_HOST_MAX_NUM_SS (8)
/* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
#define MAX_HE_NSS 8
#define MAX_HE_MODULATION 8
#define MAX_HE_RU 4
#define HE_MODULATION_NONE 7
#define HE_PET_0_USEC 0
#define HE_PET_8_USEC 1
#define HE_PET_16_USEC 2
#define WMI_MAX_NUM_SS MAX_HE_NSS
#define WMI_MAX_NUM_RU MAX_HE_RU
#define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
#define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
#define WMI_TLV_CMD_UNSUPPORTED 0
#define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
#define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
struct wmi_cmd_hdr {
u32 cmd_id;
} __packed;
struct wmi_tlv {
u32 header;
u8 value[0];
} __packed;
#define WMI_TLV_LEN GENMASK(15, 0)
#define WMI_TLV_TAG GENMASK(31, 16)
#define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header)
#define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
#define WMI_MAX_MEM_REQS 32
#define ATH11K_MAX_HW_LISTEN_INTERVAL 5
#define WLAN_SCAN_PARAMS_MAX_SSID 16
#define WLAN_SCAN_PARAMS_MAX_BSSID 4
#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
#define WMI_BA_MODE_BUFFER_SIZE_256 3
/*
* HW mode config type replicated from FW header
* @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
* @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
* one in 2G and another in 5G.
* @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
* same band; no tx allowed.
* @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
* Support for both PHYs within one band is planned
* for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
* but could be extended to other bands in the future.
* The separation of the band between the two PHYs needs
* to be communicated separately.
* @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
* as in WMI_HW_MODE_SBS, and 3rd on the other band
* @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
* 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
* @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
*/
enum wmi_host_hw_mode_config_type {
WMI_HOST_HW_MODE_SINGLE = 0,
WMI_HOST_HW_MODE_DBS = 1,
WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
WMI_HOST_HW_MODE_SBS = 3,
WMI_HOST_HW_MODE_DBS_SBS = 4,
WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
/* keep last */
WMI_HOST_HW_MODE_MAX
};
/* HW mode priority values used to detect the preferred HW mode
* on the available modes.
*/
enum wmi_host_hw_mode_priority {
WMI_HOST_HW_MODE_DBS_SBS_PRI,
WMI_HOST_HW_MODE_DBS_PRI,
WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
WMI_HOST_HW_MODE_SBS_PRI,
WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
WMI_HOST_HW_MODE_SINGLE_PRI,
/* keep last the lowest priority */
WMI_HOST_HW_MODE_MAX_PRI
};
enum {
WMI_HOST_WLAN_2G_CAP = 0x1,
WMI_HOST_WLAN_5G_CAP = 0x2,
WMI_HOST_WLAN_2G_5G_CAP = 0x3,
};
/*
* wmi command groups.
*/
enum wmi_cmd_group {
/* 0 to 2 are reserved */
WMI_GRP_START = 0x3,
WMI_GRP_SCAN = WMI_GRP_START,
WMI_GRP_PDEV = 0x4,
WMI_GRP_VDEV = 0x5,
WMI_GRP_PEER = 0x6,
WMI_GRP_MGMT = 0x7,
WMI_GRP_BA_NEG = 0x8,
WMI_GRP_STA_PS = 0x9,
WMI_GRP_DFS = 0xa,
WMI_GRP_ROAM = 0xb,
WMI_GRP_OFL_SCAN = 0xc,
WMI_GRP_P2P = 0xd,
WMI_GRP_AP_PS = 0xe,
WMI_GRP_RATE_CTRL = 0xf,
WMI_GRP_PROFILE = 0x10,
WMI_GRP_SUSPEND = 0x11,
WMI_GRP_BCN_FILTER = 0x12,
WMI_GRP_WOW = 0x13,
WMI_GRP_RTT = 0x14,
WMI_GRP_SPECTRAL = 0x15,
WMI_GRP_STATS = 0x16,
WMI_GRP_ARP_NS_OFL = 0x17,
WMI_GRP_NLO_OFL = 0x18,
WMI_GRP_GTK_OFL = 0x19,
WMI_GRP_CSA_OFL = 0x1a,
WMI_GRP_CHATTER = 0x1b,
WMI_GRP_TID_ADDBA = 0x1c,
WMI_GRP_MISC = 0x1d,
WMI_GRP_GPIO = 0x1e,
WMI_GRP_FWTEST = 0x1f,
WMI_GRP_TDLS = 0x20,
WMI_GRP_RESMGR = 0x21,
WMI_GRP_STA_SMPS = 0x22,
WMI_GRP_WLAN_HB = 0x23,
WMI_GRP_RMC = 0x24,
WMI_GRP_MHF_OFL = 0x25,
WMI_GRP_LOCATION_SCAN = 0x26,
WMI_GRP_OEM = 0x27,
WMI_GRP_NAN = 0x28,
WMI_GRP_COEX = 0x29,
WMI_GRP_OBSS_OFL = 0x2a,
WMI_GRP_LPI = 0x2b,
WMI_GRP_EXTSCAN = 0x2c,
WMI_GRP_DHCP_OFL = 0x2d,
WMI_GRP_IPA = 0x2e,
WMI_GRP_MDNS_OFL = 0x2f,
WMI_GRP_SAP_OFL = 0x30,
WMI_GRP_OCB = 0x31,
WMI_GRP_SOC = 0x32,
WMI_GRP_PKT_FILTER = 0x33,
WMI_GRP_MAWC = 0x34,
WMI_GRP_PMF_OFFLOAD = 0x35,
WMI_GRP_BPF_OFFLOAD = 0x36,
WMI_GRP_NAN_DATA = 0x37,
WMI_GRP_PROTOTYPE = 0x38,
WMI_GRP_MONITOR = 0x39,
WMI_GRP_REGULATORY = 0x3a,
WMI_GRP_HW_DATA_FILTER = 0x3b,
WMI_GRP_WLM = 0x3c,
WMI_GRP_11K_OFFLOAD = 0x3d,
WMI_GRP_TWT = 0x3e,
WMI_GRP_MOTION_DET = 0x3f,
WMI_GRP_SPATIAL_REUSE = 0x40,
};
#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
#define WMI_CMD_UNSUPPORTED 0
enum wmi_tlv_cmd_id {
WMI_INIT_CMDID = 0x1,
WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
WMI_STOP_SCAN_CMDID,
WMI_SCAN_CHAN_LIST_CMDID,
WMI_SCAN_SCH_PRIO_TBL_CMDID,
WMI_SCAN_UPDATE_REQUEST_CMDID,
WMI_SCAN_PROB_REQ_OUI_CMDID,
WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
WMI_PDEV_SET_CHANNEL_CMDID,
WMI_PDEV_SET_PARAM_CMDID,
WMI_PDEV_PKTLOG_ENABLE_CMDID,
WMI_PDEV_PKTLOG_DISABLE_CMDID,
WMI_PDEV_SET_WMM_PARAMS_CMDID,
WMI_PDEV_SET_HT_CAP_IE_CMDID,
WMI_PDEV_SET_VHT_CAP_IE_CMDID,
WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
WMI_PDEV_SET_QUIET_MODE_CMDID,
WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
WMI_PDEV_GET_TPC_CONFIG_CMDID,
WMI_PDEV_SET_BASE_MACADDR_CMDID,
WMI_PDEV_DUMP_CMDID,
WMI_PDEV_SET_LED_CONFIG_CMDID,
WMI_PDEV_GET_TEMPERATURE_CMDID,
WMI_PDEV_SET_LED_FLASHING_CMDID,
WMI_PDEV_SMART_ANT_ENABLE_CMDID,
WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
WMI_PDEV_SET_CTL_TABLE_CMDID,
WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
WMI_PDEV_FIPS_CMDID,
WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
WMI_PDEV_GET_NFCAL_POWER_CMDID,
WMI_PDEV_GET_TPC_CMDID,
WMI_MIB_STATS_ENABLE_CMDID,
WMI_PDEV_SET_PCL_CMDID,
WMI_PDEV_SET_HW_MODE_CMDID,
WMI_PDEV_SET_MAC_CONFIG_CMDID,
WMI_PDEV_SET_ANTENNA_MODE_CMDID,
WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
WMI_PDEV_WAL_POWER_DEBUG_CMDID,
WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
WMI_PDEV_CHECK_CAL_VERSION_CMDID,
WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
WMI_PDEV_PKTLOG_FILTER_CMDID,
WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
WMI_VDEV_DELETE_CMDID,
WMI_VDEV_START_REQUEST_CMDID,
WMI_VDEV_RESTART_REQUEST_CMDID,
WMI_VDEV_UP_CMDID,
WMI_VDEV_STOP_CMDID,
WMI_VDEV_DOWN_CMDID,
WMI_VDEV_SET_PARAM_CMDID,
WMI_VDEV_INSTALL_KEY_CMDID,
WMI_VDEV_WNM_SLEEPMODE_CMDID,
WMI_VDEV_WMM_ADDTS_CMDID,
WMI_VDEV_WMM_DELTS_CMDID,
WMI_VDEV_SET_WMM_PARAMS_CMDID,
WMI_VDEV_SET_GTX_PARAMS_CMDID,
WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
WMI_VDEV_PLMREQ_START_CMDID,
WMI_VDEV_PLMREQ_STOP_CMDID,
WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
WMI_VDEV_SET_IE_CMDID,
WMI_VDEV_RATEMASK_CMDID,
WMI_VDEV_ATF_REQUEST_CMDID,
WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
WMI_VDEV_SET_QUIET_MODE_CMDID,
WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
WMI_PEER_DELETE_CMDID,
WMI_PEER_FLUSH_TIDS_CMDID,
WMI_PEER_SET_PARAM_CMDID,
WMI_PEER_ASSOC_CMDID,
WMI_PEER_ADD_WDS_ENTRY_CMDID,
WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
WMI_PEER_MCAST_GROUP_CMDID,
WMI_PEER_INFO_REQ_CMDID,
WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
WMI_PEER_ATF_REQUEST_CMDID,
WMI_PEER_BWF_REQUEST_CMDID,
WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
WMI_PEER_ANTDIV_INFO_REQ_CMDID,
WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
WMI_PDEV_SEND_BCN_CMDID,
WMI_BCN_TMPL_CMDID,
WMI_BCN_FILTER_RX_CMDID,
WMI_PRB_REQ_FILTER_RX_CMDID,
WMI_MGMT_TX_CMDID,
WMI_PRB_TMPL_CMDID,
WMI_MGMT_TX_SEND_CMDID,
WMI_OFFCHAN_DATA_TX_SEND_CMDID,
WMI_PDEV_SEND_FD_CMDID,
WMI_BCN_OFFLOAD_CTRL_CMDID,
WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
WMI_ADDBA_SEND_CMDID,
WMI_ADDBA_STATUS_CMDID,
WMI_DELBA_SEND_CMDID,
WMI_ADDBA_SET_RESP_CMDID,
WMI_SEND_SINGLEAMSDU_CMDID,
WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
WMI_STA_POWERSAVE_PARAM_CMDID,
WMI_STA_MIMO_PS_MODE_CMDID,
WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
WMI_PDEV_DFS_DISABLE_CMDID,
WMI_DFS_PHYERR_FILTER_ENA_CMDID,
WMI_DFS_PHYERR_FILTER_DIS_CMDID,
WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
WMI_VDEV_ADFS_CH_CFG_CMDID,
WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
WMI_ROAM_SCAN_RSSI_THRESHOLD,
WMI_ROAM_SCAN_PERIOD,
WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
WMI_ROAM_AP_PROFILE,
WMI_ROAM_CHAN_LIST,
WMI_ROAM_SCAN_CMD,
WMI_ROAM_SYNCH_COMPLETE,
WMI_ROAM_SET_RIC_REQUEST_CMDID,
WMI_ROAM_INVOKE_CMDID,
WMI_ROAM_FILTER_CMDID,
WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
WMI_ROAM_CONFIGURE_MAWC_CMDID,
WMI_ROAM_SET_MBO_PARAM_CMDID,
WMI_ROAM_PER_CONFIG_CMDID,
WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
WMI_OFL_SCAN_REMOVE_AP_PROFILE,
WMI_OFL_SCAN_PERIOD,
WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
WMI_P2P_DEV_SET_DISCOVERABILITY,
WMI_P2P_GO_SET_BEACON_IE,
WMI_P2P_GO_SET_PROBE_RESP_IE,
WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
WMI_P2P_SET_OPPPS_PARAM_CMDID,
WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
WMI_AP_PS_EGAP_PARAM_CMDID,
WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
WMI_PDEV_RESUME_CMDID,
WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
WMI_RMV_BCN_FILTER_CMDID,
WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
WMI_WOW_DEL_WAKE_PATTERN_CMDID,
WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
WMI_WOW_ENABLE_CMDID,
WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
WMI_D0_WOW_ENABLE_DISABLE_CMDID,
WMI_EXTWOW_ENABLE_CMDID,
WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
WMI_WOW_UDP_SVC_OFLD_CMDID,
WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
WMI_RTT_TSF_CMDID,
WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
WMI_REQUEST_STATS_EXT_CMDID,
WMI_REQUEST_LINK_STATS_CMDID,
WMI_START_LINK_STATS_CMDID,
WMI_CLEAR_LINK_STATS_CMDID,
WMI_GET_FW_MEM_DUMP_CMDID,
WMI_DEBUG_MESG_FLUSH_CMDID,
WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
WMI_REQUEST_WLAN_STATS_CMDID,
WMI_REQUEST_RCPI_CMDID,
WMI_REQUEST_PEER_STATS_INFO_CMDID,
WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
WMI_APFIND_CMDID,
WMI_PASSPOINT_LIST_CONFIG_CMDID,
WMI_NLO_CONFIGURE_MAWC_CMDID,
WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
WMI_CHATTER_COALESCING_QUERY_CMDID,
WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
WMI_PEER_TID_DELBA_CMDID,
WMI_STA_DTIM_PS_METHOD_CMDID,
WMI_STA_UAPSD_AUTO_TRIG_CMDID,
WMI_STA_KEEPALIVE_CMDID,
WMI_BA_REQ_SSN_CMDID,
WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
WMI_PDEV_UTF_CMDID,
WMI_DBGLOG_CFG_CMDID,
WMI_PDEV_QVIT_CMDID,
WMI_PDEV_FTM_INTG_CMDID,
WMI_VDEV_SET_KEEPALIVE_CMDID,
WMI_VDEV_GET_KEEPALIVE_CMDID,
WMI_FORCE_FW_HANG_CMDID,
WMI_SET_MCASTBCAST_FILTER_CMDID,
WMI_THERMAL_MGMT_CMDID,
WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
WMI_TPC_CHAINMASK_CONFIG_CMDID,
WMI_SET_ANTENNA_DIVERSITY_CMDID,
WMI_OCB_SET_SCHED_CMDID,
WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
WMI_LRO_CONFIG_CMDID,
WMI_TRANSFER_DATA_TO_FLASH_CMDID,
WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
WMI_VDEV_WISA_CMDID,
WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
WMI_READ_DATA_FROM_FLASH_CMDID,
WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
WMI_GPIO_OUTPUT_CMDID,
WMI_TXBF_CMDID,
WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
WMI_UNIT_TEST_CMDID,
WMI_FWTEST_CMDID,
WMI_QBOOST_CFG_CMDID,
WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
WMI_TDLS_PEER_UPDATE_CMDID,
WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
WMI_STA_SMPS_PARAM_CMDID,
WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
WMI_HB_SET_TCP_PARAMS_CMDID,
WMI_HB_SET_TCP_PKT_FILTER_CMDID,
WMI_HB_SET_UDP_PARAMS_CMDID,
WMI_HB_SET_UDP_PKT_FILTER_CMDID,
WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
WMI_RMC_SET_ACTION_PERIOD_CMDID,
WMI_RMC_CONFIG_CMDID,
WMI_RMC_SET_MANUAL_LEADER_CMDID,
WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
WMI_BATCH_SCAN_DISABLE_CMDID,
WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
WMI_OEM_REQUEST_CMDID,
WMI_LPI_OEM_REQ_CMDID,
WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
WMI_CHAN_AVOID_UPDATE_CMDID,
WMI_COEX_CONFIG_CMDID,
WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
WMI_SAR_LIMITS_CMDID,
WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
WMI_OBSS_SCAN_DISABLE_CMDID,
WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
WMI_LPI_START_SCAN_CMDID,
WMI_LPI_STOP_SCAN_CMDID,
WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
WMI_EXTSCAN_STOP_CMDID,
WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
WMI_MDNS_SET_FQDN_CMDID,
WMI_MDNS_SET_RESPONSE_CMDID,
WMI_MDNS_GET_STATS_CMDID,
WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
WMI_OCB_SET_UTC_TIME_CMDID,
WMI_OCB_START_TIMING_ADVERT_CMDID,
WMI_OCB_STOP_TIMING_ADVERT_CMDID,
WMI_OCB_GET_TSF_TIMER_CMDID,
WMI_DCC_GET_STATS_CMDID,
WMI_DCC_CLEAR_STATS_CMDID,
WMI_DCC_UPDATE_NDL_CMDID,
WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
WMI_SOC_SET_HW_MODE_CMDID,
WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
WMI_SOC_SET_ANTENNA_MODE_CMDID,
WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
WMI_PACKET_FILTER_ENABLE_CMDID,
WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
WMI_BPF_GET_VDEV_STATS_CMDID,
WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
WMI_11D_SCAN_START_CMDID,
WMI_11D_SCAN_STOP_CMDID,
WMI_SET_INIT_COUNTRY_CMDID,
WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
WMI_NDP_INITIATOR_REQ_CMDID,
WMI_NDP_RESPONDER_REQ_CMDID,
WMI_NDP_END_REQ_CMDID,
WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
WMI_TWT_DISABLE_CMDID,
WMI_TWT_ADD_DIALOG_CMDID,
WMI_TWT_DEL_DIALOG_CMDID,
WMI_TWT_PAUSE_DIALOG_CMDID,
WMI_TWT_RESUME_DIALOG_CMDID,
WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
};
enum wmi_tlv_event_id {
WMI_SERVICE_READY_EVENTID = 0x1,
WMI_READY_EVENTID,
WMI_SERVICE_AVAILABLE_EVENTID,
WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
WMI_CHAN_INFO_EVENTID,
WMI_PHYERR_EVENTID,
WMI_PDEV_DUMP_EVENTID,
WMI_TX_PAUSE_EVENTID,
WMI_DFS_RADAR_EVENTID,
WMI_PDEV_L1SS_TRACK_EVENTID,
WMI_PDEV_TEMPERATURE_EVENTID,
WMI_SERVICE_READY_EXT_EVENTID,
WMI_PDEV_FIPS_EVENTID,
WMI_PDEV_CHANNEL_HOPPING_EVENTID,
WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
WMI_PDEV_TPC_EVENTID,
WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
WMI_PDEV_ANTDIV_STATUS_EVENTID,
WMI_PDEV_CHIP_POWER_STATS_EVENTID,
WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
WMI_PDEV_BSS_CHAN_INFO_EVENTID,
WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
WMI_VDEV_STOPPED_EVENTID,
WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
WMI_VDEV_TSF_REPORT_EVENTID,
WMI_VDEV_DELETE_RESP_EVENTID,
WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
WMI_PEER_INFO_EVENTID,
WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
WMI_PEER_STATE_EVENTID,
WMI_PEER_ASSOC_CONF_EVENTID,
WMI_PEER_DELETE_RESP_EVENTID,
WMI_PEER_RATECODE_LIST_EVENTID,
WMI_WDS_PEER_EVENTID,
WMI_PEER_STA_PS_STATECHG_EVENTID,
WMI_PEER_ANTDIV_INFO_EVENTID,
WMI_PEER_RESERVED0_EVENTID,
WMI_PEER_RESERVED1_EVENTID,
WMI_PEER_RESERVED2_EVENTID,
WMI_PEER_RESERVED3_EVENTID,
WMI_PEER_RESERVED4_EVENTID,
WMI_PEER_RESERVED5_EVENTID,
WMI_PEER_RESERVED6_EVENTID,
WMI_PEER_RESERVED7_EVENTID,
WMI_PEER_RESERVED8_EVENTID,
WMI_PEER_RESERVED9_EVENTID,
WMI_PEER_RESERVED10_EVENTID,
WMI_PEER_OPER_MODE_CHANGE_EVENTID,
WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
WMI_HOST_SWBA_EVENTID,
WMI_TBTTOFFSET_UPDATE_EVENTID,
WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
WMI_MGMT_TX_COMPLETION_EVENTID,
WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
WMI_TX_ADDBA_COMPLETE_EVENTID,
WMI_BA_RSP_SSN_EVENTID,
WMI_AGGR_STATE_TRIG_EVENTID,
WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
WMI_PROFILE_MATCH,
WMI_ROAM_SYNCH_EVENTID,
WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
WMI_P2P_NOA_EVENTID,
WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
WMI_D0_WOW_DISABLE_ACK_EVENTID,
WMI_WOW_INITIAL_WAKEUP_EVENTID,
WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
WMI_TSF_MEASUREMENT_REPORT_EVENTID,
WMI_RTT_ERROR_REPORT_EVENTID,
WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
WMI_IFACE_LINK_STATS_EVENTID,
WMI_PEER_LINK_STATS_EVENTID,
WMI_RADIO_LINK_STATS_EVENTID,
WMI_UPDATE_FW_MEM_DUMP_EVENTID,
WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
WMI_INST_RSSI_STATS_EVENTID,
WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
WMI_REPORT_STATS_EVENTID,
WMI_UPDATE_RCPI_EVENTID,
WMI_PEER_STATS_INFO_EVENTID,
WMI_RADIO_CHAN_STATS_EVENTID,
WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
WMI_NLO_SCAN_COMPLETE_EVENTID,
WMI_APFIND_EVENTID,
WMI_PASSPOINT_MATCH_EVENTID,
WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
WMI_GTK_REKEY_FAIL_EVENTID,
WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
WMI_PDEV_UTF_EVENTID,
WMI_DEBUG_MESG_EVENTID,
WMI_UPDATE_STATS_EVENTID,
WMI_DEBUG_PRINT_EVENTID,
WMI_DCS_INTERFERENCE_EVENTID,
WMI_PDEV_QVIT_EVENTID,
WMI_WLAN_PROFILE_DATA_EVENTID,
WMI_PDEV_FTM_INTG_EVENTID,
WMI_WLAN_FREQ_AVOID_EVENTID,
WMI_VDEV_GET_KEEPALIVE_EVENTID,
WMI_THERMAL_MGMT_EVENTID,
WMI_DIAG_DATA_CONTAINER_EVENTID,
WMI_HOST_AUTO_SHUTDOWN_EVENTID,
WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
WMI_DIAG_EVENTID,
WMI_OCB_SET_SCHED_EVENTID,
WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
WMI_RSSI_BREACH_EVENTID,
WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
WMI_PDEV_UTF_SCPC_EVENTID,
WMI_READ_DATA_FROM_FLASH_EVENTID,
WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
WMI_PKGID_EVENTID,
WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
WMI_UPLOADH_EVENTID,
WMI_CAPTUREH_EVENTID,
WMI_RFKILL_STATE_CHANGE_EVENTID,
WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
WMI_BATCH_SCAN_RESULT_EVENTID,
WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
WMI_OEM_MEASUREMENT_REPORT_EVENTID,
WMI_OEM_ERROR_REPORT_EVENTID,
WMI_OEM_RESPONSE_EVENTID,
WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
WMI_NAN_DISC_IFACE_CREATED_EVENTID,
WMI_NAN_DISC_IFACE_DELETED_EVENTID,
WMI_NAN_STARTED_CLUSTER_EVENTID,
WMI_NAN_JOINED_CLUSTER_EVENTID,
WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
WMI_LPI_STATUS_EVENTID,
WMI_LPI_HANDOFF_EVENTID,
WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
WMI_EXTSCAN_OPERATION_EVENTID,
WMI_EXTSCAN_TABLE_USAGE_EVENTID,
WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
WMI_EXTSCAN_CAPABILITIES_EVENTID,
WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
WMI_SAP_OFL_DEL_STA_EVENTID,
WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
WMI_DCC_GET_STATS_RESP_EVENTID,
WMI_DCC_UPDATE_NDL_RESP_EVENTID,
WMI_DCC_STATS_EVENTID,
WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
WMI_SOC_HW_MODE_TRANSITION_EVENTID,
WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
WMI_BPF_VDEV_STATS_INFO_EVENTID,
WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
WMI_11D_NEW_COUNTRY_EVENTID,
WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
WMI_NDP_INITIATOR_RSP_EVENTID,
WMI_NDP_RESPONDER_RSP_EVENTID,
WMI_NDP_END_RSP_EVENTID,
WMI_NDP_INDICATION_EVENTID,
WMI_NDP_CONFIRM_EVENTID,
WMI_NDP_END_INDICATION_EVENTID,
WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
WMI_TWT_DISABLE_EVENTID,
WMI_TWT_ADD_DIALOG_EVENTID,
WMI_TWT_DEL_DIALOG_EVENTID,
WMI_TWT_PAUSE_DIALOG_EVENTID,
WMI_TWT_RESUME_DIALOG_EVENTID,
};
enum wmi_tlv_pdev_param {
WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
WMI_PDEV_PARAM_RX_CHAIN_MASK,
WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
WMI_PDEV_PARAM_TXPOWER_SCALE,
WMI_PDEV_PARAM_BEACON_GEN_MODE,
WMI_PDEV_PARAM_BEACON_TX_MODE,
WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
WMI_PDEV_PARAM_PROTECTION_MODE,
WMI_PDEV_PARAM_DYNAMIC_BW,
WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
WMI_PDEV_PARAM_STA_KICKOUT_TH,
WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
WMI_PDEV_PARAM_LTR_ENABLE,
WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
WMI_PDEV_PARAM_L1SS_ENABLE,
WMI_PDEV_PARAM_DSLEEP_ENABLE,
WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
WMI_PDEV_PARAM_PMF_QOS,
WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
WMI_PDEV_PARAM_DCS,
WMI_PDEV_PARAM_ANI_ENABLE,
WMI_PDEV_PARAM_ANI_POLL_PERIOD,
WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
WMI_PDEV_PARAM_ANI_CCK_LEVEL,
WMI_PDEV_PARAM_DYNTXCHAIN,
WMI_PDEV_PARAM_PROXY_STA,
WMI_PDEV_PARAM_IDLE_PS_CONFIG,
WMI_PDEV_PARAM_POWER_GATING_SLEEP,
WMI_PDEV_PARAM_RFKILL_ENABLE,
WMI_PDEV_PARAM_BURST_DUR,
WMI_PDEV_PARAM_BURST_ENABLE,
WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
WMI_PDEV_PARAM_L1SS_TRACK,
WMI_PDEV_PARAM_HYST_EN,
WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
WMI_PDEV_PARAM_LED_SYS_STATE,
WMI_PDEV_PARAM_LED_ENABLE,
WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
WMI_PDEV_PARAM_CTS_CBW,
WMI_PDEV_PARAM_WNTS_CONFIG,
WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
WMI_PDEV_PARAM_TXPOWER_DECR_DB,
WMI_PDEV_PARAM_AGGR_BURST,
WMI_PDEV_PARAM_RX_DECAP_MODE,
WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
WMI_PDEV_PARAM_ANTENNA_GAIN,
WMI_PDEV_PARAM_RX_FILTER,
WMI_PDEV_SET_MCAST_TO_UCAST_TID,
WMI_PDEV_PARAM_PROXY_STA_MODE,
WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
WMI_PDEV_PARAM_BLOCK_INTERBSS,
WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
WMI_PDEV_PARAM_EN_STATS,
WMI_PDEV_PARAM_MU_GROUP_POLICY,
WMI_PDEV_PARAM_NOISE_DETECTION,
WMI_PDEV_PARAM_NOISE_THRESHOLD,
WMI_PDEV_PARAM_DPD_ENABLE,
WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
WMI_PDEV_PARAM_ATF_STRICT_SCH,
WMI_PDEV_PARAM_ATF_SCHED_DURATION,
WMI_PDEV_PARAM_ANT_PLZN,
WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
WMI_PDEV_PARAM_CCA_THRESHOLD,
WMI_PDEV_PARAM_RTS_FIXED_RATE,
WMI_PDEV_PARAM_PDEV_RESET,
WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
WMI_PDEV_PARAM_PROPAGATION_DELAY,
WMI_PDEV_PARAM_ENA_ANT_DIV,
WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
WMI_PDEV_PARAM_TX_SCH_DELAY,
WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
};
enum wmi_tlv_vdev_param {
WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
WMI_VDEV_PARAM_BEACON_INTERVAL,
WMI_VDEV_PARAM_LISTEN_INTERVAL,
WMI_VDEV_PARAM_MULTICAST_RATE,
WMI_VDEV_PARAM_MGMT_TX_RATE,
WMI_VDEV_PARAM_SLOT_TIME,
WMI_VDEV_PARAM_PREAMBLE,
WMI_VDEV_PARAM_SWBA_TIME,
WMI_VDEV_STATS_UPDATE_PERIOD,
WMI_VDEV_PWRSAVE_AGEOUT_TIME,
WMI_VDEV_HOST_SWBA_INTERVAL,
WMI_VDEV_PARAM_DTIM_PERIOD,
WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
WMI_VDEV_PARAM_WDS,
WMI_VDEV_PARAM_ATIM_WINDOW,
WMI_VDEV_PARAM_BMISS_COUNT_MAX,
WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
WMI_VDEV_PARAM_FEATURE_WMM,
WMI_VDEV_PARAM_CHWIDTH,
WMI_VDEV_PARAM_CHEXTOFFSET,
WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
WMI_VDEV_PARAM_STA_QUICKKICKOUT,
WMI_VDEV_PARAM_MGMT_RATE,
WMI_VDEV_PARAM_PROTECTION_MODE,
WMI_VDEV_PARAM_FIXED_RATE,
WMI_VDEV_PARAM_SGI,
WMI_VDEV_PARAM_LDPC,
WMI_VDEV_PARAM_TX_STBC,
WMI_VDEV_PARAM_RX_STBC,
WMI_VDEV_PARAM_INTRA_BSS_FWD,
WMI_VDEV_PARAM_DEF_KEYID,
WMI_VDEV_PARAM_NSS,
WMI_VDEV_PARAM_BCAST_DATA_RATE,
WMI_VDEV_PARAM_MCAST_DATA_RATE,
WMI_VDEV_PARAM_MCAST_INDICATE,
WMI_VDEV_PARAM_DHCP_INDICATE,
WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
WMI_VDEV_PARAM_ENABLE_RTSCTS,
WMI_VDEV_PARAM_TXBF,
WMI_VDEV_PARAM_PACKET_POWERSAVE,
WMI_VDEV_PARAM_DROP_UNENCRY,
WMI_VDEV_PARAM_TX_ENCAP_TYPE,
WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
WMI_VDEV_PARAM_TX_PWRLIMIT,
WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
WMI_VDEV_PARAM_ENABLE_RMC,
WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
WMI_VDEV_PARAM_MAX_RATE,
WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
WMI_VDEV_PARAM_INACTIVITY_CNT,
WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
WMI_VDEV_PARAM_DTIM_POLICY,
WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
WMI_VDEV_PARAM_RX_LEAK_WINDOW,
WMI_VDEV_PARAM_STATS_AVG_FACTOR,
WMI_VDEV_PARAM_DISCONNECT_TH,
WMI_VDEV_PARAM_RTSCTS_RATE,
WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
WMI_VDEV_PARAM_TXPOWER_SCALE,
WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
WMI_VDEV_PARAM_MCAST2UCAST_SET,
WMI_VDEV_PARAM_RC_NUM_RETRIES,
WMI_VDEV_PARAM_CABQ_MAXDUR,
WMI_VDEV_PARAM_MFPTEST_SET,
WMI_VDEV_PARAM_RTS_FIXED_RATE,
WMI_VDEV_PARAM_VHT_SGIMASK,
WMI_VDEV_PARAM_VHT80_RATEMASK,
WMI_VDEV_PARAM_PROXY_STA,
WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
WMI_VDEV_PARAM_RX_DECAP_TYPE,
WMI_VDEV_PARAM_BW_NSS_RATEMASK,
WMI_VDEV_PARAM_SENSOR_AP,
WMI_VDEV_PARAM_BEACON_RATE,
WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
WMI_VDEV_PARAM_STA_KICKOUT,
WMI_VDEV_PARAM_CAPABILITIES,
WMI_VDEV_PARAM_TSF_INCREMENT,
WMI_VDEV_PARAM_AMPDU_PER_AC,
WMI_VDEV_PARAM_RX_FILTER,
WMI_VDEV_PARAM_MGMT_TX_POWER,
WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
WMI_VDEV_PARAM_HE_DCM,
WMI_VDEV_PARAM_HE_RANGE_EXT,
WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
WMI_VDEV_PARAM_BA_MODE = 0x7e,
WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
WMI_VDEV_PARAM_BSS_COLOR,
WMI_VDEV_PARAM_SET_HEMU_MODE,
WMI_VDEV_PARAM_TX_OFDMA_CPLEN,
};
enum wmi_tlv_peer_flags {
WMI_TLV_PEER_AUTH = 0x00000001,
WMI_TLV_PEER_QOS = 0x00000002,
WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
WMI_TLV_PEER_APSD = 0x00000800,
WMI_TLV_PEER_HT = 0x00001000,
WMI_TLV_PEER_40MHZ = 0x00002000,
WMI_TLV_PEER_STBC = 0x00008000,
WMI_TLV_PEER_LDPC = 0x00010000,
WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
WMI_TLV_PEER_VHT = 0x02000000,
WMI_TLV_PEER_80MHZ = 0x04000000,
WMI_TLV_PEER_PMF = 0x08000000,
WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
WMI_PEER_160MHZ = 0x40000000,
WMI_PEER_SAFEMODE_EN = 0x80000000,
};
/** Enum list of TLV Tags for each parameter structure type. */
enum wmi_tlv_tag {
WMI_TAG_LAST_RESERVED = 15,
WMI_TAG_FIRST_ARRAY_ENUM,
WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
WMI_TAG_ARRAY_BYTE,
WMI_TAG_ARRAY_STRUCT,
WMI_TAG_ARRAY_FIXED_STRUCT,
WMI_TAG_LAST_ARRAY_ENUM = 31,
WMI_TAG_SERVICE_READY_EVENT,
WMI_TAG_HAL_REG_CAPABILITIES,
WMI_TAG_WLAN_HOST_MEM_REQ,
WMI_TAG_READY_EVENT,
WMI_TAG_SCAN_EVENT,
WMI_TAG_PDEV_TPC_CONFIG_EVENT,
WMI_TAG_CHAN_INFO_EVENT,
WMI_TAG_COMB_PHYERR_RX_HDR,
WMI_TAG_VDEV_START_RESPONSE_EVENT,
WMI_TAG_VDEV_STOPPED_EVENT,
WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
WMI_TAG_PEER_STA_KICKOUT_EVENT,
WMI_TAG_MGMT_RX_HDR,
WMI_TAG_TBTT_OFFSET_EVENT,
WMI_TAG_TX_DELBA_COMPLETE_EVENT,
WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
WMI_TAG_ROAM_EVENT,
WMI_TAG_WOW_EVENT_INFO,
WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
WMI_TAG_RTT_EVENT_HEADER,
WMI_TAG_RTT_ERROR_REPORT_EVENT,
WMI_TAG_RTT_MEAS_EVENT,
WMI_TAG_ECHO_EVENT,
WMI_TAG_FTM_INTG_EVENT,
WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
WMI_TAG_GPIO_INPUT_EVENT,
WMI_TAG_CSA_EVENT,
WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
WMI_TAG_IGTK_INFO,
WMI_TAG_DCS_INTERFERENCE_EVENT,
WMI_TAG_ATH_DCS_CW_INT,
WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
WMI_TAG_ATH_DCS_CW_INT,
WMI_TAG_ATH_DCS_WLAN_INT_STAT,
WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
WMI_TAG_ATH_DCS_WLAN_INT_STAT,
WMI_TAG_WLAN_PROFILE_CTX_T,
WMI_TAG_WLAN_PROFILE_T,
WMI_TAG_PDEV_QVIT_EVENT,
WMI_TAG_HOST_SWBA_EVENT,
WMI_TAG_TIM_INFO,
WMI_TAG_P2P_NOA_INFO,
WMI_TAG_STATS_EVENT,
WMI_TAG_AVOID_FREQ_RANGES_EVENT,
WMI_TAG_AVOID_FREQ_RANGE_DESC,
WMI_TAG_GTK_REKEY_FAIL_EVENT,
WMI_TAG_INIT_CMD,
WMI_TAG_RESOURCE_CONFIG,
WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
WMI_TAG_START_SCAN_CMD,
WMI_TAG_STOP_SCAN_CMD,
WMI_TAG_SCAN_CHAN_LIST_CMD,
WMI_TAG_CHANNEL,
WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
WMI_TAG_PDEV_SET_PARAM_CMD,
WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
WMI_TAG_WMM_PARAMS,
WMI_TAG_PDEV_SET_QUIET_CMD,
WMI_TAG_VDEV_CREATE_CMD,
WMI_TAG_VDEV_DELETE_CMD,
WMI_TAG_VDEV_START_REQUEST_CMD,
WMI_TAG_P2P_NOA_DESCRIPTOR,
WMI_TAG_P2P_GO_SET_BEACON_IE,
WMI_TAG_GTK_OFFLOAD_CMD,
WMI_TAG_VDEV_UP_CMD,
WMI_TAG_VDEV_STOP_CMD,
WMI_TAG_VDEV_DOWN_CMD,
WMI_TAG_VDEV_SET_PARAM_CMD,
WMI_TAG_VDEV_INSTALL_KEY_CMD,
WMI_TAG_PEER_CREATE_CMD,
WMI_TAG_PEER_DELETE_CMD,
WMI_TAG_PEER_FLUSH_TIDS_CMD,
WMI_TAG_PEER_SET_PARAM_CMD,
WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
WMI_TAG_VHT_RATE_SET,
WMI_TAG_BCN_TMPL_CMD,
WMI_TAG_PRB_TMPL_CMD,
WMI_TAG_BCN_PRB_INFO,
WMI_TAG_PEER_TID_ADDBA_CMD,
WMI_TAG_PEER_TID_DELBA_CMD,
WMI_TAG_STA_POWERSAVE_MODE_CMD,
WMI_TAG_STA_POWERSAVE_PARAM_CMD,
WMI_TAG_STA_DTIM_PS_METHOD_CMD,
WMI_TAG_ROAM_SCAN_MODE,
WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
WMI_TAG_ROAM_SCAN_PERIOD,
WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
WMI_TAG_PDEV_SUSPEND_CMD,
WMI_TAG_PDEV_RESUME_CMD,
WMI_TAG_ADD_BCN_FILTER_CMD,
WMI_TAG_RMV_BCN_FILTER_CMD,
WMI_TAG_WOW_ENABLE_CMD,
WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
WMI_TAG_ARP_OFFLOAD_TUPLE,
WMI_TAG_NS_OFFLOAD_TUPLE,
WMI_TAG_FTM_INTG_CMD,
WMI_TAG_STA_KEEPALIVE_CMD,
WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
WMI_TAG_AP_PS_PEER_CMD,
WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
WMI_TAG_WOW_DEL_PATTERN_CMD,
WMI_TAG_WOW_ADD_DEL_EVT_CMD,
WMI_TAG_RTT_MEASREQ_HEAD,
WMI_TAG_RTT_MEASREQ_BODY,
WMI_TAG_RTT_TSF_CMD,
WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
WMI_TAG_REQUEST_STATS_CMD,
WMI_TAG_NLO_CONFIG_CMD,
WMI_TAG_NLO_CONFIGURED_PARAMETERS,
WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
WMI_TAG_CHATTER_SET_MODE_CMD,
WMI_TAG_ECHO_CMD,
WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
WMI_TAG_FORCE_FW_HANG_CMD,
WMI_TAG_GPIO_CONFIG_CMD,
WMI_TAG_GPIO_OUTPUT_CMD,
WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
WMI_TAG_BCN_TX_HDR,
WMI_TAG_BCN_SEND_FROM_HOST_CMD,
WMI_TAG_MGMT_TX_HDR,
WMI_TAG_ADDBA_CLEAR_RESP_CMD,
WMI_TAG_ADDBA_SEND_CMD,
WMI_TAG_DELBA_SEND_CMD,
WMI_TAG_ADDBA_SETRESPONSE_CMD,
WMI_TAG_SEND_SINGLEAMSDU_CMD,
WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
WMI_TAG_PDEV_SET_HT_IE_CMD,
WMI_TAG_PDEV_SET_VHT_IE_CMD,
WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
WMI_TAG_PEER_MCAST_GROUP_CMD,
WMI_TAG_ROAM_AP_PROFILE,
WMI_TAG_AP_PROFILE,
WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
WMI_TAG_PDEV_DFS_ENABLE_CMD,
WMI_TAG_PDEV_DFS_DISABLE_CMD,
WMI_TAG_WOW_ADD_PATTERN_CMD,
WMI_TAG_WOW_BITMAP_PATTERN_T,
WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
WMI_TAG_WOW_MAGIC_PATTERN_CMD,
WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
WMI_TAG_TXBF_CMD,
WMI_TAG_DEBUG_LOG_CONFIG_CMD,
WMI_TAG_NLO_EVENT,
WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
WMI_TAG_UPLOAD_H_HDR,
WMI_TAG_CAPTURE_H_EVENT_HDR,
WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
WMI_TAG_VDEV_WMM_ADDTS_CMD,
WMI_TAG_VDEV_WMM_DELTS_CMD,
WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
WMI_TAG_TDLS_SET_STATE_CMD,
WMI_TAG_TDLS_PEER_UPDATE_CMD,
WMI_TAG_TDLS_PEER_EVENT,
WMI_TAG_TDLS_PEER_CAPABILITIES,
WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
WMI_TAG_ROAM_CHAN_LIST,
WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
WMI_TAG_BA_REQ_SSN_CMD,
WMI_TAG_BA_RSP_SSN_EVENT,
WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
WMI_TAG_P2P_SET_OPPPS_CMD,
WMI_TAG_P2P_SET_NOA_CMD,
WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
WMI_TAG_STA_SMPS_PARAM_CMD,
WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
WMI_TAG_P2P_NOA_EVENT,
WMI_TAG_HB_SET_ENABLE_CMD,
WMI_TAG_HB_SET_TCP_PARAMS_CMD,
WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
WMI_TAG_HB_SET_UDP_PARAMS_CMD,
WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
WMI_TAG_HB_IND_EVENT,
WMI_TAG_TX_PAUSE_EVENT,
WMI_TAG_RFKILL_EVENT,
WMI_TAG_DFS_RADAR_EVENT,
WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
WMI_TAG_BATCH_SCAN_ENABLE_CMD,
WMI_TAG_BATCH_SCAN_DISABLE_CMD,
WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
WMI_TAG_BATCH_SCAN_RESULT_EVENT,
WMI_TAG_VDEV_PLMREQ_START_CMD,
WMI_TAG_VDEV_PLMREQ_STOP_CMD,
WMI_TAG_THERMAL_MGMT_CMD,
WMI_TAG_THERMAL_MGMT_EVENT,
WMI_TAG_PEER_INFO_REQ_CMD,
WMI_TAG_PEER_INFO_EVENT,
WMI_TAG_PEER_INFO,
WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
WMI_TAG_RMC_SET_MODE_CMD,
WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
WMI_TAG_RMC_CONFIG_CMD,
WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
WMI_TAG_NAN_CMD_PARAM,
WMI_TAG_NAN_EVENT_HDR,
WMI_TAG_PDEV_L1SS_TRACK_EVENT,
WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
WMI_TAG_AGGR_STATE_TRIG_EVENT,
WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
WMI_TAG_ROAM_SCAN_CMD,
WMI_TAG_REQ_STATS_EXT_CMD,
WMI_TAG_STATS_EXT_EVENT,
WMI_TAG_OBSS_SCAN_ENABLE_CMD,
WMI_TAG_OBSS_SCAN_DISABLE_CMD,
WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
WMI_TAG_WOW_IOAC_KEEPALIVE_T,
WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
WMI_TAG_START_LINK_STATS_CMD,
WMI_TAG_CLEAR_LINK_STATS_CMD,
WMI_TAG_REQUEST_LINK_STATS_CMD,
WMI_TAG_IFACE_LINK_STATS_EVENT,
WMI_TAG_RADIO_LINK_STATS_EVENT,
WMI_TAG_PEER_STATS_EVENT,
WMI_TAG_CHANNEL_STATS,
WMI_TAG_RADIO_LINK_STATS,
WMI_TAG_RATE_STATS,
WMI_TAG_PEER_LINK_STATS,
WMI_TAG_WMM_AC_STATS,
WMI_TAG_IFACE_LINK_STATS,
WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
WMI_TAG_LPI_START_SCAN_CMD,
WMI_TAG_LPI_STOP_SCAN_CMD,
WMI_TAG_LPI_RESULT_EVENT,
WMI_TAG_PEER_STATE_EVENT,
WMI_TAG_EXTSCAN_BUCKET_CMD,
WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
WMI_TAG_EXTSCAN_START_CMD,
WMI_TAG_EXTSCAN_STOP_CMD,
WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
WMI_TAG_EXTSCAN_OPERATION_EVENT,
WMI_TAG_EXTSCAN_START_STOP_EVENT,
WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
WMI_TAG_UNIT_TEST_CMD,
WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
WMI_TAG_ROAM_SYNCH_EVENT,
WMI_TAG_ROAM_SYNCH_COMPLETE,
WMI_TAG_EXTWOW_ENABLE_CMD,
WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
WMI_TAG_LPI_STATUS_EVENT,
WMI_TAG_LPI_HANDOFF_EVENT,
WMI_TAG_VDEV_RATE_STATS_EVENT,
WMI_TAG_VDEV_RATE_HT_INFO,
WMI_TAG_RIC_REQUEST,
WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
WMI_TAG_PDEV_TEMPERATURE_EVENT,
WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
WMI_TAG_RIC_TSPEC,
WMI_TAG_TPC_CHAINMASK_CONFIG,
WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
WMI_TAG_KEY_MATERIAL,
WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
WMI_TAG_SET_LED_FLASHING_CMD,
WMI_TAG_MDNS_OFFLOAD_CMD,
WMI_TAG_MDNS_SET_FQDN_CMD,
WMI_TAG_MDNS_SET_RESP_CMD,
WMI_TAG_MDNS_GET_STATS_CMD,
WMI_TAG_MDNS_STATS_EVENT,
WMI_TAG_ROAM_INVOKE_CMD,
WMI_TAG_PDEV_RESUME_EVENT,
WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
WMI_TAG_SAP_OFL_ENABLE_CMD,
WMI_TAG_SAP_OFL_ADD_STA_EVENT,
WMI_TAG_SAP_OFL_DEL_STA_EVENT,
WMI_TAG_APFIND_CMD_PARAM,
WMI_TAG_APFIND_EVENT_HDR,
WMI_TAG_OCB_SET_SCHED_CMD,
WMI_TAG_OCB_SET_SCHED_EVENT,
WMI_TAG_OCB_SET_CONFIG_CMD,
WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
WMI_TAG_OCB_SET_UTC_TIME_CMD,
WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
WMI_TAG_OCB_GET_TSF_TIMER_CMD,
WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
WMI_TAG_DCC_GET_STATS_CMD,
WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
WMI_TAG_DCC_GET_STATS_RESP_EVENT,
WMI_TAG_DCC_CLEAR_STATS_CMD,
WMI_TAG_DCC_UPDATE_NDL_CMD,
WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
WMI_TAG_DCC_STATS_EVENT,
WMI_TAG_OCB_CHANNEL,
WMI_TAG_OCB_SCHEDULE_ELEMENT,
WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
WMI_TAG_DCC_NDL_CHAN,
WMI_TAG_QOS_PARAMETER,
WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
WMI_TAG_ROAM_FILTER,
WMI_TAG_PASSPOINT_CONFIG_CMD,
WMI_TAG_PASSPOINT_EVENT_HDR,
WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
WMI_TAG_VDEV_TSF_REPORT_EVENT,
WMI_TAG_GET_FW_MEM_DUMP,
WMI_TAG_UPDATE_FW_MEM_DUMP,
WMI_TAG_FW_MEM_DUMP_PARAMS,
WMI_TAG_DEBUG_MESG_FLUSH,
WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
WMI_TAG_VDEV_SET_IE_CMD,
WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
WMI_TAG_RSSI_BREACH_EVENT,
WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
WMI_TAG_SOC_SET_PCL_CMD,
WMI_TAG_SOC_SET_HW_MODE_CMD,
WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
WMI_TAG_VDEV_TXRX_STREAMS,
WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
WMI_TAG_DIAG_EVENT_LOG_CONFIG,
WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
WMI_TAG_PACKET_FILTER_CONFIG,
WMI_TAG_PACKET_FILTER_ENABLE,
WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
WMI_TAG_MGMT_TX_SEND_CMD,
WMI_TAG_MGMT_TX_COMPL_EVENT,
WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
WMI_TAG_LRO_INFO_CMD,
WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
WMI_TAG_SERVICE_READY_EXT_EVENT,
WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
WMI_TAG_PEER_ASSOC_CONF_EVENT,
WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
WMI_TAG_AP_PS_EGAP_PARAM_CMD,
WMI_TAG_AP_PS_EGAP_INFO_EVENT,
WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
WMI_TAG_SCPC_EVENT,
WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
WMI_TAG_BPF_GET_CAPABILITY_CMD,
WMI_TAG_BPF_CAPABILITY_INFO_EVT,
WMI_TAG_BPF_GET_VDEV_STATS_CMD,
WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
WMI_TAG_VDEV_DELETE_RESP_EVENT,
WMI_TAG_PEER_DELETE_RESP_EVENT,
WMI_TAG_ROAM_DENSE_THRES_PARAM,
WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
WMI_TAG_VDEV_CONFIG_RATEMASK,
WMI_TAG_PDEV_FIPS_CMD,
WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
WMI_TAG_FWTEST_SET_PARAM_CMD,
WMI_TAG_PEER_ATF_REQUEST,
WMI_TAG_VDEV_ATF_REQUEST,
WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
WMI_TAG_INST_RSSI_STATS_RESP,
WMI_TAG_MED_UTIL_REPORT_EVENT,
WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
WMI_TAG_WDS_ADDR_EVENT,
WMI_TAG_PEER_RATECODE_LIST_EVENT,
WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
WMI_TAG_PDEV_TPC_EVENT,
WMI_TAG_ANI_OFDM_EVENT,
WMI_TAG_ANI_CCK_EVENT,
WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
WMI_TAG_PDEV_FIPS_EVENT,
WMI_TAG_ATF_PEER_INFO,
WMI_TAG_PDEV_GET_TPC_CMD,
WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
WMI_TAG_QBOOST_CFG_CMD,
WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
WMI_TAG_PEER_MCS_RATE_INFO,
WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
WMI_TAG_MU_REPORT_TOTAL_MU,
WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
WMI_TAG_ROAM_SET_MBO,
WMI_TAG_MIB_STATS_ENABLE_CMD,
WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
WMI_TAG_NDI_GET_CAP_REQ,
WMI_TAG_NDP_INITIATOR_REQ,
WMI_TAG_NDP_RESPONDER_REQ,
WMI_TAG_NDP_END_REQ,
WMI_TAG_NDI_CAP_RSP_EVENT,
WMI_TAG_NDP_INITIATOR_RSP_EVENT,
WMI_TAG_NDP_RESPONDER_RSP_EVENT,
WMI_TAG_NDP_END_RSP_EVENT,
WMI_TAG_NDP_INDICATION_EVENT,
WMI_TAG_NDP_CONFIRM_EVENT,
WMI_TAG_NDP_END_INDICATION_EVENT,
WMI_TAG_VDEV_SET_QUIET_CMD,
WMI_TAG_PDEV_SET_PCL_CMD,
WMI_TAG_PDEV_SET_HW_MODE_CMD,
WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
WMI_TAG_COEX_CONFIG_CMD,
WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
WMI_TAG_MAC_PHY_CAPABILITIES,
WMI_TAG_HW_MODE_CAPABILITIES,
WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
WMI_TAG_HAL_REG_CAPABILITIES_EXT,
WMI_TAG_SOC_HAL_REG_CAPABILITIES,
WMI_TAG_VDEV_WISA_CMD,
WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
WMI_TAG_NDP_END_RSP_PER_NDI,
WMI_TAG_PEER_BWF_REQUEST,
WMI_TAG_BWF_PEER_INFO,
WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
WMI_TAG_RMC_SET_LEADER_CMD,
WMI_TAG_RMC_MANUAL_LEADER_EVENT,
WMI_TAG_PER_CHAIN_RSSI_STATS,
WMI_TAG_RSSI_STATS,
WMI_TAG_P2P_LO_START_CMD,
WMI_TAG_P2P_LO_STOP_CMD,
WMI_TAG_P2P_LO_STOPPED_EVENT,
WMI_TAG_REORDER_QUEUE_SETUP_CMD,
WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
WMI_TAG_READ_DATA_FROM_FLASH_CMD,
WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
WMI_TAG_TLV_BUF_LEN_PARAM,
WMI_TAG_SERVICE_AVAILABLE_EVENT,
WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
WMI_TAG_PEER_ANTDIV_INFO_EVENT,
WMI_TAG_PEER_ANTDIV_INFO,
WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
WMI_TAG_MNT_FILTER_CMD,
WMI_TAG_GET_CHIP_POWER_STATS_CMD,
WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
WMI_TAG_CHAN_CCA_STATS,
WMI_TAG_PEER_SIGNAL_STATS,
WMI_TAG_TX_STATS,
WMI_TAG_PEER_AC_TX_STATS,
WMI_TAG_RX_STATS,
WMI_TAG_PEER_AC_RX_STATS,
WMI_TAG_REPORT_STATS_EVENT,
WMI_TAG_CHAN_CCA_STATS_THRESH,
WMI_TAG_PEER_SIGNAL_STATS_THRESH,
WMI_TAG_TX_STATS_THRESH,
WMI_TAG_RX_STATS_THRESH,
WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
WMI_TAG_REQUEST_WLAN_STATS_CMD,
WMI_TAG_RX_AGGR_FAILURE_EVENT,
WMI_TAG_RX_AGGR_FAILURE_INFO,
WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
WMI_TAG_PDEV_BAND_TO_MAC,
WMI_TAG_TBTT_OFFSET_INFO,
WMI_TAG_TBTT_OFFSET_EXT_EVENT,
WMI_TAG_SAR_LIMITS_CMD,
WMI_TAG_SAR_LIMIT_CMD_ROW,
WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
WMI_TAG_VENDOR_OUI,
WMI_TAG_REQUEST_RCPI_CMD,
WMI_TAG_UPDATE_RCPI_EVENT,
WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
WMI_TAG_PEER_STATS_INFO,
WMI_TAG_PEER_STATS_INFO_EVENT,
WMI_TAG_PKGID_EVENT,
WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
WMI_TAG_SET_CURRENT_COUNTRY_CMD,
WMI_TAG_REGULATORY_RULE_STRUCT,
WMI_TAG_REG_CHAN_LIST_CC_EVENT,
WMI_TAG_11D_SCAN_START_CMD,
WMI_TAG_11D_SCAN_STOP_CMD,
WMI_TAG_11D_NEW_COUNTRY_EVENT,
WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
WMI_TAG_RADIO_CHAN_STATS,
WMI_TAG_RADIO_CHAN_STATS_EVENT,
WMI_TAG_ROAM_PER_CONFIG,
WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
WMI_TAG_HW_DATA_FILTER_CMD,
WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
WMI_TAG_VDEV_SET_ARP_STATS_CMD,
WMI_TAG_VDEV_GET_ARP_STATS_CMD,
WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
WMI_TAG_IFACE_OFFLOAD_STATS,
WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
WMI_TAG_RSSI_CTL_EXT,
WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
WMI_TAG_COEX_BT_ACTIVITY_EVENT,
WMI_TAG_VDEV_GET_TX_POWER_CMD,
WMI_TAG_VDEV_TX_POWER_EVENT,
WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
WMI_TAG_TX_SEND_PARAMS,
WMI_TAG_HE_RATE_SET,
WMI_TAG_CONGESTION_STATS,
WMI_TAG_SET_INIT_COUNTRY_CMD,
WMI_TAG_SCAN_DBS_DUTY_CYCLE,
WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
WMI_TAG_THERM_THROT_CONFIG_REQUEST,
WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
WMI_TAG_THERM_THROT_STATS_EVENT,
WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
WMI_TAG_OEM_DMA_RING_CAPABILITIES,
WMI_TAG_OEM_DMA_RING_CFG_REQ,
WMI_TAG_OEM_DMA_RING_CFG_RSP,
WMI_TAG_OEM_INDIRECT_DATA,
WMI_TAG_OEM_DMA_BUF_RELEASE,
WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
WMI_TAG_UNIT_TEST_EVENT,
WMI_TAG_ROAM_FILS_OFFLOAD,
WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
WMI_TAG_PMK_CACHE,
WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
WMI_TAG_ROAM_FILS_SYNCH,
WMI_TAG_GTK_OFFLOAD_EXTENDED,
WMI_TAG_ROAM_BG_SCAN_ROAMING,
WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
WMI_TAG_OIC_PING_HANDOFF_EVENT,
WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
WMI_TAG_DHCP_LEASE_RENEW_EVENT,
WMI_TAG_BTM_CONFIG,
WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
WMI_TAG_WLM_CONFIG_CMD,
WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
WMI_TAG_ROAM_CND_SCORING_PARAM,
WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
WMI_TAG_VENDOR_OUI_EXT,
WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
WMI_TAG_FD_SEND_FROM_HOST_CMD,
WMI_TAG_ENABLE_FILS_CMD,
WMI_TAG_HOST_SWFDA_EVENT,
WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
WMI_TAG_STATS_PERIOD,
WMI_TAG_NDL_SCHEDULE_UPDATE,
WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
WMI_TAG_SAR2_RESULT_EVENT,
WMI_TAG_SAR_CAPABILITIES,
WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
WMI_TAG_DMA_RING_CAPABILITIES,
WMI_TAG_DMA_RING_CFG_REQ,
WMI_TAG_DMA_RING_CFG_RSP,
WMI_TAG_DMA_BUF_RELEASE,
WMI_TAG_DMA_BUF_RELEASE_ENTRY,
WMI_TAG_SAR_GET_LIMITS_CMD,
WMI_TAG_SAR_GET_LIMITS_EVENT,
WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
WMI_TAG_OFFLOAD_11K_REPORT,
WMI_TAG_INVOKE_NEIGHBOR_REPORT,
WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
WMI_TAG_PDEV_GET_NFCAL_POWER,
WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
WMI_TAG_OBSS_COLOR_COLLISION_EVT,
WMI_TAG_RUNTIME_DPD_RECAL_CMD,
WMI_TAG_TWT_ENABLE_CMD,
WMI_TAG_TWT_DISABLE_CMD,
WMI_TAG_TWT_ADD_DIALOG_CMD,
WMI_TAG_TWT_DEL_DIALOG_CMD,
WMI_TAG_TWT_PAUSE_DIALOG_CMD,
WMI_TAG_TWT_RESUME_DIALOG_CMD,
WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
WMI_TAG_ROAM_SCAN_STATS_EVENT,
WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
WMI_TAG_GET_TPC_POWER_CMD,
WMI_TAG_GET_TPC_POWER_EVENT,
WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
WMI_TAG_MOTION_DET_START_STOP_CMD,
WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
WMI_TAG_MOTION_DET_EVENT,
WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
WMI_TAG_NDP_TRANSPORT_IP,
WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
WMI_TAG_ESP_ESTIMATE_EVENT,
WMI_TAG_NAN_HOST_CONFIG,
WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
WMI_TAG_PEER_CFR_CAPTURE_CMD,
WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
WMI_TAG_CHAN_WIDTH_PEER_LIST,
WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
WMI_TAG_PEER_EXTD2_STATS,
WMI_TAG_HPCS_PULSE_START_CMD,
WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
WMI_TAG_NAN_EVENT_INFO,
WMI_TAG_NDP_CHANNEL_INFO,
WMI_TAG_NDP_CMD,
WMI_TAG_NDP_EVENT,
/* TODO add all the missing cmds */
WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
WMI_TAG_MAX
};
enum wmi_tlv_service {
WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
WMI_TLV_SERVICE_STA_PWRSAVE = 4,
WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
WMI_TLV_SERVICE_AP_UAPSD = 6,
WMI_TLV_SERVICE_AP_DFS = 7,
WMI_TLV_SERVICE_11AC = 8,
WMI_TLV_SERVICE_BLOCKACK = 9,
WMI_TLV_SERVICE_PHYERR = 10,
WMI_TLV_SERVICE_BCN_FILTER = 11,
WMI_TLV_SERVICE_RTT = 12,
WMI_TLV_SERVICE_WOW = 13,
WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
WMI_TLV_SERVICE_IRAM_TIDS = 15,
WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
WMI_TLV_SERVICE_NLO = 17,
WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
WMI_TLV_SERVICE_SCAN_SCH = 19,
WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
WMI_TLV_SERVICE_CHATTER = 21,
WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
WMI_TLV_SERVICE_GPIO = 25,
WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
WMI_TLV_SERVICE_TX_ENCAP = 30,
WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
WMI_TLV_SERVICE_EARLY_RX = 32,
WMI_TLV_SERVICE_STA_SMPS = 33,
WMI_TLV_SERVICE_FWTEST = 34,
WMI_TLV_SERVICE_STA_WMMAC = 35,
WMI_TLV_SERVICE_TDLS = 36,
WMI_TLV_SERVICE_BURST = 37,
WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
WMI_TLV_SERVICE_WLAN_HB = 42,
WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
WMI_TLV_SERVICE_BATCH_SCAN = 44,
WMI_TLV_SERVICE_QPOWER = 45,
WMI_TLV_SERVICE_PLMREQ = 46,
WMI_TLV_SERVICE_THERMAL_MGMT = 47,
WMI_TLV_SERVICE_RMC = 48,
WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
WMI_TLV_SERVICE_COEX_SAR = 50,
WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
WMI_TLV_SERVICE_NAN = 52,
WMI_TLV_SERVICE_L1SS_STAT = 53,
WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
WMI_TLV_SERVICE_OBSS_SCAN = 55,
WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
WMI_TLV_SERVICE_LPASS = 60,
WMI_TLV_SERVICE_EXTSCAN = 61,
WMI_TLV_SERVICE_D0WOW = 62,
WMI_TLV_SERVICE_HSOFFLOAD = 63,
WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
WMI_TLV_SERVICE_OCB = 71,
WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
WMI_TLV_SERVICE_EXT_MSG = 77,
WMI_TLV_SERVICE_MAWC = 78,
WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
WMI_TLV_SERVICE_EGAP = 80,
WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
WMI_TLV_SERVICE_ATF = 84,
WMI_TLV_SERVICE_COEX_GPIO = 85,
WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
WMI_TLV_SERVICE_NAN_DATA = 96,
WMI_TLV_SERVICE_NAN_RTT = 97,
WMI_TLV_SERVICE_11AX = 98,
WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
WMI_TLV_SERVICE_MESH_11S = 103,
WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
WMI_TLV_SERVICE_REGULATORY_DB = 117,
WMI_TLV_SERVICE_11D_OFFLOAD = 118,
WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
WMI_TLV_SERVICE_PKT_ROUTING = 121,
WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
WMI_MAX_SERVICE = 128,
WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
WMI_TLV_SERVICE_FILS_SUPPORT = 131,
WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
WMI_TLV_SERVICE_THERM_THROT = 140,
WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
WMI_TLV_SERVICE_STA_TWT = 152,
WMI_TLV_SERVICE_AP_TWT = 153,
WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
WMI_TLV_SERVICE_MOTION_DET = 160,
WMI_TLV_SERVICE_INFRA_MBSSID = 161,
WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
WMI_TLV_SERVICE_ESP_SUPPORT = 170,
WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
WMI_MAX_EXT_SERVICE
};
enum {
WMI_SMPS_FORCED_MODE_NONE = 0,
WMI_SMPS_FORCED_MODE_DISABLED,
WMI_SMPS_FORCED_MODE_STATIC,
WMI_SMPS_FORCED_MODE_DYNAMIC
};
#define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0
#define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1
#define WMI_NUM_SUPPORTED_BAND_MAX 2
#define WMI_PEER_MIMO_PS_STATE 0x1
#define WMI_PEER_AMPDU 0x2
#define WMI_PEER_AUTHORIZE 0x3
#define WMI_PEER_CHWIDTH 0x4
#define WMI_PEER_NSS 0x5
#define WMI_PEER_USE_4ADDR 0x6
#define WMI_PEER_MEMBERSHIP 0x7
#define WMI_PEER_USERPOS 0x8
#define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9
#define WMI_PEER_TX_FAIL_CNT_THR 0xA
#define WMI_PEER_SET_HW_RETRY_CTS2S 0xB
#define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC
#define WMI_PEER_PHYMODE 0xD
#define WMI_PEER_USE_FIXED_PWR 0xE
#define WMI_PEER_PARAM_FIXED_RATE 0xF
#define WMI_PEER_SET_MU_WHITELIST 0x10
#define WMI_PEER_SET_MAX_TX_RATE 0x11
#define WMI_PEER_SET_MIN_TX_RATE 0x12
#define WMI_PEER_SET_DEFAULT_ROUTING 0x13
/* slot time long */
#define WMI_VDEV_SLOT_TIME_LONG 0x1
/* slot time short */
#define WMI_VDEV_SLOT_TIME_SHORT 0x2
/* preablbe long */
#define WMI_VDEV_PREAMBLE_LONG 0x1
/* preablbe short */
#define WMI_VDEV_PREAMBLE_SHORT 0x2
enum wmi_peer_smps_state {
WMI_PEER_SMPS_PS_NONE = 0x0,
WMI_PEER_SMPS_STATIC = 0x1,
WMI_PEER_SMPS_DYNAMIC = 0x2
};
enum wmi_peer_chwidth {
WMI_PEER_CHWIDTH_20MHZ = 0,
WMI_PEER_CHWIDTH_40MHZ = 1,
WMI_PEER_CHWIDTH_80MHZ = 2,
WMI_PEER_CHWIDTH_160MHZ = 3,
};
enum wmi_beacon_gen_mode {
WMI_BEACON_STAGGERED_MODE = 0,
WMI_BEACON_BURST_MODE = 1
};
struct wmi_host_pdev_band_to_mac {
u32 pdev_id;
u32 start_freq;
u32 end_freq;
};
struct ath11k_ppe_threshold {
u32 numss_m1;
u32 ru_bit_mask;
u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
};
struct ath11k_service_ext_param {
u32 default_conc_scan_config_bits;
u32 default_fw_config_bits;
struct ath11k_ppe_threshold ppet;
u32 he_cap_info;
u32 mpdu_density;
u32 max_bssid_rx_filters;
u32 num_hw_modes;
u32 num_phy;
};
struct ath11k_hw_mode_caps {
u32 hw_mode_id;
u32 phy_id_map;
u32 hw_mode_config_type;
};
#define PSOC_HOST_MAX_PHY_SIZE (3)
#define ATH11K_11B_SUPPORT BIT(0)
#define ATH11K_11G_SUPPORT BIT(1)
#define ATH11K_11A_SUPPORT BIT(2)
#define ATH11K_11N_SUPPORT BIT(3)
#define ATH11K_11AC_SUPPORT BIT(4)
#define ATH11K_11AX_SUPPORT BIT(5)
struct ath11k_hal_reg_capabilities_ext {
u32 phy_id;
u32 eeprom_reg_domain;
u32 eeprom_reg_domain_ext;
u32 regcap1;
u32 regcap2;
u32 wireless_modes;
u32 low_2ghz_chan;
u32 high_2ghz_chan;
u32 low_5ghz_chan;
u32 high_5ghz_chan;
};
#define WMI_HOST_MAX_PDEV 3
struct wlan_host_mem_chunk {
u32 tlv_header;
u32 req_id;
u32 ptr;
u32 size;
} __packed;
struct wmi_host_mem_chunk {
void *vaddr;
dma_addr_t paddr;
u32 len;
u32 req_id;
};
struct wmi_init_cmd_param {
u32 tlv_header;
struct target_resource_config *res_cfg;
u8 num_mem_chunks;
struct wmi_host_mem_chunk *mem_chunks;
u32 hw_mode_id;
u32 num_band_to_mac;
struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
};
struct wmi_pdev_band_to_mac {
u32 tlv_header;
u32 pdev_id;
u32 start_freq;
u32 end_freq;
} __packed;
struct wmi_pdev_set_hw_mode_cmd_param {
u32 tlv_header;
u32 pdev_id;
u32 hw_mode_index;
u32 num_band_to_mac;
} __packed;
struct wmi_ppe_threshold {
u32 numss_m1; /** NSS - 1*/
union {
u32 ru_count;
u32 ru_mask;
} __packed;
u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
} __packed;
#define HW_BD_INFO_SIZE 5
struct wmi_abi_version {
u32 abi_version_0;
u32 abi_version_1;
u32 abi_version_ns_0;
u32 abi_version_ns_1;
u32 abi_version_ns_2;
u32 abi_version_ns_3;
} __packed;
struct wmi_init_cmd {
u32 tlv_header;
struct wmi_abi_version host_abi_vers;
u32 num_host_mem_chunks;
} __packed;
struct wmi_resource_config {
u32 tlv_header;
u32 num_vdevs;
u32 num_peers;
u32 num_offload_peers;
u32 num_offload_reorder_buffs;
u32 num_peer_keys;
u32 num_tids;
u32 ast_skid_limit;
u32 tx_chain_mask;
u32 rx_chain_mask;
u32 rx_timeout_pri[4];
u32 rx_decap_mode;
u32 scan_max_pending_req;
u32 bmiss_offload_max_vdev;
u32 roam_offload_max_vdev;
u32 roam_offload_max_ap_profiles;
u32 num_mcast_groups;
u32 num_mcast_table_elems;
u32 mcast2ucast_mode;
u32 tx_dbg_log_size;
u32 num_wds_entries;
u32 dma_burst_size;
u32 mac_aggr_delim;
u32 rx_skip_defrag_timeout_dup_detection_check;
u32 vow_config;
u32 gtk_offload_max_vdev;
u32 num_msdu_desc;
u32 max_frag_entries;
u32 num_tdls_vdevs;
u32 num_tdls_conn_table_entries;
u32 beacon_tx_offload_max_vdev;
u32 num_multicast_filter_entries;
u32 num_wow_filters;
u32 num_keep_alive_pattern;
u32 keep_alive_pattern_size;
u32 max_tdls_concurrent_sleep_sta;
u32 max_tdls_concurrent_buffer_sta;
u32 wmi_send_separate;
u32 num_ocb_vdevs;
u32 num_ocb_channels;
u32 num_ocb_schedules;
u32 flag1;
u32 smart_ant_cap;
u32 bk_minfree;
u32 be_minfree;
u32 vi_minfree;
u32 vo_minfree;
u32 alloc_frag_desc_for_data_pkt;
u32 num_ns_ext_tuples_cfg;
u32 bpf_instruction_size;
u32 max_bssid_rx_filters;
u32 use_pdev_id;
u32 max_num_dbs_scan_duty_cycle;
u32 max_num_group_keys;
u32 peer_map_unmap_v2_support;
u32 sched_params;
u32 twt_ap_pdev_count;
u32 twt_ap_sta_count;
} __packed;
struct wmi_service_ready_event {
u32 fw_build_vers;
struct wmi_abi_version fw_abi_vers;
u32 phy_capability;
u32 max_frag_entry;
u32 num_rf_chains;
u32 ht_cap_info;
u32 vht_cap_info;
u32 vht_supp_mcs;
u32 hw_min_tx_power;
u32 hw_max_tx_power;
u32 sys_cap_info;
u32 min_pkt_size_enable;
u32 max_bcn_ie_size;
u32 num_mem_reqs;
u32 max_num_scan_channels;
u32 hw_bd_id;
u32 hw_bd_info[HW_BD_INFO_SIZE];
u32 max_supported_macs;
u32 wmi_fw_sub_feat_caps;
u32 num_dbs_hw_modes;
/* txrx_chainmask
* [7:0] - 2G band tx chain mask
* [15:8] - 2G band rx chain mask
* [23:16] - 5G band tx chain mask
* [31:24] - 5G band rx chain mask
*/
u32 txrx_chainmask;
u32 default_dbs_hw_mode_index;
u32 num_msdu_desc;
} __packed;
#define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
#define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
#define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
#define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
#define WMI_SERVICE_BITS_IN_SIZE32 4
struct wmi_service_ready_ext_event {
u32 default_conc_scan_config_bits;
u32 default_fw_config_bits;
struct wmi_ppe_threshold ppet;
u32 he_cap_info;
u32 mpdu_density;
u32 max_bssid_rx_filters;
u32 fw_build_vers_ext;
u32 max_nlo_ssids;
u32 max_bssid_indicator;
u32 he_cap_info_ext;
} __packed;
struct wmi_soc_mac_phy_hw_mode_caps {
u32 num_hw_modes;
u32 num_chainmask_tables;
} __packed;
struct wmi_hw_mode_capabilities {
u32 tlv_header;
u32 hw_mode_id;
u32 phy_id_map;
u32 hw_mode_config_type;
} __packed;
#define WMI_MAX_HECAP_PHY_SIZE (3)
struct wmi_mac_phy_capabilities {
u32 hw_mode_id;
u32 pdev_id;
u32 phy_id;
u32 supported_flags;
u32 supported_bands;
u32 ampdu_density;
u32 max_bw_supported_2g;
u32 ht_cap_info_2g;
u32 vht_cap_info_2g;
u32 vht_supp_mcs_2g;
u32 he_cap_info_2g;
u32 he_supp_mcs_2g;
u32 tx_chain_mask_2g;
u32 rx_chain_mask_2g;
u32 max_bw_supported_5g;
u32 ht_cap_info_5g;
u32 vht_cap_info_5g;
u32 vht_supp_mcs_5g;
u32 he_cap_info_5g;
u32 he_supp_mcs_5g;
u32 tx_chain_mask_5g;
u32 rx_chain_mask_5g;
u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
struct wmi_ppe_threshold he_ppet2g;
struct wmi_ppe_threshold he_ppet5g;
u32 chainmask_table_id;
u32 lmac_id;
u32 he_cap_info_2g_ext;
u32 he_cap_info_5g_ext;
u32 he_cap_info_internal;
} __packed;
struct wmi_hal_reg_capabilities_ext {
u32 tlv_header;
u32 phy_id;
u32 eeprom_reg_domain;
u32 eeprom_reg_domain_ext;
u32 regcap1;
u32 regcap2;
u32 wireless_modes;
u32 low_2ghz_chan;
u32 high_2ghz_chan;
u32 low_5ghz_chan;
u32 high_5ghz_chan;
} __packed;
struct wmi_soc_hal_reg_capabilities {
u32 num_phy;
} __packed;
/* 2 word representation of MAC addr */
struct wmi_mac_addr {
union {
u8 addr[6];
struct {
u32 word0;
u32 word1;
} __packed;
} __packed;
} __packed;
struct wmi_ready_event {
struct wmi_abi_version fw_abi_vers;
struct wmi_mac_addr mac_addr;
u32 status;
u32 num_dscp_table;
u32 num_extra_mac_addr;
u32 num_total_peers;
u32 num_extra_peers;
} __packed;
struct wmi_service_available_event {
u32 wmi_service_segment_offset;
u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
} __packed;
struct ath11k_pdev_wmi {
struct ath11k_wmi_base *wmi_ab;
enum ath11k_htc_ep_id eid;
const struct wmi_peer_flags_map *peer_flags;
u32 rx_decap_mode;
};
struct vdev_create_params {
u8 if_id;
u32 type;
u32 subtype;
struct {
u8 tx;
u8 rx;
} chains[NUM_NL80211_BANDS];
u32 pdev_id;
};
struct wmi_vdev_create_cmd {
u32 tlv_header;
u32 vdev_id;
u32 vdev_type;
u32 vdev_subtype;
struct wmi_mac_addr vdev_macaddr;
u32 num_cfg_txrx_streams;
u32 pdev_id;
} __packed;
struct wmi_vdev_txrx_streams {
u32 tlv_header;
u32 band;
u32 supported_tx_streams;
u32 supported_rx_streams;
} __packed;
struct wmi_vdev_delete_cmd {
u32 tlv_header;
u32 vdev_id;
} __packed;
struct wmi_vdev_up_cmd {
u32 tlv_header;
u32 vdev_id;
u32 vdev_assoc_id;
struct wmi_mac_addr vdev_bssid;
struct wmi_mac_addr trans_bssid;
u32 profile_idx;
u32 profile_num;
} __packed;
struct wmi_vdev_stop_cmd {
u32 tlv_header;
u32 vdev_id;
} __packed;
struct wmi_vdev_down_cmd {
u32 tlv_header;
u32 vdev_id;
} __packed;
#define WMI_VDEV_START_HIDDEN_SSID BIT(0)
#define WMI_VDEV_START_PMF_ENABLED BIT(1)
#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
struct wmi_ssid {
u32 ssid_len;
u32 ssid[8];
} __packed;
#define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
struct wmi_vdev_start_request_cmd {
u32 tlv_header;
u32 vdev_id;
u32 requestor_id;
u32 beacon_interval;
u32 dtim_period;
u32 flags;
struct wmi_ssid ssid;
u32 bcn_tx_rate;
u32 bcn_txpower;
u32 num_noa_descriptors;
u32 disable_hw_ack;
u32 preferred_tx_streams;
u32 preferred_rx_streams;
u32 he_ops;
u32 cac_duration_ms;
u32 regdomain;
} __packed;
#define MGMT_TX_DL_FRM_LEN 64
#define WMI_MAC_MAX_SSID_LENGTH 32
struct mac_ssid {
u8 length;
u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
} __packed;
struct wmi_p2p_noa_descriptor {
u32 type_count;
u32 duration;
u32 interval;
u32 start_time;
};
struct channel_param {
u8 chan_id;
u8 pwr;
u32 mhz;
u32 half_rate:1,
quarter_rate:1,
dfs_set:1,
dfs_set_cfreq2:1,
is_chan_passive:1,
allow_ht:1,
allow_vht:1,
allow_he:1,
set_agile:1;
u32 phy_mode;
u32 cfreq1;
u32 cfreq2;
char maxpower;
char minpower;
char maxregpower;
u8 antennamax;
u8 reg_class_id;
} __packed;
enum wmi_phy_mode {
MODE_11A = 0,
MODE_11G = 1, /* 11b/g Mode */
MODE_11B = 2, /* 11b Mode */
MODE_11GONLY = 3, /* 11g only Mode */
MODE_11NA_HT20 = 4,
MODE_11NG_HT20 = 5,
MODE_11NA_HT40 = 6,
MODE_11NG_HT40 = 7,
MODE_11AC_VHT20 = 8,
MODE_11AC_VHT40 = 9,
MODE_11AC_VHT80 = 10,
MODE_11AC_VHT20_2G = 11,
MODE_11AC_VHT40_2G = 12,
MODE_11AC_VHT80_2G = 13,
MODE_11AC_VHT80_80 = 14,
MODE_11AC_VHT160 = 15,
MODE_11AX_HE20 = 16,
MODE_11AX_HE40 = 17,
MODE_11AX_HE80 = 18,
MODE_11AX_HE80_80 = 19,
MODE_11AX_HE160 = 20,
MODE_11AX_HE20_2G = 21,
MODE_11AX_HE40_2G = 22,
MODE_11AX_HE80_2G = 23,
MODE_UNKNOWN = 24,
MODE_MAX = 24
};
static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
{
switch (mode) {
case MODE_11A:
return "11a";
case MODE_11G:
return "11g";
case MODE_11B:
return "11b";
case MODE_11GONLY:
return "11gonly";
case MODE_11NA_HT20:
return "11na-ht20";
case MODE_11NG_HT20:
return "11ng-ht20";
case MODE_11NA_HT40:
return "11na-ht40";
case MODE_11NG_HT40:
return "11ng-ht40";
case MODE_11AC_VHT20:
return "11ac-vht20";
case MODE_11AC_VHT40:
return "11ac-vht40";
case MODE_11AC_VHT80:
return "11ac-vht80";
case MODE_11AC_VHT160:
return "11ac-vht160";
case MODE_11AC_VHT80_80:
return "11ac-vht80+80";
case MODE_11AC_VHT20_2G:
return "11ac-vht20-2g";
case MODE_11AC_VHT40_2G:
return "11ac-vht40-2g";
case MODE_11AC_VHT80_2G:
return "11ac-vht80-2g";
case MODE_11AX_HE20:
return "11ax-he20";
case MODE_11AX_HE40:
return "11ax-he40";
case MODE_11AX_HE80:
return "11ax-he80";
case MODE_11AX_HE80_80:
return "11ax-he80+80";
case MODE_11AX_HE160:
return "11ax-he160";
case MODE_11AX_HE20_2G:
return "11ax-he20-2g";
case MODE_11AX_HE40_2G:
return "11ax-he40-2g";
case MODE_11AX_HE80_2G:
return "11ax-he80-2g";
case MODE_UNKNOWN:
/* skip */
break;
/* no default handler to allow compiler to check that the
* enum is fully handled
*/
}
return "<unknown>";
}
struct wmi_channel_arg {
u32 freq;
u32 band_center_freq1;
u32 band_center_freq2;
bool passive;
bool allow_ibss;
bool allow_ht;
bool allow_vht;
bool ht40plus;
bool chan_radar;
bool freq2_radar;
bool allow_he;
u32 min_power;
u32 max_power;
u32 max_reg_power;
u32 max_antenna_gain;
enum wmi_phy_mode mode;
};
struct wmi_vdev_start_req_arg {
u32 vdev_id;
struct wmi_channel_arg channel;
u32 bcn_intval;
u32 dtim_period;
u8 *ssid;
u32 ssid_len;
u32 bcn_tx_rate;
u32 bcn_tx_power;
bool disable_hw_ack;
bool hidden_ssid;
bool pmf_enabled;
u32 he_ops;
u32 cac_duration_ms;
u32 regdomain;
u32 pref_rx_streams;
u32 pref_tx_streams;
u32 num_noa_descriptors;
};
struct peer_create_params {
const u8 *peer_addr;
u32 peer_type;
u32 vdev_id;
};
struct peer_delete_params {
u8 vdev_id;
};
struct peer_flush_params {
u32 peer_tid_bitmap;
u8 vdev_id;
};
struct pdev_set_regdomain_params {
u16 current_rd_in_use;
u16 current_rd_2g;
u16 current_rd_5g;
u32 ctl_2g;
u32 ctl_5g;
u8 dfs_domain;
u32 pdev_id;
};
struct rx_reorder_queue_remove_params {
u8 *peer_macaddr;
u16 vdev_id;
u32 peer_tid_bitmap;
};
#define WMI_HOST_PDEV_ID_SOC 0xFF
#define WMI_HOST_PDEV_ID_0 0
#define WMI_HOST_PDEV_ID_1 1
#define WMI_HOST_PDEV_ID_2 2
#define WMI_PDEV_ID_SOC 0
#define WMI_PDEV_ID_1ST 1
#define WMI_PDEV_ID_2ND 2
#define WMI_PDEV_ID_3RD 3
/* Freq units in MHz */
#define REG_RULE_START_FREQ 0x0000ffff
#define REG_RULE_END_FREQ 0xffff0000
#define REG_RULE_FLAGS 0x0000ffff
#define REG_RULE_MAX_BW 0x0000ffff
#define REG_RULE_REG_PWR 0x00ff0000
#define REG_RULE_ANT_GAIN 0xff000000
#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
#define HECAP_PHYDWORD_0 0
#define HECAP_PHYDWORD_1 1
#define HECAP_PHYDWORD_2 2
#define HECAP_PHY_SU_BFER BIT(31)
#define HECAP_PHY_SU_BFEE BIT(0)
#define HECAP_PHY_MU_BFER BIT(1)
#define HECAP_PHY_UL_MUMIMO BIT(22)
#define HECAP_PHY_UL_MUOFDMA BIT(23)
#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
#define HECAP_PHY_SUBFME_GET(hecap_phy) \
FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
#define HE_MODE_SU_TX_BFEE BIT(0)
#define HE_MODE_SU_TX_BFER BIT(1)
#define HE_MODE_MU_TX_BFEE BIT(2)
#define HE_MODE_MU_TX_BFER BIT(3)
#define HE_MODE_DL_OFDMA BIT(4)
#define HE_MODE_UL_OFDMA BIT(5)
#define HE_MODE_UL_MUMIMO BIT(6)
#define HE_DL_MUOFDMA_ENABLE 1
#define HE_UL_MUOFDMA_ENABLE 1
#define HE_DL_MUMIMO_ENABLE 1
#define HE_MU_BFEE_ENABLE 1
#define HE_SU_BFEE_ENABLE 1
#define HE_VHT_SOUNDING_MODE_ENABLE 1
#define HE_SU_MU_SOUNDING_MODE_ENABLE 1
#define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
/* HE or VHT Sounding */
#define HE_VHT_SOUNDING_MODE BIT(0)
/* SU or MU Sounding */
#define HE_SU_MU_SOUNDING_MODE BIT(2)
/* Trig or Non-Trig Sounding */
#define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
#define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
struct pdev_params {
u32 param_id;
u32 param_value;
};
enum wmi_peer_type {
WMI_PEER_TYPE_DEFAULT = 0,
WMI_PEER_TYPE_BSS = 1,
WMI_PEER_TYPE_TDLS = 2,
};
struct wmi_peer_create_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 peer_type;
} __packed;
struct wmi_peer_delete_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
} __packed;
struct wmi_peer_reorder_queue_setup_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 tid;
u32 queue_ptr_lo;
u32 queue_ptr_hi;
u32 queue_no;
u32 ba_window_size_valid;
u32 ba_window_size;
} __packed;
struct wmi_peer_reorder_queue_remove_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 tid_mask;
} __packed;
struct gpio_config_params {
u32 gpio_num;
u32 input;
u32 pull_type;
u32 intr_mode;
};
enum wmi_gpio_type {
WMI_GPIO_PULL_NONE,
WMI_GPIO_PULL_UP,
WMI_GPIO_PULL_DOWN
};
enum wmi_gpio_intr_type {
WMI_GPIO_INTTYPE_DISABLE,
WMI_GPIO_INTTYPE_RISING_EDGE,
WMI_GPIO_INTTYPE_FALLING_EDGE,
WMI_GPIO_INTTYPE_BOTH_EDGE,
WMI_GPIO_INTTYPE_LEVEL_LOW,
WMI_GPIO_INTTYPE_LEVEL_HIGH
};
enum wmi_bss_chan_info_req_type {
WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
};
struct wmi_gpio_config_cmd_param {
u32 tlv_header;
u32 gpio_num;
u32 input;
u32 pull_type;
u32 intr_mode;
};
struct gpio_output_params {
u32 gpio_num;
u32 set;
};
struct wmi_gpio_output_cmd_param {
u32 tlv_header;
u32 gpio_num;
u32 set;
};
struct set_fwtest_params {
u32 arg;
u32 value;
};
struct wmi_fwtest_set_param_cmd_param {
u32 tlv_header;
u32 param_id;
u32 param_value;
};
struct wmi_pdev_set_param_cmd {
u32 tlv_header;
u32 pdev_id;
u32 param_id;
u32 param_value;
} __packed;
struct wmi_pdev_set_ps_mode_cmd {
u32 tlv_header;
u32 vdev_id;
u32 sta_ps_mode;
} __packed;
struct wmi_pdev_suspend_cmd {
u32 tlv_header;
u32 pdev_id;
u32 suspend_opt;
} __packed;
struct wmi_pdev_resume_cmd {
u32 tlv_header;
u32 pdev_id;
} __packed;
struct wmi_pdev_bss_chan_info_req_cmd {
u32 tlv_header;
/* ref wmi_bss_chan_info_req_type */
u32 req_type;
} __packed;
struct wmi_ap_ps_peer_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 param;
u32 value;
} __packed;
struct wmi_sta_powersave_param_cmd {
u32 tlv_header;
u32 vdev_id;
u32 param;
u32 value;
} __packed;
struct wmi_pdev_set_regdomain_cmd {
u32 tlv_header;
u32 pdev_id;
u32 reg_domain;
u32 reg_domain_2g;
u32 reg_domain_5g;
u32 conformance_test_limit_2g;
u32 conformance_test_limit_5g;
u32 dfs_domain;
} __packed;
struct wmi_peer_set_param_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 param_id;
u32 param_value;
} __packed;
struct wmi_peer_flush_tids_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 peer_tid_bitmap;
} __packed;
struct wmi_dfs_phyerr_offload_cmd {
u32 tlv_header;
u32 pdev_id;
} __packed;
struct wmi_bcn_offload_ctrl_cmd {
u32 tlv_header;
u32 vdev_id;
u32 bcn_ctrl_op;
} __packed;
enum scan_dwelltime_adaptive_mode {
SCAN_DWELL_MODE_DEFAULT = 0,
SCAN_DWELL_MODE_CONSERVATIVE = 1,
SCAN_DWELL_MODE_MODERATE = 2,
SCAN_DWELL_MODE_AGGRESSIVE = 3,
SCAN_DWELL_MODE_STATIC = 4
};
#define WLAN_SCAN_MAX_NUM_SSID 10
#define WLAN_SCAN_MAX_NUM_BSSID 10
#define WLAN_SCAN_MAX_NUM_CHANNELS 40
#define WLAN_SSID_MAX_LEN 32
struct element_info {
u32 len;
u8 *ptr;
};
struct wlan_ssid {
u8 length;
u8 ssid[WLAN_SSID_MAX_LEN];
};
#define WMI_IE_BITMAP_SIZE 8
#define WMI_SCAN_MAX_NUM_SSID 0x0A
/* prefix used by scan requestor ids on the host */
#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
/* prefix used by scan request ids generated on the host */
/* host cycles through the lower 12 bits to generate ids */
#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
#define WLAN_SCAN_PARAMS_MAX_SSID 16
#define WLAN_SCAN_PARAMS_MAX_BSSID 4
#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
/* Values lower than this may be refused by some firmware revisions with a scan
* completion with a timedout reason.
*/
#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
/* Scan priority numbers must be sequential, starting with 0 */
enum wmi_scan_priority {
WMI_SCAN_PRIORITY_VERY_LOW = 0,
WMI_SCAN_PRIORITY_LOW,
WMI_SCAN_PRIORITY_MEDIUM,
WMI_SCAN_PRIORITY_HIGH,
WMI_SCAN_PRIORITY_VERY_HIGH,
WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
};
enum wmi_scan_event_type {
WMI_SCAN_EVENT_STARTED = BIT(0),
WMI_SCAN_EVENT_COMPLETED = BIT(1),
WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
WMI_SCAN_EVENT_DEQUEUED = BIT(4),
/* possibly by high-prio scan */
WMI_SCAN_EVENT_PREEMPTED = BIT(5),
WMI_SCAN_EVENT_START_FAILED = BIT(6),
WMI_SCAN_EVENT_RESTARTED = BIT(7),
WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
WMI_SCAN_EVENT_SUSPENDED = BIT(9),
WMI_SCAN_EVENT_RESUMED = BIT(10),
WMI_SCAN_EVENT_MAX = BIT(15),
};
enum wmi_scan_completion_reason {
WMI_SCAN_REASON_COMPLETED,
WMI_SCAN_REASON_CANCELLED,
WMI_SCAN_REASON_PREEMPTED,
WMI_SCAN_REASON_TIMEDOUT,
WMI_SCAN_REASON_INTERNAL_FAILURE,
WMI_SCAN_REASON_MAX,
};
struct wmi_start_scan_cmd {
u32 tlv_header;
u32 scan_id;
u32 scan_req_id;
u32 vdev_id;
u32 scan_priority;
u32 notify_scan_events;
u32 dwell_time_active;
u32 dwell_time_passive;
u32 min_rest_time;
u32 max_rest_time;
u32 repeat_probe_time;
u32 probe_spacing_time;
u32 idle_time;
u32 max_scan_time;
u32 probe_delay;
u32 scan_ctrl_flags;
u32 burst_duration;
u32 num_chan;
u32 num_bssid;
u32 num_ssids;
u32 ie_len;
u32 n_probes;
struct wmi_mac_addr mac_addr;
struct wmi_mac_addr mac_mask;
u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
u32 num_vendor_oui;
u32 scan_ctrl_flags_ext;
u32 dwell_time_active_2g;
} __packed;
#define WMI_SCAN_FLAG_PASSIVE 0x1
#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
#define WMI_SCAN_ADD_CCK_RATES 0x4
#define WMI_SCAN_ADD_OFDM_RATES 0x8
#define WMI_SCAN_CHAN_STAT_EVENT 0x10
#define WMI_SCAN_FILTER_PROBE_REQ 0x20
#define WMI_SCAN_BYPASS_DFS_CHN 0x40
#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
#define WMI_SCAN_FILTER_PROMISCUOS 0x100
#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
#define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
#define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
#define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
#define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
#define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
#define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
#define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
#define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
#define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
#define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
#define WMI_SCAN_DWELL_MODE_SHIFT 21
enum {
WMI_SCAN_DWELL_MODE_DEFAULT = 0,
WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
WMI_SCAN_DWELL_MODE_MODERATE = 2,
WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
WMI_SCAN_DWELL_MODE_STATIC = 4,
};
#define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
WMI_SCAN_DWELL_MODE_MASK))
struct scan_req_params {
u32 scan_id;
u32 scan_req_id;
u32 vdev_id;
u32 pdev_id;
enum wmi_scan_priority scan_priority;
union {
struct {
u32 scan_ev_started:1,
scan_ev_completed:1,
scan_ev_bss_chan:1,
scan_ev_foreign_chan:1,
scan_ev_dequeued:1,
scan_ev_preempted:1,
scan_ev_start_failed:1,
scan_ev_restarted:1,
scan_ev_foreign_chn_exit:1,
scan_ev_invalid:1,
scan_ev_gpio_timeout:1,
scan_ev_suspended:1,
scan_ev_resumed:1;
};
u32 scan_events;
};
u32 dwell_time_active;
u32 dwell_time_active_2g;
u32 dwell_time_passive;
u32 min_rest_time;
u32 max_rest_time;
u32 repeat_probe_time;
u32 probe_spacing_time;
u32 idle_time;
u32 max_scan_time;
u32 probe_delay;
union {
struct {
u32 scan_f_passive:1,
scan_f_bcast_probe:1,
scan_f_cck_rates:1,
scan_f_ofdm_rates:1,
scan_f_chan_stat_evnt:1,
scan_f_filter_prb_req:1,
scan_f_bypass_dfs_chn:1,
scan_f_continue_on_err:1,
scan_f_offchan_mgmt_tx:1,
scan_f_offchan_data_tx:1,
scan_f_promisc_mode:1,
scan_f_capture_phy_err:1,
scan_f_strict_passive_pch:1,
scan_f_half_rate:1,
scan_f_quarter_rate:1,
scan_f_force_active_dfs_chn:1,
scan_f_add_tpc_ie_in_probe:1,
scan_f_add_ds_ie_in_probe:1,
scan_f_add_spoofed_mac_in_probe:1,
scan_f_add_rand_seq_in_probe:1,
scan_f_en_ie_whitelist_in_probe:1,
scan_f_forced:1,
scan_f_2ghz:1,
scan_f_5ghz:1,
scan_f_80mhz:1;
};
u32 scan_flags;
};
enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
u32 burst_duration;
u32 num_chan;
u32 num_bssid;
u32 num_ssids;
u32 n_probes;
u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS];
u32 notify_scan_events;
struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
struct element_info extraie;
struct element_info htcap;
struct element_info vhtcap;
};
struct wmi_ssid_arg {
int len;
const u8 *ssid;
};
struct wmi_bssid_arg {
const u8 *bssid;
};
struct wmi_start_scan_arg {
u32 scan_id;
u32 scan_req_id;
u32 vdev_id;
u32 scan_priority;
u32 notify_scan_events;
u32 dwell_time_active;
u32 dwell_time_passive;
u32 min_rest_time;
u32 max_rest_time;
u32 repeat_probe_time;
u32 probe_spacing_time;
u32 idle_time;
u32 max_scan_time;
u32 probe_delay;
u32 scan_ctrl_flags;
u32 ie_len;
u32 n_channels;
u32 n_ssids;
u32 n_bssids;
u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
u32 channels[64];
struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
};
#define WMI_SCAN_STOP_ONE 0x00000000
#define WMI_SCN_STOP_VAP_ALL 0x01000000
#define WMI_SCAN_STOP_ALL 0x04000000
/* Prefix 0xA000 indicates that the scan request
* is trigger by HOST
*/
#define ATH11K_SCAN_ID 0xA000
enum scan_cancel_req_type {
WLAN_SCAN_CANCEL_SINGLE = 1,
WLAN_SCAN_CANCEL_VDEV_ALL,
WLAN_SCAN_CANCEL_PDEV_ALL,
};
struct scan_cancel_param {
u32 requester;
u32 scan_id;
enum scan_cancel_req_type req_type;
u32 vdev_id;
u32 pdev_id;
};
struct wmi_bcn_send_from_host_cmd {
u32 tlv_header;
u32 vdev_id;
u32 data_len;
union {
u32 frag_ptr;
u32 frag_ptr_lo;
};
u32 frame_ctrl;
u32 dtim_flag;
u32 bcn_antenna;
u32 frag_ptr_hi;
};
#define WMI_CHAN_INFO_MODE GENMASK(5, 0)
#define WMI_CHAN_INFO_HT40_PLUS BIT(6)
#define WMI_CHAN_INFO_PASSIVE BIT(7)
#define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
#define WMI_CHAN_INFO_AP_DISABLED BIT(9)
#define WMI_CHAN_INFO_DFS BIT(10)
#define WMI_CHAN_INFO_ALLOW_HT BIT(11)
#define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
#define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
#define WMI_CHAN_INFO_HALF_RATE BIT(14)
#define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
#define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
#define WMI_CHAN_INFO_ALLOW_HE BIT(17)
#define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
#define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
#define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
#define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
#define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
#define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
struct wmi_channel {
u32 tlv_header;
u32 mhz;
u32 band_center_freq1;
u32 band_center_freq2;
u32 info;
u32 reg_info_1;
u32 reg_info_2;
} __packed;
struct wmi_mgmt_params {
void *tx_frame;
u16 frm_len;
u8 vdev_id;
u16 chanfreq;
void *pdata;
u16 desc_id;
u8 *macaddr;
void *qdf_ctx;
};
enum wmi_sta_ps_mode {
WMI_STA_PS_MODE_DISABLED = 0,
WMI_STA_PS_MODE_ENABLED = 1,
};
#define WMI_SMPS_MASK_LOWER_16BITS 0xFF
#define WMI_SMPS_MASK_UPPER_3BITS 0x7
#define WMI_SMPS_PARAM_VALUE_SHIFT 29
#define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
#define ATH11K_WMI_FW_HANG_DELAY 0
/* type, 0:unused 1: ASSERT 2: not respond detect command
* delay_time_ms, the simulate will delay time
*/
struct wmi_force_fw_hang_cmd {
u32 tlv_header;
u32 type;
u32 delay_time_ms;
};
struct wmi_vdev_set_param_cmd {
u32 tlv_header;
u32 vdev_id;
u32 param_id;
u32 param_value;
} __packed;
enum wmi_stats_id {
WMI_REQUEST_PEER_STAT = BIT(0),
WMI_REQUEST_AP_STAT = BIT(1),
WMI_REQUEST_PDEV_STAT = BIT(2),
WMI_REQUEST_VDEV_STAT = BIT(3),
WMI_REQUEST_BCNFLT_STAT = BIT(4),
WMI_REQUEST_VDEV_RATE_STAT = BIT(5),
WMI_REQUEST_INST_STAT = BIT(6),
WMI_REQUEST_MIB_STAT = BIT(7),
WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8),
WMI_REQUEST_CONGESTION_STAT = BIT(9),
WMI_REQUEST_PEER_EXTD_STAT = BIT(10),
WMI_REQUEST_BCN_STAT = BIT(11),
WMI_REQUEST_BCN_STAT_RESET = BIT(12),
WMI_REQUEST_PEER_EXTD2_STAT = BIT(13),
};
struct wmi_request_stats_cmd {
u32 tlv_header;
enum wmi_stats_id stats_id;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 pdev_id;
} __packed;
#define WMI_BEACON_TX_BUFFER_SIZE 512
struct wmi_bcn_tmpl_cmd {
u32 tlv_header;
u32 vdev_id;
u32 tim_ie_offset;
u32 buf_len;
u32 csa_switch_count_offset;
u32 ext_csa_switch_count_offset;
u32 csa_event_bitmap;
u32 mbssid_ie_offset;
u32 esp_ie_offset;
} __packed;
struct wmi_key_seq_counter {
u32 key_seq_counter_l;
u32 key_seq_counter_h;
} __packed;
struct wmi_vdev_install_key_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 key_idx;
u32 key_flags;
u32 key_cipher;
struct wmi_key_seq_counter key_rsc_counter;
struct wmi_key_seq_counter key_global_rsc_counter;
struct wmi_key_seq_counter key_tsc_counter;
u8 wpi_key_rsc_counter[16];
u8 wpi_key_tsc_counter[16];
u32 key_len;
u32 key_txmic_len;
u32 key_rxmic_len;
u32 is_group_key_id_valid;
u32 group_key_id;
/* Followed by key_data containing key followed by
* tx mic and then rx mic
*/
} __packed;
struct wmi_vdev_install_key_arg {
u32 vdev_id;
const u8 *macaddr;
u32 key_idx;
u32 key_flags;
u32 key_cipher;
u32 key_len;
u32 key_txmic_len;
u32 key_rxmic_len;
u64 key_rsc_counter;
const void *key_data;
};
#define WMI_MAX_SUPPORTED_RATES 128
#define WMI_HOST_MAX_HECAP_PHY_SIZE 3
#define WMI_HOST_MAX_HE_RATE_SET 3
#define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
#define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
#define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
struct wmi_rate_set_arg {
u32 num_rates;
u8 rates[WMI_MAX_SUPPORTED_RATES];
};
struct peer_assoc_params {
struct wmi_mac_addr peer_macaddr;
u32 vdev_id;
u32 peer_new_assoc;
u32 peer_associd;
u32 peer_flags;
u32 peer_caps;
u32 peer_listen_intval;
u32 peer_ht_caps;
u32 peer_max_mpdu;
u32 peer_mpdu_density;
u32 peer_rate_caps;
u32 peer_nss;
u32 peer_vht_caps;
u32 peer_phymode;
u32 peer_ht_info[2];
struct wmi_rate_set_arg peer_legacy_rates;
struct wmi_rate_set_arg peer_ht_rates;
u32 rx_max_rate;
u32 rx_mcs_set;
u32 tx_max_rate;
u32 tx_mcs_set;
u8 vht_capable;
u32 tx_max_mcs_nss;
u32 peer_bw_rxnss_override;
bool is_pmf_enabled;
bool is_wme_set;
bool qos_flag;
bool apsd_flag;
bool ht_flag;
bool bw_40;
bool bw_80;
bool bw_160;
bool stbc_flag;
bool ldpc_flag;
bool static_mimops_flag;
bool dynamic_mimops_flag;
bool spatial_mux_flag;
bool vht_flag;
bool vht_ng_flag;
bool need_ptk_4_way;
bool need_gtk_2_way;
bool auth_flag;
bool safe_mode_enabled;
bool amsdu_disable;
/* Use common structure */
u8 peer_mac[ETH_ALEN];
bool he_flag;
u32 peer_he_cap_macinfo[2];
u32 peer_he_cap_macinfo_internal;
u32 peer_he_ops;
u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
u32 peer_he_mcs_count;
u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
bool twt_responder;
bool twt_requester;
struct ath11k_ppe_threshold peer_ppet;
};
struct wmi_peer_assoc_complete_cmd {
u32 tlv_header;
struct wmi_mac_addr peer_macaddr;
u32 vdev_id;
u32 peer_new_assoc;
u32 peer_associd;
u32 peer_flags;
u32 peer_caps;
u32 peer_listen_intval;
u32 peer_ht_caps;
u32 peer_max_mpdu;
u32 peer_mpdu_density;
u32 peer_rate_caps;
u32 peer_nss;
u32 peer_vht_caps;
u32 peer_phymode;
u32 peer_ht_info[2];
u32 num_peer_legacy_rates;
u32 num_peer_ht_rates;
u32 peer_bw_rxnss_override;
struct wmi_ppe_threshold peer_ppet;
u32 peer_he_cap_info;
u32 peer_he_ops;
u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
u32 peer_he_mcs;
u32 peer_he_cap_info_ext;
u32 peer_he_cap_info_internal;
} __packed;
struct wmi_stop_scan_cmd {
u32 tlv_header;
u32 requestor;
u32 scan_id;
u32 req_type;
u32 vdev_id;
u32 pdev_id;
};
struct scan_chan_list_params {
u32 pdev_id;
u16 nallchans;
struct channel_param ch_param[1];
};
struct wmi_scan_chan_list_cmd {
u32 tlv_header;
u32 num_scan_chans;
u32 flags;
u32 pdev_id;
} __packed;
#define WMI_MGMT_SEND_DOWNLD_LEN 64
#define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
#define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
#define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
#define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
#define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
#define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
#define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
#define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
#define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
struct wmi_mgmt_send_params {
u32 tlv_header;
u32 tx_params_dword0;
u32 tx_params_dword1;
};
struct wmi_mgmt_send_cmd {
u32 tlv_header;
u32 vdev_id;
u32 desc_id;
u32 chanfreq;
u32 paddr_lo;
u32 paddr_hi;
u32 frame_len;
u32 buf_len;
u32 tx_params_valid;
/* This TLV is followed by struct wmi_mgmt_frame */
/* Followed by struct wmi_mgmt_send_params */
} __packed;
struct wmi_sta_powersave_mode_cmd {
u32 tlv_header;
u32 vdev_id;
u32 sta_ps_mode;
};
struct wmi_sta_smps_force_mode_cmd {
u32 tlv_header;
u32 vdev_id;
u32 forced_mode;
};
struct wmi_sta_smps_param_cmd {
u32 tlv_header;
u32 vdev_id;
u32 param;
u32 value;
};
struct wmi_bcn_prb_info {
u32 tlv_header;
u32 caps;
u32 erp;
} __packed;
enum {
WMI_PDEV_SUSPEND,
WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
};
struct green_ap_ps_params {
u32 value;
};
struct wmi_pdev_green_ap_ps_enable_cmd_param {
u32 tlv_header;
u32 pdev_id;
u32 enable;
};
struct ap_ps_params {
u32 vdev_id;
u32 param;
u32 value;
};
struct vdev_set_params {
u32 if_id;
u32 param_id;
u32 param_value;
};
struct stats_request_params {
u32 stats_id;
u32 vdev_id;
u32 pdev_id;
};
enum set_init_cc_type {
WMI_COUNTRY_INFO_TYPE_ALPHA,
WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
};
enum set_init_cc_flags {
INVALID_CC,
CC_IS_SET,
REGDMN_IS_SET,
ALPHA_IS_SET,
};
struct wmi_init_country_params {
union {
u16 country_code;
u16 regdom_id;
u8 alpha2[3];
} cc_info;
enum set_init_cc_flags flags;
};
struct wmi_init_country_cmd {
u32 tlv_header;
u32 pdev_id;
u32 init_cc_type;
union {
u32 country_code;
u32 regdom_id;
u32 alpha2;
} cc_info;
} __packed;
struct wmi_pdev_pktlog_filter_info {
u32 tlv_header;
struct wmi_mac_addr peer_macaddr;
} __packed;
struct wmi_pdev_pktlog_filter_cmd {
u32 tlv_header;
u32 pdev_id;
u32 enable;
u32 filter_type;
u32 num_mac;
} __packed;
enum ath11k_wmi_pktlog_enable {
ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0,
ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
};
struct wmi_pktlog_enable_cmd {
u32 tlv_header;
u32 pdev_id;
u32 evlist; /* WMI_PKTLOG_EVENT */
u32 enable;
} __packed;
struct wmi_pktlog_disable_cmd {
u32 tlv_header;
u32 pdev_id;
} __packed;
#define DFS_PHYERR_UNIT_TEST_CMD 0
#define DFS_UNIT_TEST_MODULE 0x2b
#define DFS_UNIT_TEST_TOKEN 0xAA
enum dfs_test_args_idx {
DFS_TEST_CMDID = 0,
DFS_TEST_PDEV_ID,
DFS_TEST_RADAR_PARAM,
DFS_MAX_TEST_ARGS,
};
struct wmi_dfs_unit_test_arg {
u32 cmd_id;
u32 pdev_id;
u32 radar_param;
};
struct wmi_unit_test_cmd {
u32 tlv_header;
u32 vdev_id;
u32 module_id;
u32 num_args;
u32 diag_token;
/* Followed by test args*/
} __packed;
#define MAX_SUPPORTED_RATES 128
#define WMI_PEER_AUTH 0x00000001
#define WMI_PEER_QOS 0x00000002
#define WMI_PEER_NEED_PTK_4_WAY 0x00000004
#define WMI_PEER_NEED_GTK_2_WAY 0x00000010
#define WMI_PEER_HE 0x00000400
#define WMI_PEER_APSD 0x00000800
#define WMI_PEER_HT 0x00001000
#define WMI_PEER_40MHZ 0x00002000
#define WMI_PEER_STBC 0x00008000
#define WMI_PEER_LDPC 0x00010000
#define WMI_PEER_DYN_MIMOPS 0x00020000
#define WMI_PEER_STATIC_MIMOPS 0x00040000
#define WMI_PEER_SPATIAL_MUX 0x00200000
#define WMI_PEER_TWT_REQ 0x00400000
#define WMI_PEER_TWT_RESP 0x00800000
#define WMI_PEER_VHT 0x02000000
#define WMI_PEER_80MHZ 0x04000000
#define WMI_PEER_PMF 0x08000000
/* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
* Need to be cleaned up
*/
#define WMI_PEER_IS_P2P_CAPABLE 0x20000000
#define WMI_PEER_160MHZ 0x40000000
#define WMI_PEER_SAFEMODE_EN 0x80000000
struct beacon_tmpl_params {
u8 vdev_id;
u32 tim_ie_offset;
u32 tmpl_len;
u32 tmpl_len_aligned;
u32 csa_switch_count_offset;
u32 ext_csa_switch_count_offset;
u8 *frm;
};
struct wmi_rate_set {
u32 num_rates;
u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
};
struct wmi_vht_rate_set {
u32 tlv_header;
u32 rx_max_rate;
u32 rx_mcs_set;
u32 tx_max_rate;
u32 tx_mcs_set;
u32 tx_max_mcs_nss;
} __packed;
struct wmi_he_rate_set {
u32 tlv_header;
u32 rx_mcs_set;
u32 tx_mcs_set;
} __packed;
#define MAX_REG_RULES 10
#define REG_ALPHA2_LEN 2
enum wmi_start_event_param {
WMI_VDEV_START_RESP_EVENT = 0,
WMI_VDEV_RESTART_RESP_EVENT,
};
struct wmi_vdev_start_resp_event {
u32 vdev_id;
u32 requestor_id;
enum wmi_start_event_param resp_type;
u32 status;
u32 chain_mask;
u32 smps_mode;
union {
u32 mac_id;
u32 pdev_id;
};
u32 cfgd_tx_streams;
u32 cfgd_rx_streams;
} __packed;
/* VDEV start response status codes */
enum wmi_vdev_start_resp_status_code {
WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
};
;
enum cc_setting_code {
REG_SET_CC_STATUS_PASS = 0,
REG_CURRENT_ALPHA2_NOT_FOUND = 1,
REG_INIT_ALPHA2_NOT_FOUND = 2,
REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
REG_SET_CC_STATUS_NO_MEMORY = 4,
REG_SET_CC_STATUS_FAIL = 5,
};
/* Regaulatory Rule Flags Passed by FW */
#define REGULATORY_CHAN_DISABLED BIT(0)
#define REGULATORY_CHAN_NO_IR BIT(1)
#define REGULATORY_CHAN_RADAR BIT(3)
#define REGULATORY_CHAN_NO_OFDM BIT(6)
#define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
#define REGULATORY_CHAN_NO_HT40 BIT(4)
#define REGULATORY_CHAN_NO_80MHZ BIT(7)
#define REGULATORY_CHAN_NO_160MHZ BIT(8)
#define REGULATORY_CHAN_NO_20MHZ BIT(11)
#define REGULATORY_CHAN_NO_10MHZ BIT(12)
enum {
WMI_REG_SET_CC_STATUS_PASS = 0,
WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
WMI_REG_SET_CC_STATUS_FAIL = 5,
};
struct cur_reg_rule {
u16 start_freq;
u16 end_freq;
u16 max_bw;
u8 reg_power;
u8 ant_gain;
u16 flags;
};
struct cur_regulatory_info {
enum cc_setting_code status_code;
u8 num_phy;
u8 phy_id;
u16 reg_dmn_pair;
u16 ctry_code;
u8 alpha2[REG_ALPHA2_LEN + 1];
u32 dfs_region;
u32 phybitmap;
u32 min_bw_2g;
u32 max_bw_2g;
u32 min_bw_5g;
u32 max_bw_5g;
u32 num_2g_reg_rules;
u32 num_5g_reg_rules;
struct cur_reg_rule *reg_rules_2g_ptr;
struct cur_reg_rule *reg_rules_5g_ptr;
};
struct wmi_reg_chan_list_cc_event {
u32 status_code;
u32 phy_id;
u32 alpha2;
u32 num_phy;
u32 country_id;
u32 domain_code;
u32 dfs_region;
u32 phybitmap;
u32 min_bw_2g;
u32 max_bw_2g;
u32 min_bw_5g;
u32 max_bw_5g;
u32 num_2g_reg_rules;
u32 num_5g_reg_rules;
} __packed;
struct wmi_regulatory_rule_struct {
u32 tlv_header;
u32 freq_info;
u32 bw_pwr_info;
u32 flag_info;
};
struct wmi_peer_delete_resp_event {
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
} __packed;
struct wmi_bcn_tx_status_event {
u32 vdev_id;
u32 tx_status;
} __packed;
struct wmi_vdev_stopped_event {
u32 vdev_id;
} __packed;
struct wmi_pdev_bss_chan_info_event {
u32 pdev_id;
u32 freq; /* Units in MHz */
u32 noise_floor; /* units are dBm */
/* rx clear - how often the channel was unused */
u32 rx_clear_count_low;
u32 rx_clear_count_high;
/* cycle count - elapsed time during measured period, in clock ticks */
u32 cycle_count_low;
u32 cycle_count_high;
/* tx cycle count - elapsed time spent in tx, in clock ticks */
u32 tx_cycle_count_low;
u32 tx_cycle_count_high;
/* rx cycle count - elapsed time spent in rx, in clock ticks */
u32 rx_cycle_count_low;
u32 rx_cycle_count_high;
/*rx_cycle cnt for my bss in 64bits format */
u32 rx_bss_cycle_count_low;
u32 rx_bss_cycle_count_high;
} __packed;
#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
struct wmi_vdev_install_key_compl_event {
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 key_idx;
u32 key_flags;
u32 status;
} __packed;
struct wmi_vdev_install_key_complete_arg {
u32 vdev_id;
const u8 *macaddr;
u32 key_idx;
u32 key_flags;
u32 status;
};
struct wmi_peer_assoc_conf_event {
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
} __packed;
struct wmi_peer_assoc_conf_arg {
u32 vdev_id;
const u8 *macaddr;
};
/*
* PDEV statistics
*/
struct wmi_pdev_stats_base {
s32 chan_nf;
u32 tx_frame_count; /* Cycles spent transmitting frames */
u32 rx_frame_count; /* Cycles spent receiving frames */
u32 rx_clear_count; /* Total channel busy time, evidently */
u32 cycle_count; /* Total on-channel time */
u32 phy_err_count;
u32 chan_tx_pwr;
} __packed;
struct wmi_pdev_stats_extra {
u32 ack_rx_bad;
u32 rts_bad;
u32 rts_good;
u32 fcs_bad;
u32 no_beacons;
u32 mib_int_count;
} __packed;
struct wmi_pdev_stats_tx {
/* Num HTT cookies queued to dispatch list */
s32 comp_queued;
/* Num HTT cookies dispatched */
s32 comp_delivered;
/* Num MSDU queued to WAL */
s32 msdu_enqued;
/* Num MPDU queue to WAL */
s32 mpdu_enqued;
/* Num MSDUs dropped by WMM limit */
s32 wmm_drop;
/* Num Local frames queued */
s32 local_enqued;
/* Num Local frames done */
s32 local_freed;
/* Num queued to HW */
s32 hw_queued;
/* Num PPDU reaped from HW */
s32 hw_reaped;
/* Num underruns */
s32 underrun;
/* Num PPDUs cleaned up in TX abort */
s32 tx_abort;
/* Num MPDUs requed by SW */
s32 mpdus_requed;
/* excessive retries */
u32 tx_ko;
/* data hw rate code */
u32 data_rc;
/* Scheduler self triggers */
u32 self_triggers;
/* frames dropped due to excessive sw retries */
u32 sw_retry_failure;
/* illegal rate phy errors */
u32 illgl_rate_phy_err;
/* wal pdev continuous xretry */
u32 pdev_cont_xretry;
/* wal pdev tx timeouts */
u32 pdev_tx_timeout;
/* wal pdev resets */
u32 pdev_resets;
/* frames dropped due to non-availability of stateless TIDs */
u32 stateless_tid_alloc_failure;
/* PhY/BB underrun */
u32 phy_underrun;
/* MPDU is more than txop limit */
u32 txop_ovf;
} __packed;
struct wmi_pdev_stats_rx {
/* Cnts any change in ring routing mid-ppdu */
s32 mid_ppdu_route_change;
/* Total number of statuses processed */
s32 status_rcvd;
/* Extra frags on rings 0-3 */
s32 r0_frags;
s32 r1_frags;
s32 r2_frags;
s32 r3_frags;
/* MSDUs / MPDUs delivered to HTT */
s32 htt_msdus;
s32 htt_mpdus;
/* MSDUs / MPDUs delivered to local stack */
s32 loc_msdus;
s32 loc_mpdus;
/* AMSDUs that have more MSDUs than the status ring size */
s32 oversize_amsdu;
/* Number of PHY errors */
s32 phy_errs;
/* Number of PHY errors drops */
s32 phy_err_drop;
/* Number of mpdu errors - FCS, MIC, ENC etc. */
s32 mpdu_errs;
} __packed;
struct wmi_pdev_stats {
struct wmi_pdev_stats_base base;
struct wmi_pdev_stats_tx tx;
struct wmi_pdev_stats_rx rx;
} __packed;
#define WLAN_MAX_AC 4
#define MAX_TX_RATE_VALUES 10
#define MAX_TX_RATE_VALUES 10
struct wmi_vdev_stats {
u32 vdev_id;
u32 beacon_snr;
u32 data_snr;
u32 num_tx_frames[WLAN_MAX_AC];
u32 num_rx_frames;
u32 num_tx_frames_retries[WLAN_MAX_AC];
u32 num_tx_frames_failures[WLAN_MAX_AC];
u32 num_rts_fail;
u32 num_rts_success;
u32 num_rx_err;
u32 num_rx_discard;
u32 num_tx_not_acked;
u32 tx_rate_history[MAX_TX_RATE_VALUES];
u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
} __packed;
struct wmi_bcn_stats {
u32 vdev_id;
u32 tx_bcn_succ_cnt;
u32 tx_bcn_outage_cnt;
} __packed;
struct wmi_stats_event {
u32 stats_id;
u32 num_pdev_stats;
u32 num_vdev_stats;
u32 num_peer_stats;
u32 num_bcnflt_stats;
u32 num_chan_stats;
u32 num_mib_stats;
u32 pdev_id;
u32 num_bcn_stats;
u32 num_peer_extd_stats;
u32 num_peer_extd2_stats;
} __packed;
struct wmi_pdev_ctl_failsafe_chk_event {
u32 pdev_id;
u32 ctl_failsafe_status;
} __packed;
struct wmi_pdev_csa_switch_ev {
u32 pdev_id;
u32 current_switch_count;
u32 num_vdevs;
} __packed;
struct wmi_pdev_radar_ev {
u32 pdev_id;
u32 detection_mode;
u32 chan_freq;
u32 chan_width;
u32 detector_id;
u32 segment_id;
u32 timestamp;
u32 is_chirp;
s32 freq_offset;
s32 sidx;
} __packed;
#define WMI_RX_STATUS_OK 0x00
#define WMI_RX_STATUS_ERR_CRC 0x01
#define WMI_RX_STATUS_ERR_DECRYPT 0x08
#define WMI_RX_STATUS_ERR_MIC 0x10
#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
struct mgmt_rx_event_params {
u32 channel;
u32 snr;
u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
u32 rate;
enum wmi_phy_mode phy_mode;
u32 buf_len;
int status;
u32 flags;
int rssi;
u32 tsf_delta;
u8 pdev_id;
};
#define ATH_MAX_ANTENNA 4
struct wmi_mgmt_rx_hdr {
u32 channel;
u32 snr;
u32 rate;
u32 phy_mode;
u32 buf_len;
u32 status;
u32 rssi_ctl[ATH_MAX_ANTENNA];
u32 flags;
int rssi;
u32 tsf_delta;
u32 rx_tsf_l32;
u32 rx_tsf_u32;
u32 pdev_id;
} __packed;
#define MAX_ANTENNA_EIGHT 8
struct wmi_rssi_ctl_ext {
u32 tlv_header;
u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
};
struct wmi_mgmt_tx_compl_event {
u32 desc_id;
u32 status;
u32 pdev_id;
} __packed;
struct wmi_scan_event {
u32 event_type; /* %WMI_SCAN_EVENT_ */
u32 reason; /* %WMI_SCAN_REASON_ */
u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
u32 scan_req_id;
u32 scan_id;
u32 vdev_id;
/* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
* In case of AP it is TSF of the AP vdev
* In case of STA connected state, this is the TSF of the AP
* In case of STA not connected, it will be the free running HW timer
*/
u32 tsf_timestamp;
} __packed;
struct wmi_peer_sta_kickout_arg {
const u8 *mac_addr;
};
struct wmi_peer_sta_kickout_event {
struct wmi_mac_addr peer_macaddr;
} __packed;
enum wmi_roam_reason {
WMI_ROAM_REASON_BETTER_AP = 1,
WMI_ROAM_REASON_BEACON_MISS = 2,
WMI_ROAM_REASON_LOW_RSSI = 3,
WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
WMI_ROAM_REASON_HO_FAILED = 5,
/* keep last */
WMI_ROAM_REASON_MAX,
};
struct wmi_roam_event {
u32 vdev_id;
u32 reason;
u32 rssi;
} __packed;
#define WMI_CHAN_INFO_START_RESP 0
#define WMI_CHAN_INFO_END_RESP 1
struct wmi_chan_info_event {
u32 err_code;
u32 freq;
u32 cmd_flags;
u32 noise_floor;
u32 rx_clear_count;
u32 cycle_count;
u32 chan_tx_pwr_range;
u32 chan_tx_pwr_tp;
u32 rx_frame_count;
u32 my_bss_rx_cycle_count;
u32 rx_11b_mode_data_duration;
u32 tx_frame_cnt;
u32 mac_clk_mhz;
u32 vdev_id;
} __packed;
struct ath11k_targ_cap {
u32 phy_capability;
u32 max_frag_entry;
u32 num_rf_chains;
u32 ht_cap_info;
u32 vht_cap_info;
u32 vht_supp_mcs;
u32 hw_min_tx_power;
u32 hw_max_tx_power;
u32 sys_cap_info;
u32 min_pkt_size_enable;
u32 max_bcn_ie_size;
u32 max_num_scan_channels;
u32 max_supported_macs;
u32 wmi_fw_sub_feat_caps;
u32 txrx_chainmask;
u32 default_dbs_hw_mode_index;
u32 num_msdu_desc;
};
enum wmi_vdev_type {
WMI_VDEV_TYPE_AP = 1,
WMI_VDEV_TYPE_STA = 2,
WMI_VDEV_TYPE_IBSS = 3,
WMI_VDEV_TYPE_MONITOR = 4,
};
enum wmi_vdev_subtype {
WMI_VDEV_SUBTYPE_NONE,
WMI_VDEV_SUBTYPE_P2P_DEVICE,
WMI_VDEV_SUBTYPE_P2P_CLIENT,
WMI_VDEV_SUBTYPE_P2P_GO,
WMI_VDEV_SUBTYPE_PROXY_STA,
WMI_VDEV_SUBTYPE_MESH_NON_11S,
WMI_VDEV_SUBTYPE_MESH_11S,
};
enum wmi_sta_powersave_param {
WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
WMI_STA_PS_PARAM_UAPSD = 4,
};
#define WMI_UAPSD_AC_TYPE_DELI 0
#define WMI_UAPSD_AC_TYPE_TRIG 1
#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
((type == WMI_UAPSD_AC_TYPE_DELI) ? \
(1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
enum wmi_sta_ps_param_uapsd {
WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
};
#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
struct wmi_sta_uapsd_auto_trig_param {
u32 wmm_ac;
u32 user_priority;
u32 service_interval;
u32 suspend_interval;
u32 delay_interval;
};
struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
u32 vdev_id;
struct wmi_mac_addr peer_macaddr;
u32 num_ac;
};
struct wmi_sta_uapsd_auto_trig_arg {
u32 wmm_ac;
u32 user_priority;
u32 service_interval;
u32 suspend_interval;
u32 delay_interval;
};
enum wmi_sta_ps_param_tx_wake_threshold {
WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
/* Values greater than one indicate that many TX attempts per beacon
* interval before the STA will wake up
*/
};
/* The maximum number of PS-Poll frames the FW will send in response to
* traffic advertised in TIM before waking up (by sending a null frame with PS
* = 0). Value 0 has a special meaning: there is no maximum count and the FW
* will send as many PS-Poll as are necessary to retrieve buffered BU. This
* parameter is used when the RX wake policy is
* WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
* policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
*/
enum wmi_sta_ps_param_pspoll_count {
WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
/* Values greater than 0 indicate the maximum numer of PS-Poll frames
* FW will send before waking up.
*/
};
/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
enum wmi_ap_ps_param_uapsd {
WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
};
/* U-APSD maximum service period of peer station */
enum wmi_ap_ps_peer_param_max_sp {
WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
};
enum wmi_ap_ps_peer_param {
/** Set uapsd configuration for a given peer.
*
* This include the delivery and trigger enabled state for each AC.
* The host MLME needs to set this based on AP capability and stations
* request Set in the association request received from the station.
*
* Lower 8 bits of the value specify the UAPSD configuration.
*
* (see enum wmi_ap_ps_param_uapsd)
* The default value is 0.
*/
WMI_AP_PS_PEER_PARAM_UAPSD = 0,
/**
* Set the service period for a UAPSD capable station
*
* The service period from wme ie in the (re)assoc request frame.
*
* (see enum wmi_ap_ps_peer_param_max_sp)
*/
WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
/** Time in seconds for aging out buffered frames
* for STA in power save
*/
WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
/** Specify frame types that are considered SIFS
* RESP trigger frame
*/
WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
/** Specifies the trigger state of TID.
* Valid only for UAPSD frame type
*/
WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
/* Specifies the WNM sleep state of a STA */
WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
};
#define DISABLE_SIFS_RESPONSE_TRIGGER 0
#define WMI_MAX_KEY_INDEX 3
#define WMI_MAX_KEY_LEN 32
#define WMI_KEY_PAIRWISE 0x00
#define WMI_KEY_GROUP 0x01
#define WMI_CIPHER_NONE 0x0 /* clear key */
#define WMI_CIPHER_WEP 0x1
#define WMI_CIPHER_TKIP 0x2
#define WMI_CIPHER_AES_OCB 0x3
#define WMI_CIPHER_AES_CCM 0x4
#define WMI_CIPHER_WAPI 0x5
#define WMI_CIPHER_CKIP 0x6
#define WMI_CIPHER_AES_CMAC 0x7
#define WMI_CIPHER_ANY 0x8
#define WMI_CIPHER_AES_GCM 0x9
#define WMI_CIPHER_AES_GMAC 0xa
/* Value to disable fixed rate setting */
#define WMI_FIXED_RATE_NONE (0xffff)
#define ATH11K_RC_VERSION_OFFSET 28
#define ATH11K_RC_PREAMBLE_OFFSET 8
#define ATH11K_RC_NSS_OFFSET 5
#define ATH11K_HW_RATE_CODE(rate, nss, preamble) \
((1 << ATH11K_RC_VERSION_OFFSET) | \
((nss) << ATH11K_RC_NSS_OFFSET) | \
((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \
(rate))
/* Preamble types to be used with VDEV fixed rate configuration */
enum wmi_rate_preamble {
WMI_RATE_PREAMBLE_OFDM,
WMI_RATE_PREAMBLE_CCK,
WMI_RATE_PREAMBLE_HT,
WMI_RATE_PREAMBLE_VHT,
WMI_RATE_PREAMBLE_HE,
};
/**
* enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
* @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled.
* @WMI_USE_RTS_CTS : RTS/CTS Enabled.
* @WMI_USE_CTS2SELF : CTS to self protection Enabled.
*/
enum wmi_rtscts_prot_mode {
WMI_RTS_CTS_DISABLED = 0,
WMI_USE_RTS_CTS = 1,
WMI_USE_CTS2SELF = 2,
};
/**
* enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
* protection mode.
* @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS
* @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS
* @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS,
* but if there's a sw retry, both the rate
* series will use RTS-CTS.
* @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU.
* @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series.
*/
enum wmi_rtscts_profile {
WMI_RTSCTS_FOR_NO_RATESERIES = 0,
WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
WMI_RTSCTS_ERP = 3,
WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
};
struct ath11k_hal_reg_cap {
u32 eeprom_rd;
u32 eeprom_rd_ext;
u32 regcap1;
u32 regcap2;
u32 wireless_modes;
u32 low_2ghz_chan;
u32 high_2ghz_chan;
u32 low_5ghz_chan;
u32 high_5ghz_chan;
};
struct ath11k_mem_chunk {
void *vaddr;
dma_addr_t paddr;
u32 len;
u32 req_id;
};
#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
enum wmi_sta_ps_param_rx_wake_policy {
WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
};
enum ath11k_hw_txrx_mode {
ATH11K_HW_TXRX_RAW = 0,
ATH11K_HW_TXRX_NATIVE_WIFI = 1,
ATH11K_HW_TXRX_ETHERNET = 2,
};
struct wmi_wmm_params {
u32 tlv_header;
u32 cwmin;
u32 cwmax;
u32 aifs;
u32 txoplimit;
u32 acm;
u32 no_ack;
} __packed;
struct wmi_wmm_params_arg {
u8 acm;
u8 aifs;
u16 cwmin;
u16 cwmax;
u16 txop;
u8 no_ack;
};
struct wmi_vdev_set_wmm_params_cmd {
u32 tlv_header;
u32 vdev_id;
struct wmi_wmm_params wmm_params[4];
u32 wmm_param_type;
} __packed;
struct wmi_wmm_params_all_arg {
struct wmi_wmm_params_arg ac_be;
struct wmi_wmm_params_arg ac_bk;
struct wmi_wmm_params_arg ac_vi;
struct wmi_wmm_params_arg ac_vo;
};
#define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000
#define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10
#define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50
#define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20
#define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100
#define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80
#define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50
#define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10
#define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2
#define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2
#define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2
#define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500
#define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000
#define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000
#define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000
struct wmi_twt_enable_params_cmd {
u32 tlv_header;
u32 pdev_id;
u32 sta_cong_timer_ms;
u32 mbss_support;
u32 default_slot_size;
u32 congestion_thresh_setup;
u32 congestion_thresh_teardown;
u32 congestion_thresh_critical;
u32 interference_thresh_teardown;
u32 interference_thresh_setup;
u32 min_no_sta_setup;
u32 min_no_sta_teardown;
u32 no_of_bcast_mcast_slots;
u32 min_no_twt_slots;
u32 max_no_sta_twt;
u32 mode_check_interval;
u32 add_sta_slot_interval;
u32 remove_sta_slot_interval;
} __packed;
struct wmi_twt_disable_params_cmd {
u32 tlv_header;
u32 pdev_id;
} __packed;
struct wmi_obss_spatial_reuse_params_cmd {
u32 tlv_header;
u32 pdev_id;
u32 enable;
s32 obss_min;
s32 obss_max;
u32 vdev_id;
} __packed;
struct target_resource_config {
u32 num_vdevs;
u32 num_peers;
u32 num_active_peers;
u32 num_offload_peers;
u32 num_offload_reorder_buffs;
u32 num_peer_keys;
u32 num_tids;
u32 ast_skid_limit;
u32 tx_chain_mask;
u32 rx_chain_mask;
u32 rx_timeout_pri[4];
u32 rx_decap_mode;
u32 scan_max_pending_req;
u32 bmiss_offload_max_vdev;
u32 roam_offload_max_vdev;
u32 roam_offload_max_ap_profiles;
u32 num_mcast_groups;
u32 num_mcast_table_elems;
u32 mcast2ucast_mode;
u32 tx_dbg_log_size;
u32 num_wds_entries;
u32 dma_burst_size;
u32 mac_aggr_delim;
u32 rx_skip_defrag_timeout_dup_detection_check;
u32 vow_config;
u32 gtk_offload_max_vdev;
u32 num_msdu_desc;
u32 max_frag_entries;
u32 max_peer_ext_stats;
u32 smart_ant_cap;
u32 bk_minfree;
u32 be_minfree;
u32 vi_minfree;
u32 vo_minfree;
u32 rx_batchmode;
u32 tt_support;
u32 atf_config;
u32 iphdr_pad_config;
u32 qwrap_config:16,
alloc_frag_desc_for_data_pkt:16;
u32 num_tdls_vdevs;
u32 num_tdls_conn_table_entries;
u32 beacon_tx_offload_max_vdev;
u32 num_multicast_filter_entries;
u32 num_wow_filters;
u32 num_keep_alive_pattern;
u32 keep_alive_pattern_size;
u32 max_tdls_concurrent_sleep_sta;
u32 max_tdls_concurrent_buffer_sta;
u32 wmi_send_separate;
u32 num_ocb_vdevs;
u32 num_ocb_channels;
u32 num_ocb_schedules;
u32 num_ns_ext_tuples_cfg;
u32 bpf_instruction_size;
u32 max_bssid_rx_filters;
u32 use_pdev_id;
u32 peer_map_unmap_v2_support;
u32 sched_params;
u32 twt_ap_pdev_count;
u32 twt_ap_sta_count;
};
#define WMI_MAX_MEM_REQS 32
#define MAX_RADIOS 3
#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
#define WMI_SEND_TIMEOUT_HZ (3 * HZ)
struct ath11k_wmi_base {
struct ath11k_base *ab;
struct ath11k_pdev_wmi wmi[MAX_RADIOS];
enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
u32 max_msg_len[MAX_RADIOS];
struct completion service_ready;
struct completion unified_ready;
DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE);
wait_queue_head_t tx_credits_wq;
const struct wmi_peer_flags_map *peer_flags;
u32 num_mem_chunks;
u32 rx_decap_mode;
struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
enum wmi_host_hw_mode_config_type preferred_hw_mode;
struct target_resource_config wlan_resource_config;
struct ath11k_targ_cap *targ_cap;
};
int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
u32 cmd_id);
struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
struct sk_buff *frame);
int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
struct ieee80211_mutable_offsets *offs,
struct sk_buff *bcn);
int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
const u8 *bssid);
int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
bool restart);
int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
u32 vdev_id, u32 param_id, u32 param_val);
int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
u32 param_value, u8 pdev_id);
int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable);
int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
int ath11k_wmi_cmd_init(struct ath11k_base *ab);
int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
int ath11k_wmi_connect(struct ath11k_base *ab);
int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
u8 pdev_id);
int ath11k_wmi_attach(struct ath11k_base *ab);
void ath11k_wmi_detach(struct ath11k_base *ab);
int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
struct vdev_create_params *param);
int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
const u8 *addr, dma_addr_t paddr,
u8 tid, u8 ba_window_size_valid,
u32 ba_window_size);
int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
struct peer_create_params *param);
int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
u32 param_id, u32 param_value);
int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
u32 param, u32 param_value);
int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
const u8 *peer_addr, u8 vdev_id);
int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
struct scan_req_params *params);
int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
struct scan_cancel_param *param);
int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
struct wmi_wmm_params_all_arg *param);
int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
u32 pdev_id);
int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
struct peer_assoc_params *param);
int ath11k_wmi_vdev_install_key(struct ath11k *ar,
struct wmi_vdev_install_key_arg *arg);
int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
enum wmi_bss_chan_info_req_type type);
int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
struct stats_request_params *param);
int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
u8 peer_addr[ETH_ALEN],
struct peer_flush_params *param);
int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
struct ap_ps_params *param);
int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
struct scan_chan_list_params *chan_list);
int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
u32 pdev_id);
int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
u32 vdev_id, u32 bcn_ctrl_op);
int
ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
struct wmi_init_country_params init_cc_param);
int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
int
ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
struct rx_reorder_queue_remove_params *param);
int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
struct pdev_set_regdomain_params *param);
int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
struct ath11k_fw_stats *stats);
size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head);
size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head);
size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head);
void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
struct ath11k_fw_stats *fw_stats, u32 stats_id,
char *buf);
int ath11k_wmi_simulate_radar(struct ath11k *ar);
int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id);
int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
struct ieee80211_he_obss_pd *he_obss_pd);
#endif
|