Documentation/devicetree/bindings/net/qcom,ethqos.yaml


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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/qcom,ethqos.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Ethernet ETHQOS device

maintainers:
  - Bhupesh Sharma <bhupesh.sharma@linaro.org>

description:
  dwmmac based Qualcomm ethernet devices which support Gigabit
  ethernet (version v2.3.0 and onwards).

allOf:
  - $ref: snps,dwmac.yaml#

properties:
  compatible:
    enum:
      - qcom,qcs404-ethqos
      - qcom,sa8775p-ethqos
      - qcom,sc8280xp-ethqos
      - qcom,sm8150-ethqos

  reg:
    maxItems: 2

  reg-names:
    items:
      - const: stmmaceth
      - const: rgmii

  interrupts:
    minItems: 1
    items:
      - description: Combined signal for various interrupt events
      - description: The interrupt that occurs when Rx exits the LPI state
      - description: The interrupt that occurs when HW safety error triggered

  interrupt-names:
    minItems: 1
    items:
      - const: macirq
      - enum: [eth_lpi, sfty]
      - const: sfty

  clocks:
    maxItems: 4

  clock-names:
    items:
      - const: stmmaceth
      - const: pclk
      - const: ptp_ref
      - enum:
          - rgmii
          - phyaux

  iommus:
    maxItems: 1

  phys: true

  phy-names:
    const: serdes

required:
  - compatible
  - clocks
  - clock-names
  - reg-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/qcom,gcc-qcs404.h>
    #include <dt-bindings/gpio/gpio.h>

    ethernet: ethernet@7a80000 {
      compatible = "qcom,qcs404-ethqos";
      reg = <0x07a80000 0x10000>,
            <0x07a96000 0x100>;
      reg-names = "stmmaceth", "rgmii";
      clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
      clocks = <&gcc GCC_ETH_AXI_CLK>,
               <&gcc GCC_ETH_SLAVE_AHB_CLK>,
               <&gcc GCC_ETH_PTP_CLK>,
               <&gcc GCC_ETH_RGMII_CLK>;
      interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>;
      interrupt-names = "macirq", "eth_lpi", "sfty";

      rx-fifo-depth = <4096>;
      tx-fifo-depth = <4096>;

      snps,tso;
      snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
      snps,reset-active-low;
      snps,reset-delays-us = <0 10000 10000>;

      pinctrl-names = "default";
      pinctrl-0 = <&ethernet_defaults>;

      phy-handle = <&phy1>;
      phy-mode = "rgmii";
      mdio {
        #address-cells = <0x1>;
        #size-cells = <0x0>;

        compatible = "snps,dwmac-mdio";
        phy1: phy@4 {
          compatible = "ethernet-phy-ieee802.3-c22";
          device_type = "ethernet-phy";
          reg = <0x4>;

          #phy-cells = <0>;
        };
      };
    };