summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml
blob: 9c1f9140c731b9693078fa7a80638fa27dd96a6e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Display DSI 20nm PHY

maintainers:
  - Krishna Manikandan <quic_mkrishn@quicinc.com>

allOf:
  - $ref: dsi-phy-common.yaml#

properties:
  compatible:
    const: qcom,dsi-phy-20nm

  reg:
    items:
      - description: dsi pll register set
      - description: dsi phy register set
      - description: dsi phy regulator register set

  reg-names:
    items:
      - const: dsi_pll
      - const: dsi_phy
      - const: dsi_phy_regulator

  vcca-supply:
    description: Phandle to vcca regulator device node.

  vddio-supply:
    description: Phandle to vdd-io regulator device node.

required:
  - compatible
  - reg
  - reg-names
  - vddio-supply
  - vcca-supply

unevaluatedProperties: false

examples:
  - |
     #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
     #include <dt-bindings/clock/qcom,rpmh.h>

     dsi-phy@fd922a00 {
         compatible = "qcom,dsi-phy-20nm";
         reg = <0xfd922a00 0xd4>,
               <0xfd922b00 0x2b0>,
               <0xfd922d80 0x7b>;
         reg-names = "dsi_pll",
                     "dsi_phy",
                     "dsi_phy_regulator";

         #clock-cells = <1>;
         #phy-cells = <0>;

         vcca-supply = <&vcca_reg>;
         vddio-supply = <&vddio_reg>;

         clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
                  <&rpmhcc RPMH_CXO_CLK>;
         clock-names = "iface", "ref";
     };
...