From d10046e25c73e6150677b1b5360f20bb631181a7 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 1 Apr 2014 12:59:09 +0200 Subject: pinctrl: sh-pfc: r8a7791: Split the DU sync and cde/disp groups The DU parallel interface ODDF signal is optional, move it out of the HSYNC/VSYNC group into a group of its down. The CDE and DISP signals are independent, split them to two different groups. Signed-off-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 37 ++++++++++++++++++++++++++---------- 1 file changed, 27 insertions(+), 10 deletions(-) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 5186d70c49d4..56f62dc6e666 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -1733,19 +1733,32 @@ static const unsigned int du_clk_out_1_mux[] = { DU1_DOTCLKOUT1_MARK }; static const unsigned int du_sync_pins[] = { - /* EXVSYNC/VSYNC, EXHSYNC/HSYNC, EXDISP/EXODDF/EXCDE */ - RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27), + /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ + RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27), }; static const unsigned int du_sync_mux[] = { - DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK }; -static const unsigned int du_cde_disp_pins[] = { - /* CDE DISP */ - RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30), +static const unsigned int du_oddf_pins[] = { + /* EXDISP/EXODDF/EXCDE */ + RCAR_GP_PIN(3, 29), +}; +static const unsigned int du_oddf_mux[] = { + DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, +}; +static const unsigned int du_cde_pins[] = { + /* CDE */ + RCAR_GP_PIN(3, 31), +}; +static const unsigned int du_cde_mux[] = { + DU1_CDE_MARK, +}; +static const unsigned int du_disp_pins[] = { + /* DISP */ + RCAR_GP_PIN(3, 30), }; -static const unsigned int du_cde_disp_mux[] = { - DU1_CDE_MARK, DU1_DISP_MARK +static const unsigned int du_disp_mux[] = { + DU1_DISP_MARK, }; static const unsigned int du0_clk_in_pins[] = { /* CLKIN */ @@ -3555,7 +3568,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_clk_out_0), SH_PFC_PIN_GROUP(du_clk_out_1), SH_PFC_PIN_GROUP(du_sync), - SH_PFC_PIN_GROUP(du_cde_disp), + SH_PFC_PIN_GROUP(du_oddf), + SH_PFC_PIN_GROUP(du_cde), + SH_PFC_PIN_GROUP(du_disp), SH_PFC_PIN_GROUP(du0_clk_in), SH_PFC_PIN_GROUP(du1_clk_in), SH_PFC_PIN_GROUP(du1_clk_in_b), @@ -3804,7 +3819,9 @@ static const char * const du_groups[] = { "du_clk_out_0", "du_clk_out_1", "du_sync", - "du_cde_disp", + "du_oddf", + "du_cde", + "du_disp", }; static const char * const du0_groups[] = { -- cgit v1.2.3-58-ga151 From b664cd1f020211d8e4480c2937b82fe513a9c757 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 13 Apr 2014 17:23:35 -0700 Subject: sh-pfc: r8a7791: Add SSI pin support Reviewed-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Kuninori Morimoto Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 314 +++++++++++++++++++++++++++++++++++ 1 file changed, 314 insertions(+) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 56f62dc6e666..4caddc6b103a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -3259,6 +3259,260 @@ static const unsigned int sdhi2_wp_pins[] = { static const unsigned int sdhi2_wp_mux[] = { SD2_WP_MARK, }; + +/* - SSI -------------------------------------------------------------------- */ +static const unsigned int ssi0_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 2), +}; + +static const unsigned int ssi0_data_mux[] = { + SSI_SDATA0_MARK, +}; + +static const unsigned int ssi0_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(3, 4), +}; + +static const unsigned int ssi0_data_b_mux[] = { + SSI_SDATA0_B_MARK, +}; + +static const unsigned int ssi0129_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), +}; + +static const unsigned int ssi0129_ctrl_mux[] = { + SSI_SCK0129_MARK, SSI_WS0129_MARK, +}; + +static const unsigned int ssi0129_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), +}; + +static const unsigned int ssi0129_ctrl_b_mux[] = { + SSI_SCK0129_B_MARK, SSI_WS0129_B_MARK, +}; + +static const unsigned int ssi1_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 5), +}; + +static const unsigned int ssi1_data_mux[] = { + SSI_SDATA1_MARK, +}; + +static const unsigned int ssi1_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(3, 7), +}; + +static const unsigned int ssi1_data_b_mux[] = { + SSI_SDATA1_B_MARK, +}; + +static const unsigned int ssi1_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), +}; + +static const unsigned int ssi1_ctrl_mux[] = { + SSI_SCK1_MARK, SSI_WS1_MARK, +}; + +static const unsigned int ssi1_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6), +}; + +static const unsigned int ssi1_ctrl_b_mux[] = { + SSI_SCK1_B_MARK, SSI_WS1_B_MARK, +}; + +static const unsigned int ssi2_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 8), +}; + +static const unsigned int ssi2_data_mux[] = { + SSI_SDATA2_MARK, +}; + +static const unsigned int ssi2_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7), +}; + +static const unsigned int ssi2_ctrl_mux[] = { + SSI_SCK2_MARK, SSI_WS2_MARK, +}; + +static const unsigned int ssi3_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 11), +}; + +static const unsigned int ssi3_data_mux[] = { + SSI_SDATA3_MARK, +}; + +static const unsigned int ssi34_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10), +}; + +static const unsigned int ssi34_ctrl_mux[] = { + SSI_SCK34_MARK, SSI_WS34_MARK, +}; + +static const unsigned int ssi4_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 14), +}; + +static const unsigned int ssi4_data_mux[] = { + SSI_SDATA4_MARK, +}; + +static const unsigned int ssi4_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), +}; + +static const unsigned int ssi4_ctrl_mux[] = { + SSI_SCK4_MARK, SSI_WS4_MARK, +}; + +static const unsigned int ssi5_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 17), +}; + +static const unsigned int ssi5_data_mux[] = { + SSI_SDATA5_MARK, +}; + +static const unsigned int ssi5_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), +}; + +static const unsigned int ssi5_ctrl_mux[] = { + SSI_SCK5_MARK, SSI_WS5_MARK, +}; + +static const unsigned int ssi6_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 20), +}; + +static const unsigned int ssi6_data_mux[] = { + SSI_SDATA6_MARK, +}; + +static const unsigned int ssi6_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19), +}; + +static const unsigned int ssi6_ctrl_mux[] = { + SSI_SCK6_MARK, SSI_WS6_MARK, +}; + +static const unsigned int ssi7_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 23), +}; + +static const unsigned int ssi7_data_mux[] = { + SSI_SDATA7_MARK, +}; + +static const unsigned int ssi7_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(3, 12), +}; + +static const unsigned int ssi7_data_b_mux[] = { + SSI_SDATA7_B_MARK, +}; + +static const unsigned int ssi78_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), +}; + +static const unsigned int ssi78_ctrl_mux[] = { + SSI_SCK78_MARK, SSI_WS78_MARK, +}; + +static const unsigned int ssi78_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), +}; + +static const unsigned int ssi78_ctrl_b_mux[] = { + SSI_SCK78_B_MARK, SSI_WS78_B_MARK, +}; + +static const unsigned int ssi8_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 24), +}; + +static const unsigned int ssi8_data_mux[] = { + SSI_SDATA8_MARK, +}; + +static const unsigned int ssi8_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(3, 13), +}; + +static const unsigned int ssi8_data_b_mux[] = { + SSI_SDATA8_B_MARK, +}; + +static const unsigned int ssi9_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(2, 27), +}; + +static const unsigned int ssi9_data_mux[] = { + SSI_SDATA9_MARK, +}; + +static const unsigned int ssi9_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(3, 18), +}; + +static const unsigned int ssi9_data_b_mux[] = { + SSI_SDATA9_B_MARK, +}; + +static const unsigned int ssi9_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 26), +}; + +static const unsigned int ssi9_ctrl_mux[] = { + SSI_SCK9_MARK, SSI_WS9_MARK, +}; + +static const unsigned int ssi9_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), +}; + +static const unsigned int ssi9_ctrl_b_mux[] = { + SSI_SCK9_B_MARK, SSI_WS9_B_MARK, +}; + /* - USB0 ------------------------------------------------------------------- */ static const unsigned int usb0_pins[] = { RCAR_GP_PIN(7, 23), /* PWEN */ @@ -3777,6 +4031,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(sdhi2_ctrl), SH_PFC_PIN_GROUP(sdhi2_cd), SH_PFC_PIN_GROUP(sdhi2_wp), + SH_PFC_PIN_GROUP(ssi0_data), + SH_PFC_PIN_GROUP(ssi0_data_b), + SH_PFC_PIN_GROUP(ssi0129_ctrl), + SH_PFC_PIN_GROUP(ssi0129_ctrl_b), + SH_PFC_PIN_GROUP(ssi1_data), + SH_PFC_PIN_GROUP(ssi1_data_b), + SH_PFC_PIN_GROUP(ssi1_ctrl), + SH_PFC_PIN_GROUP(ssi1_ctrl_b), + SH_PFC_PIN_GROUP(ssi2_data), + SH_PFC_PIN_GROUP(ssi2_ctrl), + SH_PFC_PIN_GROUP(ssi3_data), + SH_PFC_PIN_GROUP(ssi34_ctrl), + SH_PFC_PIN_GROUP(ssi4_data), + SH_PFC_PIN_GROUP(ssi4_ctrl), + SH_PFC_PIN_GROUP(ssi5_data), + SH_PFC_PIN_GROUP(ssi5_ctrl), + SH_PFC_PIN_GROUP(ssi6_data), + SH_PFC_PIN_GROUP(ssi6_ctrl), + SH_PFC_PIN_GROUP(ssi7_data), + SH_PFC_PIN_GROUP(ssi7_data_b), + SH_PFC_PIN_GROUP(ssi78_ctrl), + SH_PFC_PIN_GROUP(ssi78_ctrl_b), + SH_PFC_PIN_GROUP(ssi8_data), + SH_PFC_PIN_GROUP(ssi8_data_b), + SH_PFC_PIN_GROUP(ssi9_data), + SH_PFC_PIN_GROUP(ssi9_data_b), + SH_PFC_PIN_GROUP(ssi9_ctrl), + SH_PFC_PIN_GROUP(ssi9_ctrl_b), SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), VIN_DATA_PIN_GROUP(vin0_data, 24), @@ -4120,6 +4402,37 @@ static const char * const sdhi2_groups[] = { "sdhi2_wp", }; +static const char * const ssi_groups[] = { + "ssi0_data", + "ssi0_data_b", + "ssi0129_ctrl", + "ssi0129_ctrl_b", + "ssi1_data", + "ssi1_data_b", + "ssi1_ctrl", + "ssi1_ctrl_b", + "ssi2_data", + "ssi2_ctrl", + "ssi3_data", + "ssi34_ctrl", + "ssi4_data", + "ssi4_ctrl", + "ssi5_data", + "ssi5_ctrl", + "ssi6_data", + "ssi6_ctrl", + "ssi7_data", + "ssi7_data_b", + "ssi78_ctrl", + "ssi78_ctrl_b", + "ssi8_data", + "ssi8_data_b", + "ssi9_data", + "ssi9_data_b", + "ssi9_ctrl", + "ssi9_ctrl_b", +}; + static const char * const usb0_groups[] = { "usb0", }; @@ -4204,6 +4517,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(sdhi0), SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(ssi), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(vin0), -- cgit v1.2.3-58-ga151 From c57a05b0eb0ee0205b34f2694b035afc75fa71e4 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 13 Apr 2014 17:24:04 -0700 Subject: sh-pfc: r8a7791: Add Audio pin support Reviewed-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Kuninori Morimoto Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 61 ++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 4caddc6b103a..8be969a8ff9a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -1680,6 +1680,53 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), }; +/* - Audio Clock ------------------------------------------------------------ */ +static const unsigned int audio_clk_a_pins[] = { + /* CLK */ + RCAR_GP_PIN(2, 28), +}; + +static const unsigned int audio_clk_a_mux[] = { + AUDIO_CLKA_MARK, +}; + +static const unsigned int audio_clk_b_pins[] = { + /* CLK */ + RCAR_GP_PIN(2, 29), +}; + +static const unsigned int audio_clk_b_mux[] = { + AUDIO_CLKB_MARK, +}; + +static const unsigned int audio_clk_b_b_pins[] = { + /* CLK */ + RCAR_GP_PIN(7, 20), +}; + +static const unsigned int audio_clk_b_b_mux[] = { + AUDIO_CLKB_B_MARK, +}; + +static const unsigned int audio_clk_c_pins[] = { + /* CLK */ + RCAR_GP_PIN(2, 30), +}; + +static const unsigned int audio_clk_c_mux[] = { + AUDIO_CLKC_MARK, +}; + +static const unsigned int audio_clkout_pins[] = { + /* CLK */ + RCAR_GP_PIN(2, 31), +}; + +static const unsigned int audio_clkout_mux[] = { + AUDIO_CLKOUT_MARK, +}; + + /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -3817,6 +3864,11 @@ static const unsigned int vin2_clk_mux[] = { }; static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(audio_clk_a), + SH_PFC_PIN_GROUP(audio_clk_b), + SH_PFC_PIN_GROUP(audio_clk_b_b), + SH_PFC_PIN_GROUP(audio_clk_c), + SH_PFC_PIN_GROUP(audio_clkout), SH_PFC_PIN_GROUP(du_rgb666), SH_PFC_PIN_GROUP(du_rgb888), SH_PFC_PIN_GROUP(du_clk_out_0), @@ -4095,6 +4147,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin2_clk), }; +static const char * const audio_clk_groups[] = { + "audio_clk_a", + "audio_clk_b", + "audio_clk_b_b", + "audio_clk_c", + "audio_clkout", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4482,6 +4542,7 @@ static const char * const vin2_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), -- cgit v1.2.3-58-ga151 From 35a493de0daf4955b6d15d488b3f8754d4637a04 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 25 Mar 2014 19:56:25 +0100 Subject: pinctrl: pfc: r8a7790: add i2c0 muxing Add the muxing for the last missing i2c rcar core. Fix the sorting for SH_PFC_PIN_NAMED while we are here. Signed-off-by: Wolfram Sang Acked-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 48093719167a..51396210cfad 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -782,6 +782,7 @@ enum { USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK, TCLK1_B_MARK, + I2C0_SCL_MARK, I2C0_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK, PINMUX_MARK_END, }; @@ -1722,6 +1723,9 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP16_7, USB1_OVC), PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1), + PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1), + PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1), + PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1), PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1), }; @@ -1735,8 +1739,10 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), /* Pins not associated with a GPIO port */ - SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15), + SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15), + SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15), SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15), + SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -2054,6 +2060,14 @@ static const unsigned int hscif1_ctrl_b_pins[] = { static const unsigned int hscif1_ctrl_b_mux[] = { HRTS1_N_B_MARK, HCTS1_N_B_MARK, }; +/* - I2C0 ------------------------------------------------------------------- */ +static const unsigned int i2c0_pins[] = { + /* SCL, SDA */ + PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15), +}; +static const unsigned int i2c0_mux[] = { + I2C0_SCL_MARK, I2C0_SDA_MARK, +}; /* - I2C1 ------------------------------------------------------------------- */ static const unsigned int i2c1_pins[] = { /* SCL, SDA */ @@ -3757,6 +3771,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(hscif1_data_b), SH_PFC_PIN_GROUP(hscif1_clk_b), SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(i2c0), SH_PFC_PIN_GROUP(i2c1), SH_PFC_PIN_GROUP(i2c1_b), SH_PFC_PIN_GROUP(i2c1_c), @@ -4044,6 +4059,10 @@ static const char * const hscif1_groups[] = { "hscif1_ctrl_b", }; +static const char * const i2c0_groups[] = { + "i2c0", +}; + static const char * const i2c1_groups[] = { "i2c1", "i2c1_b", @@ -4373,6 +4392,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(eth), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), + SH_PFC_FUNCTION(i2c0), SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(i2c3), -- cgit v1.2.3-58-ga151 From a16b81dcbfc5889c37dac5f8e836136e4740fc18 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 25 Mar 2014 19:56:26 +0100 Subject: pinctrl: pfc: r8a7790: add mux data for IIC(B) cores Signed-off-by: Wolfram Sang Acked-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 118 ++++++++++++++++++++++++++++++++++- 1 file changed, 116 insertions(+), 2 deletions(-) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 51396210cfad..d79e0ba365a6 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -782,8 +782,8 @@ enum { USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK, TCLK1_B_MARK, - I2C0_SCL_MARK, I2C0_SDA_MARK, - I2C3_SCL_MARK, I2C3_SDA_MARK, + IIC0_SCL_MARK, IIC0_SDA_MARK, I2C0_SCL_MARK, I2C0_SDA_MARK, + IIC3_SCL_MARK, IIC3_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK, PINMUX_MARK_END, }; @@ -1723,9 +1723,13 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP16_7, USB1_OVC), PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1), + PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0), + PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0), PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1), PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1), + PINMUX_DATA(IIC3_SCL_MARK, FN_SEL_IICDVFS_0), + PINMUX_DATA(IIC3_SDA_MARK, FN_SEL_IICDVFS_0), PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1), PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1), }; @@ -2134,6 +2138,80 @@ static const unsigned int i2c3_pins[] = { static const unsigned int i2c3_mux[] = { I2C3_SCL_MARK, I2C3_SDA_MARK, }; +/* - IIC0 (I2C4) ------------------------------------------------------------ */ +static const unsigned int iic0_pins[] = { + /* SCL, SDA */ + PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15), +}; +static const unsigned int iic0_mux[] = { + IIC0_SCL_MARK, IIC0_SDA_MARK, +}; +/* - IIC1 (I2C5) ------------------------------------------------------------ */ +static const unsigned int iic1_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17), +}; +static const unsigned int iic1_mux[] = { + IIC1_SCL_MARK, IIC1_SDA_MARK, +}; +static const unsigned int iic1_b_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), +}; +static const unsigned int iic1_b_mux[] = { + IIC1_SCL_B_MARK, IIC1_SDA_B_MARK, +}; +static const unsigned int iic1_c_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), +}; +static const unsigned int iic1_c_mux[] = { + IIC1_SCL_C_MARK, IIC1_SDA_C_MARK, +}; +/* - IIC2 (I2C6) ------------------------------------------------------------ */ +static const unsigned int iic2_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), +}; +static const unsigned int iic2_mux[] = { + IIC2_SCL_MARK, IIC2_SDA_MARK, +}; +static const unsigned int iic2_b_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), +}; +static const unsigned int iic2_b_mux[] = { + IIC2_SCL_B_MARK, IIC2_SDA_B_MARK, +}; +static const unsigned int iic2_c_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), +}; +static const unsigned int iic2_c_mux[] = { + IIC2_SCL_C_MARK, IIC2_SDA_C_MARK, +}; +static const unsigned int iic2_d_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), +}; +static const unsigned int iic2_d_mux[] = { + IIC2_SCL_D_MARK, IIC2_SDA_D_MARK, +}; +static const unsigned int iic2_e_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19), +}; +static const unsigned int iic2_e_mux[] = { + IIC2_SCL_E_MARK, IIC2_SDA_E_MARK, +}; +/* - IIC3 (I2C7) ------------------------------------------------------------ */ +static const unsigned int iic3_pins[] = { +/* SCL, SDA */ + PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15), +}; +static const unsigned int iic3_mux[] = { + IIC3_SCL_MARK, IIC3_SDA_MARK, +}; /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ */ @@ -3781,6 +3859,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c2_d), SH_PFC_PIN_GROUP(i2c2_e), SH_PFC_PIN_GROUP(i2c3), + SH_PFC_PIN_GROUP(iic0), + SH_PFC_PIN_GROUP(iic1), + SH_PFC_PIN_GROUP(iic1_b), + SH_PFC_PIN_GROUP(iic1_c), + SH_PFC_PIN_GROUP(iic2), + SH_PFC_PIN_GROUP(iic2_b), + SH_PFC_PIN_GROUP(iic2_c), + SH_PFC_PIN_GROUP(iic2_d), + SH_PFC_PIN_GROUP(iic2_e), + SH_PFC_PIN_GROUP(iic3), SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), @@ -4081,6 +4169,28 @@ static const char * const i2c3_groups[] = { "i2c3", }; +static const char * const iic0_groups[] = { + "iic0", +}; + +static const char * const iic1_groups[] = { + "iic1", + "iic1_b", + "iic1_c", +}; + +static const char * const iic2_groups[] = { + "iic2", + "iic2_b", + "iic2_c", + "iic2_d", + "iic2_e", +}; + +static const char * const iic3_groups[] = { + "iic3", +}; + static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", @@ -4396,6 +4506,10 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(i2c3), + SH_PFC_FUNCTION(iic0), + SH_PFC_FUNCTION(iic1), + SH_PFC_FUNCTION(iic2), + SH_PFC_FUNCTION(iic3), SH_PFC_FUNCTION(intc), SH_PFC_FUNCTION(mmc0), SH_PFC_FUNCTION(mmc1), -- cgit v1.2.3-58-ga151 From 0e26e8dfb9dddb0559fb7cd7b53a8b497a8d4121 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 13 May 2014 13:37:46 +0200 Subject: pinctrl: sh-pfc: Don't set the pinmux_irq irq field for multiplatform In the multiplatform kernel case the IRQs associated with the PFC GPIOs are specified through DT. The pinmux_irq irq field is thus ignored by the code, and doesn't need to be set. This will allow removing the mach/irq.h include from pfc-*.c files that was required for the irq_pin() macro used to initialize the irq field. Signed-off-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/sh_pfc.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index ab8fd258d9ed..d482c40b012a 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -98,8 +98,13 @@ struct pinmux_irq { const short *gpios; }; +#ifdef CONFIG_ARCH_MULTIPLATFORM +#define PINMUX_IRQ(irq_nr, ids...) \ + { .gpios = (const short []) { ids, -1 } } +#else #define PINMUX_IRQ(irq_nr, ids...) \ { .irq = irq_nr, .gpios = (const short []) { ids, -1 } } +#endif struct pinmux_range { u16 begin; -- cgit v1.2.3-58-ga151 From b6c996a295620b67e4033f2eb07e5a5cf9e7a48f Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 13 May 2014 13:37:47 +0200 Subject: pinctrl: sh-pfc: r8a7740: Allow Multiplatform Build Add #ifdefs to allow r8a7740 Multiplatform build. Needed to enable r8a7740 Multiplatform support. Signed-off-by: Magnus Damm Signed-off-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index 6c83ce43a940..e4c1ef477053 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c @@ -22,7 +22,9 @@ #include #include +#ifndef CONFIG_ARCH_MULTIPLATFORM #include +#endif #include "core.h" #include "sh_pfc.h" -- cgit v1.2.3-58-ga151 From 672d32377494b84d6af483ce46eda07baba4e3ea Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 13 May 2014 13:37:48 +0200 Subject: pinctrl: sh-pfc: sh73a0: Allow Multiplatform Build Add #ifdefs to allow sh73a0 Multiplatform build. Needed to enable sh73a0 Multiplatform support. Signed-off-by: Magnus Damm Signed-off-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c index 6f6ba100994d..ee370de4609a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c @@ -26,7 +26,9 @@ #include #include +#ifndef CONFIG_ARCH_MULTIPLATFORM #include +#endif #include "core.h" #include "sh_pfc.h" -- cgit v1.2.3-58-ga151 From f39d8a72feb073c4ef6296f1d12cedf2ed572bfb Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 13 May 2014 13:37:49 +0200 Subject: pinctrl: sh-pfc: r8a73a4: Allow Multiplatform Build Add #ifdefs to allow r8a73a4 Multiplatform build. Needed to enable r8a73a4 Multiplatform support. Signed-off-by: Magnus Damm Signed-off-by: Laurent Pinchart Signed-off-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/pinctrl/sh-pfc') diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c index d39ca87353e4..ce9fb7aa8ba3 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c @@ -20,7 +20,10 @@ #include #include #include + +#ifndef CONFIG_ARCH_MULTIPLATFORM #include +#endif #include "core.h" #include "sh_pfc.h" -- cgit v1.2.3-58-ga151