From d4c34d09ab03e1e631fe195ddf35365a1273be9c Mon Sep 17 00:00:00 2001 From: Damien Le Moal Date: Tue, 12 Jan 2021 09:58:40 +0900 Subject: pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver Add the pinctrl-k210.c pinctrl driver for the Canaan Kendryte K210 field programmable IO array (FPIOA) to allow configuring the SoC pin functions. The K210 has 48 programmable pins which can take any of 256 possible functions. This patch is inspired from the k210 pinctrl driver for the u-boot project and contains many direct contributions from Sean Anderson. The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210 SOC FPIOA DRIVER" with myself listed as maintainer for this driver. Cc: Linus Walleij Cc: linux-gpio@vger.kernel.org Signed-off-by: Sean Anderson Signed-off-by: Damien Le Moal Reviewed-by: Linus Walleij Signed-off-by: Palmer Dabbelt --- drivers/pinctrl/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers/pinctrl/Kconfig') diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index d4b2f2e2ed75..cd437e3cc255 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -394,6 +394,19 @@ config PINCTRL_MICROCHIP_SGPIO connect control signals from SFP modules and to act as an LED controller. +config PINCTRL_K210 + bool "Pinctrl driver for the Canaan Kendryte K210 SoC" + depends on RISCV && SOC_CANAAN && OF + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + select GPIOLIB + select OF_GPIO + select REGMAP_MMIO + default SOC_CANAAN + help + Add support for the Canaan Kendryte K210 RISC-V SOC Field + Programmable IO Array (FPIOA) controller. + source "drivers/pinctrl/actions/Kconfig" source "drivers/pinctrl/aspeed/Kconfig" source "drivers/pinctrl/bcm/Kconfig" -- cgit v1.2.3-58-ga151