From cfd093bbb5fe84ec8c7bb069fe618159a8b601f5 Mon Sep 17 00:00:00 2001 From: Joachim Eastwood Date: Sun, 9 Aug 2015 00:02:41 +0200 Subject: phy: lpc18xx-usb-otg: fix clock order in phy init Changing the frequency of the USB clock must be done before the PLL is powered on (prepared). This matters when the USB clock is not setup by either boot ROM or boot loader. Reorder the function calls to adhere to the order noted in the user manual. Signed-off-by: Joachim Eastwood Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/phy-lpc18xx-usb-otg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/phy') diff --git a/drivers/phy/phy-lpc18xx-usb-otg.c b/drivers/phy/phy-lpc18xx-usb-otg.c index 3aa8e4de1b03..3b7a71eb5b7e 100644 --- a/drivers/phy/phy-lpc18xx-usb-otg.c +++ b/drivers/phy/phy-lpc18xx-usb-otg.c @@ -33,12 +33,12 @@ static int lpc18xx_usb_otg_phy_init(struct phy *phy) struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); int ret; - ret = clk_prepare(lpc->clk); + /* The PHY must be clocked at 480 MHz */ + ret = clk_set_rate(lpc->clk, 480000000); if (ret) return ret; - /* The PHY must be clocked at 480 MHz */ - return clk_set_rate(lpc->clk, 480000000); + return clk_prepare(lpc->clk); } static int lpc18xx_usb_otg_phy_exit(struct phy *phy) -- cgit v1.2.3-58-ga151