From 100542725f605d4399536eb162c036977996b5cc Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Mon, 21 Aug 2017 16:16:05 +0800 Subject: clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks Add gmac aclk and pclk clock gates. Signed-off-by: Elaine Zhang Reviewed-by: David Wu Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-rv1108.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/clk/rockchip') diff --git a/drivers/clk/rockchip/clk-rv1108.c b/drivers/clk/rockchip/clk-rv1108.c index d1065dd9f442..0e441ec21e90 100644 --- a/drivers/clk/rockchip/clk-rv1108.c +++ b/drivers/clk/rockchip/clk-rv1108.c @@ -763,6 +763,8 @@ static struct rockchip_clk_branch rv1108_clk_branches[] __initdata = { GATE(SCLK_MACPHY_RX, "sclk_macphy_rx", "sclk_macphy", 0, RV1108_CLKGATE_CON(4), 8, GFLAGS), GATE(SCLK_MAC_REF, "sclk_mac_ref", "sclk_macphy", 0, RV1108_CLKGATE_CON(4), 6, GFLAGS), GATE(SCLK_MAC_REFOUT, "sclk_mac_refout", "sclk_macphy", 0, RV1108_CLKGATE_CON(4), 7, GFLAGS), + GATE(ACLK_GMAC, "aclk_gmac", "aclk_periph", 0, RV1108_CLKGATE_CON(15), 4, GFLAGS), + GATE(PCLK_GMAC, "pclk_gmac", "pclk_periph", 0, RV1108_CLKGATE_CON(15), 5, GFLAGS), MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RV1108_SDMMC_CON0, 1), MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RV1108_SDMMC_CON1, 1), -- cgit v1.2.3-58-ga151