From b64f87c16f3c00fe593f632e1ee5798ba3f4f3f4 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Sat, 10 Nov 2007 09:17:49 +1100 Subject: [POWERPC] Avoid unpaired stwcx. on some processors The context switch code in the kernel issues a dummy stwcx. to clear the reservation, as recommended by the architecture. However, some processors can have issues if this stwcx to address A occurs while the reservation is already held to a different address B. To avoid this problem, the dummy stwcx. needs to be paired with a dummy lwarx to the same address. This adds the dummy lwarx, and creates a cpu feature bit to indicate which cpus are affected. Tested on mpc8641_hpcn_defconfig in arch/powerpc; build tested in arch/ppc. Signed-off-by: Becky Bruce Signed-off-by: Paul Mackerras --- arch/ppc/kernel/entry.S | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/ppc') diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S index b19bfef2034d..59e77eb63338 100644 --- a/arch/ppc/kernel/entry.S +++ b/arch/ppc/kernel/entry.S @@ -251,6 +251,9 @@ syscall_exit_cont: bne- 2f 1: #endif /* CONFIG_44x */ +BEGIN_FTR_SECTION + lwarx r7,0,r1 +END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) stwcx. r0,0,r1 /* to clear the reservation */ lwz r4,_LINK(r1) lwz r5,_CCR(r1) @@ -713,6 +716,9 @@ restore: mtctr r11 PPC405_ERR77(0,r1) +BEGIN_FTR_SECTION + lwarx r11,0,r1 +END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) stwcx. r0,0,r1 /* to clear the reservation */ #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) -- cgit v1.2.3-58-ga151