From 3a0d30bcdfa73bd865f29899eb4bf29b58c4f54a Mon Sep 17 00:00:00 2001 From: Ajay Kumar Gupta Date: Tue, 19 Oct 2010 10:08:11 +0300 Subject: USB: AM35x: Add musb support AM35x has musb interface (version 1.8) and uses CPPI41 DMA engine. It has USB phy built inside the IP itself. Signed-off-by: Ajay Kumar Gupta Acked-by: Tony Lindgren Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-omap@vger.kernel.org Signed-off-by: Felipe Balbi Signed-off-by: Greg Kroah-Hartman --- arch/arm/mach-omap2/board-am3517evm.c | 30 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/usb-musb.c | 4 ++++ arch/arm/plat-omap/include/plat/usb.h | 21 +++++++++++++++++++++ 3 files changed, 55 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 4d0f58592864..9ac9de6bb970 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -375,6 +375,31 @@ static void __init am3517_evm_init_irq(void) omap_gpio_init(); } +static struct omap_musb_board_data musb_board_data = { + .interface_type = MUSB_INTERFACE_ULPI, + .mode = MUSB_OTG, + .power = 500, +}; + +static __init void am3517_evm_musb_init(void) +{ + u32 devconf2; + + /* + * Set up USB clock/mode in the DEVCONF2 register. + */ + devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); + + /* USB2.0 PHY reference clock is 13 MHz */ + devconf2 &= ~(CONF2_REFFREQ | CONF2_OTGMODE | CONF2_PHY_GPIOMODE); + devconf2 |= CONF2_REFFREQ_13MHZ | CONF2_SESENDEN | CONF2_VBDTCTEN + | CONF2_DATPOL; + + omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); + + usb_musb_init(&musb_board_data); +} + static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ @@ -393,6 +418,8 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { + /* USB OTG DRVVBUS offset = 0x212 */ + OMAP3_MUX(SAD2D_MCAD23, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), { .reg_offset = OMAP_MUX_TERMINATOR }, }; #else @@ -459,6 +486,9 @@ static void __init am3517_evm_init(void) ARRAY_SIZE(am3517evm_i2c1_boardinfo)); /*Ethernet*/ am3517_evm_ethernet_init(&am3517_evm_emac_pdata); + + /* MUSB */ + am3517_evm_musb_init(); } MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 33a5cde1c227..72605584bfff 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -28,6 +28,7 @@ #include #include +#include #include #ifdef CONFIG_USB_MUSB_SOC @@ -89,6 +90,9 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data) { if (cpu_is_omap243x()) { musb_resources[0].start = OMAP243X_HS_BASE; + } else if (cpu_is_omap3517() || cpu_is_omap3505()) { + musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE; + musb_resources[1].start = INT_35XX_USBOTG_IRQ; } else if (cpu_is_omap34xx()) { musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE; } else if (cpu_is_omap44xx()) { diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index 2a9427c8cc48..9feddacfe850 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h @@ -218,6 +218,27 @@ static inline omap2_usbfs_init(struct omap_usb_config *pdata) # define USBT2TLL5PI (1 << 17) # define USB0PUENACTLOI (1 << 16) # define USBSTANDBYCTRL (1 << 15) +/* AM35x */ +/* USB 2.0 PHY Control */ +#define CONF2_PHY_GPIOMODE (1 << 23) +#define CONF2_OTGMODE (3 << 14) +#define CONF2_NO_OVERRIDE (0 << 14) +#define CONF2_FORCE_HOST (1 << 14) +#define CONF2_FORCE_DEVICE (2 << 14) +#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14) +#define CONF2_SESENDEN (1 << 13) +#define CONF2_VBDTCTEN (1 << 12) +#define CONF2_REFFREQ_24MHZ (2 << 8) +#define CONF2_REFFREQ_26MHZ (7 << 8) +#define CONF2_REFFREQ_13MHZ (6 << 8) +#define CONF2_REFFREQ (0xf << 8) +#define CONF2_PHYCLKGD (1 << 7) +#define CONF2_VBUSSENSE (1 << 6) +#define CONF2_PHY_PLLON (1 << 5) +#define CONF2_RESET (1 << 4) +#define CONF2_PHYPWRDN (1 << 3) +#define CONF2_OTGPWRDN (1 << 2) +#define CONF2_DATPOL (1 << 1) #if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) u32 omap1_usb0_init(unsigned nwires, unsigned is_device); -- cgit v1.2.3-58-ga151 From 69cb1ec4ce4da4bc4c07bb09c4c98b3e25d99fb1 Mon Sep 17 00:00:00 2001 From: Eric Bénard Date: Fri, 15 Oct 2010 14:30:58 +0200 Subject: mxc_udc: add workaround for ENGcm09152 for i.MX35 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit this patch gives the possibility to workaround bug ENGcm09152 on i.MX35 when the hardware workaround is also implemented on the board. It covers the workaround described on page 25 of the following Errata : http://cache.freescale.com/files/dsp/doc/errata/IMX35CE.pdf Signed-off-by: Eric Bénard Signed-off-by: Greg Kroah-Hartman --- arch/arm/mach-mx3/mach-cpuimx35.c | 1 + drivers/usb/gadget/fsl_mxc_udc.c | 15 +++++++++++++++ include/linux/fsl_devices.h | 3 +++ 3 files changed, 19 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c index 2a4f8b781ba4..4d161b3fca65 100644 --- a/arch/arm/mach-mx3/mach-cpuimx35.c +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -155,6 +155,7 @@ static struct mxc_usbh_platform_data usbh1_pdata = { static struct fsl_usb2_platform_data otg_device_pdata = { .operating_mode = FSL_USB2_DR_DEVICE, .phy_mode = FSL_USB2_PHY_UTMI, + .workaround = FLS_USB2_WORKAROUND_ENGCM09152, }; static int otg_mode_host; diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c index eafa6d2c5ed7..5bdbfe619853 100644 --- a/drivers/usb/gadget/fsl_mxc_udc.c +++ b/drivers/usb/gadget/fsl_mxc_udc.c @@ -22,6 +22,10 @@ static struct clk *mxc_ahb_clk; static struct clk *mxc_usb_clk; +/* workaround ENGcm09152 for i.MX35 */ +#define USBPHYCTRL_OTGBASE_OFFSET 0x608 +#define USBPHYCTRL_EVDO (1 << 23) + int fsl_udc_clk_init(struct platform_device *pdev) { struct fsl_usb2_platform_data *pdata; @@ -84,6 +88,17 @@ eenahb: void fsl_udc_clk_finalize(struct platform_device *pdev) { struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; +#if defined(CONFIG_ARCH_MX35) + unsigned int v; + + /* workaround ENGcm09152 for i.MX35 */ + if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) { + v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR + + USBPHYCTRL_OTGBASE_OFFSET)); + writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR + + USBPHYCTRL_OTGBASE_OFFSET)); + } +#endif /* ULPI transceivers don't need usbpll */ if (pdata->phy_mode == FSL_USB2_PHY_ULPI) { diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index d5f9a7431bd0..4eb56ed75fbc 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -66,6 +66,7 @@ struct fsl_usb2_platform_data { enum fsl_usb2_operating_modes operating_mode; enum fsl_usb2_phy_modes phy_mode; unsigned int port_enables; + unsigned int workaround; int (*init)(struct platform_device *); void (*exit)(struct platform_device *); @@ -84,6 +85,8 @@ struct fsl_usb2_platform_data { #define FSL_USB2_PORT0_ENABLED 0x00000001 #define FSL_USB2_PORT1_ENABLED 0x00000002 +#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0) + struct spi_device; struct fsl_spi_platform_data { -- cgit v1.2.3-58-ga151