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path: root/tools/testing/cxl
AgeCommit message (Expand)Author
2022-05-19cxl/port: Reuse 'struct cxl_hdm' context for hdm initDan Williams
2022-05-19cxl/pci: Drop @info argument to cxl_hdm_decode_init()Dan Williams
2022-05-19cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams
2022-05-19cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams
2022-05-19cxl/pci: Move cxl_await_media_ready() to the coreDan Williams
2022-04-12cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()Dan Williams
2022-02-08tools/testing/cxl: Add a physical_node linkDan Williams
2022-02-08tools/testing/cxl: Enumerate mock decodersDan Williams
2022-02-08tools/testing/cxl: Mock one level of switchesDan Williams
2022-02-08tools/testing/cxl: Fix root port to host bridge assignmentDan Williams
2022-02-08tools/testing/cxl: Mock dvsec_ranges()Dan Williams
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky
2022-02-08cxl/memdev: Add numa_node attributeDan Williams
2022-02-08cxl/pci: Emit device serial numberDan Williams
2022-02-08cxl/pci: Implement wait for media activeBen Widawsky
2022-02-08cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams
2022-02-08cxl/core: Generalize dport enumeration in the coreDan Williams
2022-02-08cxl/port: Up-level cxl_add_dport() locking requirements to the callerDan Williams
2022-02-08cxl/pmem: Introduce a find_cxl_root() helperDan Williams
2022-02-08cxl/core/port: Rename bus.c to port.cDan Williams
2021-11-15cxl/test: Mock acpi_table_parse_cedt()Dan Williams
2021-11-15tools/testing/cxl: add mock output for the GET_HEALTH_INFO commandVishal Verma
2021-11-15cxl/memdev: Change cxl_mem to a more descriptive nameIra Weiny
2021-09-21tools/testing/cxl: Introduce a mock memory device + driverDan Williams
2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams