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clk_round_parent() was only ever used by AP4EVB, until commit
b24bd7e97b3784af ("ARM: shmobile: Remove AP4EVB board support").
The Common Clock Framework does not provide clk_round_parent(), hence
remove it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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On r-/sh-mobile SoCs MSTP clocks are used by the runtime PM to dynamically
enable and disable peripheral clocks. To make sure the clock has really
started we have to read back its status register until it confirms success.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch adds sh_clk_fsidiv_register() to share FSI-DIV clock code
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Simon Horman <horms@verge.net.au>
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This introduces a new flag for clocks that need to have their divisor
ratio set back to their initial mask at disable time to prevent
interactivity problems with the clock stop bit (presently div6 only).
With this in place it's possible to handle the corner case on top of the
div4 op without any particular need for leaving things split out.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This generalizes the div4 recalc routine for use by div6 and others, then
makes it the default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This plugs in a div_mask for the clock and sets it up for the existing
div6/4 cases. This will make it possible to support other div types, as
well as share more div6/4 infrastructure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This plugs in a generic clk_div_table, based on the div4 version. div6 is
then adopted to use it for encapsulating its div table, which permits us
to start div6/4 unification, as well as preparation for other div types.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The bulk of the MSTP users require 32-bit access, but this isn't the case
for some of the SH-2A parts, so add in some basic infrastructure to let
the CPU define its required access size in preparation.
Requested-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now when all clk_ops have been renamed it is
safe to rename clk_ops to sh_clk_ops.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Introduce sh_clk_ops in parallel with clk_ops.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add a "mapped_reg" member to struct clk and use that
to keep the ioremapped register based on enable_reg.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Some clocks can select its parent clock by CPG register.
But it might have been modified by boot-loader or something.
This patch removed fixed initial parent clock,
and setup it from their current register settings.
It works on div6 reparent clocks for now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that all of the named string association with clocks has been
migrated to clkdev lookups there's no meaningful named topology that can
be constructed for a debugfs tree view. Get rid of the left over bits,
and shrink struct clk a bit in the process.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This provides a clk_rate_mult_range_round() helper for use by some of the
CPG PLL ranged multipliers, following the same approach as used by the
div ranges.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently it's only legacy users that are using this clock op, guard it
with an ifdef to ensure that no new users start using it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that clk_set_rate_ex() is gone, there is also no way to get at rate
setting algo id, which is now also completely unused. Kill it off before
new clock ops start using it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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With the refactoring of the SH7722 clock framework some time ago this
abstraction has become unecessary. Kill it off before anyone else gets
the bright idea to start using it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Sometimes it is possible and reasonable to adjust the parent clock rate to
improve precision of the child clock, e.g., if the child clock has no siblings.
clk_round_parent() is a new addition to the SH clock-framework API, that
implements such an optimization for child clocks with divisors, taking all
integer values in a range.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds a new clk_rate_div_range_round() for implementing rate rounding
by divisor ranges. This can be used trivially by clocks that support
arbitrary ranged divisors without the need for rate table construction.
This should only be used by clocks that both have large divisor ranges in
addition to clocks that will never be arbitrarily scaled, as the lack of
a backing frequency table will prevent cpufreq from being able to do much
of anything with them.
Primarily intended for use as a ->recalc helper.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently the only assisted rate rounding is frequency table backed, but
there are cases where it's impractical to use a frequency table for
certain clocks (such as the FSIDIV case, which supports 65535 divisors),
and we wish to reuse the same rate rounding algorithm.
This breaks out the core of the rate rounding logic in to its own helper
routine and shuffles the frequency table logic around, switching to using
an iterator for the generic helper routine.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements support for ioremapping of register windows that
encapsulate clock control registers used by a struct clk, with
transparent sibling inheritance.
Root clocks at the top of a given topology often encapsulate the entire
register space of all of their sibling clocks, so this mapping can be
done once and handed down. A given clock enable/disable case maps out to
a single bit in a shared register, so this prevents creating multiple
overlapping mappings.
The mapping case breaks down in to a couple of different situations:
- Sibling clocks without a specific mapping.
- Root clocks without a specific mapping.
- Any of sibling/root clocks with a specific mapping.
Sibling clocks with no specified mapping will grovel up the clock chain
and install the root clock mapping unconditionally at registration time.
Root clocks without their own mappings have a dummy BSS-initialized
mapping inserted that is handed down the chain just like any other
mapping. This permits all of the sibling clock ops to read/write using
the mapping offsets without any special configuration, enabling them to
not care whether access ultimately goes through translatable or
untranslatable memory.
Any clock with its own mapping will have the window initialized at
registration time and be ready for use by its clock ops. Failure to
establish the mapping will prevent registration, so no additional sanity
checks are needed. Sibling clocks that double as parents for the moment
will not propagate their mapping down, but this is easily tunable if the
need arises.
All clock mappings are kref refcounted, with each instance of mapping
inheritance incrementing the refcount.
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Remove "name" and "id" from drivers/sh/ struct clk.
The struct clk members "name" and "id" are not used
now when matching is done through clkdev.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add support for reparenting of div6 clocks on SuperH and SH-Mobile SoCs.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Many system clocks can select a parent by writing a value to a specific field
in the configuration register. Add a list of parents and location and width of
the source selection field in the clock configuration register to struct clk to
assist in clk_set_parent() implementation.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the definitions have been consolidated in an alternate header,
update the template accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch is V2 of the SH clock framework move from
arch/sh/kernel/cpu/clock.c to drivers/sh/clk.c. All
code except the following functions are moved:
clk_init(), clk_get() and clk_put().
The init function is still kept in clock.c since it
depends on the SH-specific machvec implementation.
The symbols clk_get() and clk_put() already exist in
the common ARM clkdev code, those symbols are left in
the SH tree to avoid duplicating them for SH-Mobile ARM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch is V2 of the clock framework move from
arch/sh/include/asm/clock.h to include/linux/sh_clk.h
and updates the include paths for files that will be
shared between SH and SH-Mobile ARM.
The file asm/clock.h is still kept in this version,
this to depend on as few files as possible at this
point. We keep SH specific stuff in there.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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