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2016-05-17Merge branch 'topic/xilinx' into for-linusVinod Koul
2016-05-12dmaengine: vdma: Add Support for Xilinx AXI Central Direct Memory Access EngineKedareswara rao Appana
This patch adds support for the AXI Central Direct Memory Access (AXI CDMA) core to the existing vdma driver, AXI CDMA is a soft Xilinx IP core that provides high-bandwidth Direct Memory Access(DMA) between a memory-mapped source address and a memory-mapped destination address. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-12dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access EngineKedareswara rao Appana
This patch adds support for the AXI Direct Memory Access (AXI DMA) core in the existing vdma driver, AXI DMA Core is a soft Xilinx IP core that provides high-bandwidth direct memory access between memory and AXI4-Stream type target peripherals. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-02dmaengine: dw: pass platform data via struct dw_dma_chipAndy Shevchenko
We pass struct dw_dma_chip to dw_dma_probe() anyway, thus we may use it to pass a platform data as well. While here, constify the source of the platform data. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-10-17dmaengine: hsu: remove platform dataHeikki Krogerus
There are no platforms where it's not possible to calculate the number of channels based on IO space length, and since that is the only purpose for struct hsu_dma_platform_data, removing it. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-17dmaengine: hsu: introduce stubs for the exported functionsHeikki Krogerus
This allows UART drivers to register HSU DMA Engine without being forced to use ifdefs. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-26dmaengine: pxa: add pxa dmaengine driverRobert Jarzmik
This is a new driver for pxa SoCs, which is also compatible with the former mmp_pdma. The rationale behind a new driver (as opposed to incremental patching) was : - the new driver relies on virt-dma, which obsoletes all the internal structures of mmp_pdma (sw_desc, hw_desc, ...), and by consequence all the functions - mmp_pdma allocates dma coherent descriptors containing not only hardware descriptors but linked list information The new driver only puts the dma hardware descriptors (ie. 4 u32) into the dma pool allocated memory. This changes completely the way descriptors are handled - the architecture behind the interrupt/tasklet management was rewritten to be more conforming to virt-dma - the buffers alignment is handled differently The former driver assumed that the DMA channel stopped between each descriptor. The new one chains descriptors to let the channel running. This is a necessary guarantee for real-time high bandwidth usecases such as video capture on "old" architectures such as pxa. - hot chaining / cold chaining / no chaining Whenever possible, submitting a descriptor "hot chains" it to a running channel. There is still no guarantee that the descriptor will be issued, as the channel might be stopped just before the descriptor is submitted. Yet this allows to submit several video buffers, and resubmit a buffer while another is under handling. As before, dma_async_issue_pending() is the only guarantee to have all the buffers issued. When an alignment issue is detected (ie. one address in a descriptor is not a multiple of 8), if the already running channel is in "aligned mode", the channel will stop, and restarted in "misaligned mode" to finished the issued list. - descriptors reusing A submitted, issued and completed descriptor can be reused, ie resubmitted if it was prepared with the proper flag (DMA_PREP_ACK). Only a channel resources release will in this case release that buffer. This allows a rolling ring of buffers to be reused, where there are several thousands of hardware descriptors used (video buffer for example). Additionally, a set of more casual features is introduced : - debugging traces - lockless way to know if a descriptor is terminated or not The driver was tested on zylonite board (pxa3xx) and mioa701 (pxa27x), with dmatest, pxa_camera and pxamci. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-04-24Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds
Pull slave-dmaengine updates from Vinod Koul: - new drivers for: - Ingenic JZ4780 controller - APM X-Gene controller - Freescale RaidEngine device - Renesas USB Controller - remove device_alloc_chan_resources dummy handlers - sh driver cleanups for peri peri and related emmc and asoc patches as well - fixes and enhancements spread over the drivers * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (59 commits) dmaengine: dw: don't prompt for DW_DMAC_CORE dmaengine: shdmac: avoid unused variable warnings dmaengine: fix platform_no_drv_owner.cocci warnings dmaengine: pch_dma: fix memory leak on failure path in pch_dma_probe() dmaengine: at_xdmac: unlock spin lock before return dmaengine: xgene: devm_ioremap() returns NULL on error dmaengine: xgene: buffer overflow in xgene_dma_init_channels() dmaengine: usb-dmac: Fix dereferencing freed memory 'desc' dmaengine: sa11x0: report slave capabilities to upper layers dmaengine: vdma: Fix compilation warnings dmaengine: fsl_raid: statify fsl_re_chan_probe dmaengine: Driver support for FSL RaidEngine device. dmaengine: xgene_dma_init_ring_mngr() can be static Documentation: dma: Add documentation for the APM X-Gene SoC DMA device DTS binding arm64: dts: Add APM X-Gene SoC DMA device and DMA clock DTS nodes dmaengine: Add support for APM X-Gene SoC DMA engine driver dmaengine: usb-dmac: Add Renesas USB DMA Controller (USB-DMAC) driver dmaengine: renesas,usb-dmac: Add device tree bindings documentation dmaengine: edma: fixed wrongly initialized data parameter to the edma callback dmaengine: ste_dma40: fix implicit conversion ...
2015-03-17dmaengine: xilinx-dma: move header file to common locationKedareswara rao Appana
This patch moves the xilinx_dma.h header file to the include/linux/dma. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-07dmaengine: append hsu DMA driverAndy Shevchenko
The HSU DMA is developed to support High Speed UART controllers found in particular on Intel MID platforms such as Intel Medfield. The existing implementation is tighten to the drivers/tty/serial/mfd.c driver and has a lot of disadvantages. Besides that we would like to get rid of the old HS UART driver in regarding to extending the 8250 which supports generic DMAEngine API. That's why the current driver has been developed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-15dmaengine: dw: export probe()/remove() and Co to usersAndy Shevchenko
The driver library functions can be used directly by the compound devices such as ADSP or serial driver where DesignWare DMA IP is privately attached to the main hardware. Instead of creating a new platform device leaf they may call dw_dma_probe() with given struct dw_dma_chip directly and make sure that the main device is DMA capable. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-10-15dmaengine: dw: split dma-dw.h to platform and private partsAndy Shevchenko
The introduced include/linux/dma/dw.h is going to contain the private extensions and structures which are shared for dw_dmac users in the kernel. Meanwhile include/linux/platform_data/dma-dw.h keeps only platform related data types and definitions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-14dma: mmp_pdma: add filter functionDaniel Mack
PXA peripherals need to obtain specific DMA request ids which will eventually be stored in the DRCMR register. Currently, clients are expected to store that number inside the slave config block as slave_id, which is unfortunately incompatible with the way DMA resources are handled in DT environments. This patch adds a filter function which stores the filter parameter passed in by of-dma.c into the channel's drcmr register. For backward compatability, cfg->slave_id is still used if set to a non-zero value. Signed-off-by: Daniel Mack <zonque@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2012-10-15dma: ipu: rename mach/ipu.h to include/linux/dma/ipu-dma.hShawn Guo
The header ipu.h really belongs to dma subsystem rather than imx platform. Rename it to ipu-dma.h and put it into include/linux/dma/. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: linux-media@vger.kernel.org Cc: linux-fbdev@vger.kernel.org