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AgeCommit message (Expand)Author
2014-01-15clk: composite: pass mux_hw into determine_rateMike Turquette
2014-01-14Merge branch 'clk-next-shmobile' into clk-nextMike Turquette
2014-01-14clk: shmobile: Fix MSTP clock array initializationValentine Barshak
2014-01-14clk: shmobile: Fix MSTP clock indexValentine Barshak
2014-01-08Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette
2014-01-08clk: max77686: Register OF clock providerTomasz Figa
2014-01-08clk: max77686: Refactor driver data handlingTomasz Figa
2014-01-08clk: max77686: Fix clean-up in error and remove pathsTomasz Figa
2014-01-08clk: max77686: Make max77686_clk_register() return struct clk *Tomasz Figa
2014-01-08clk: max77686: Refactor successful exit of probe functionTomasz Figa
2014-01-08clk: max77686: Provide .recalc_rate() operationTomasz Figa
2014-01-08clk: max77686: Correct callback used for checking clock statusTomasz Figa
2014-01-08clk: exynos-audss: add support for Exynos 5420Andrew Bresticker
2014-01-08clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker
2014-01-08clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker
2014-01-08clk: exynos-audss: convert to platform deviceAndrew Bresticker
2014-01-08clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda
2014-01-08clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda
2014-01-08clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda
2014-01-08clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda
2014-01-08clk: exynos5250: register APLL rate tableAndrew Bresticker
2013-12-31Merge branch 'clk-next-unregister' into clk-nextMike Turquette
2013-12-30Merge branch 'for_3.14/keystone-clk' of git://git.kernel.org/pub/scm/linux/ke...Mike Turquette
2013-12-30clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa
2013-12-30clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa
2013-12-30clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa
2013-12-30clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa
2013-12-30clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa
2013-12-30clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa
2013-12-30Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa
2013-12-30clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski
2013-12-30clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan
2013-12-30clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan
2013-12-30clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan
2013-12-30clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker
2013-12-30clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim
2013-12-29Merge tag 'sunxi-clk-3.14-for-mike' of https://bitbucket.org/emiliolopez/linu...Mike Turquette
2013-12-28clk: sunxi: Allwinner A20 output clock supportChen-Yu Tsai
2013-12-28clk: sunxi: support better factor DT nodesEmilio López
2013-12-28clk: sunxi: mod0 supportEmilio López
2013-12-28clk: sunxi: add PLL5 and PLL6 supportEmilio López
2013-12-28clk: sunxi: make factors_clk_setup return the clock it registersEmilio López
2013-12-28clk: sunxi: add gating support to PLL1Emilio López
2013-12-28clk: sunxi: clean the magic number of mux parentsEmilio López
2013-12-28clk: sunxi: register factors clocks behind compositeEmilio López
2013-12-27clk: remove CONFIG_COMMON_CLK_DEBUGMike Turquette
2013-12-26clk: max77686: Remove redundant breakSachin Kamat
2013-12-22clk: add accuracy support for fixed clockBoris BREZILLON