summaryrefslogtreecommitdiff
path: root/drivers/net
AgeCommit message (Collapse)Author
2014-06-12via-rhine: fix full-duplex with autoneg disableFrançois Cachereul
With some specific configuration (VT6105M on Soekris 5510 and depending on the device at the other end), fragmented packets were not transmitted when forcing 100 full-duplex with autoneg disable. This fix now write full-duplex chips register when forcing full or half-duplex not only when autoneg is enable. Signed-off-by: François Cachereul <f.cachereul@alphalink.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-12bnx2x: Enlarge the dorq threshold for VFsAriel Elior
A malicious VF might try to starve the other VFs & PF by creating contineous doorbell floods. In order to negate this, HW has a threshold of doorbells per client, which will stop the client doorbells from arriving if crossed. The threshold currently configured for VFs is too low - under extreme traffic scenarios, it's possible for a VF to reach the threshold and thus for its fastpath to stop working. Signed-off-by: Ariel Elior <ariel.elior@qlogic.com> Signed-off-by: Yuval Mintz <yuval.mintz@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-12bnx2x: Check for UNDI in uncommon branchYuval Mintz
If L2FW utilized by the UNDI driver has the same version number as that of the regular FW, a driver loading after UNDI and receiving an uncommon answer from management will mistakenly assume the loaded FW matches its own requirement and try to exist the flow via FLR. Signed-off-by: Yuval Mintz <yuval.mintz@qlogic.com> Signed-off-by: Ariel Elior <ariel.elior@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-12bnx2x: Fix 1G-baseT linkYaniv Rosner
Set the phy access mode even in case of link-flap avoidance. Signed-off-by: Yaniv Rosner <yaniv.rosner@qlogic.com> Signed-off-by: Yuval Mintz <yuval.mintz@qlogic.com> Signed-off-by: Ariel Elior <ariel.elior@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-12bnx2x: Fix link for KR with swapped polarity laneYaniv Rosner
This avoids clearing the RX polarity setting in KR mode when polarity lane is swapped, as otherwise this will result in failed link. Signed-off-by: Yaniv Rosner <yaniv.rosner@qlogic.com> Signed-off-by: Yuval Mintz <yuval.mintz@qlogic.com> Signed-off-by: Ariel Elior <ariel.elior@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: net/core/rtnetlink.c net/core/skbuff.c Both conflicts were very simple overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net/fsl: xgmac_mdio is dependent on OF_MDIOAndy Fleming
Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net/fsl: Make xgmac_mdio read error message usefulShruti Kanetkar
Print the device address, the register number and the PHY ID for which the MDIO read operation failed Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: Add skb_gro_postpull_rcsum to udp and vxlanTom Herbert
Need to gro_postpull_rcsum for GRO to work with checksum complete. Signed-off-by: Tom Herbert <therbert@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11qlcnic: Update version to 5.3.60Shahed Shaikh
Signed-off-by: Shahed Shaikh <shahed.shaikh@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11qlcnic: Optimize ring count validationsShahed Shaikh
- Check interrupt mode at the start of qlcnic_set_channels(). - Do not validate ring count if they are not going to change. Signed-off-by: Shahed Shaikh <shahed.shaikh@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11qlcnic: Pre-allocate DMA buffer used for minidump collectionShahed Shaikh
Pre-allocate the physically contiguous DMA buffer used for minidump collection at driver load time, rather than at run time, to minimize allocation failures. Driver will allocate the buffer at load time if PEX DMA support capability is indicated by the adapter. Signed-off-by: Shahed Shaikh <shahed.shaikh@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11drivers: net: davinci_cpdma: double free on errorDan Carpenter
We recently change the kzalloc() to devm_kzalloc() so freeing "ctlr" here could lead to a double free. Fixes: e194312854ed ('drivers: net: davinci_cpdma: Convert kzalloc() to devm_kzalloc().') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11amd-xgbe: unwind on error in xgbe_mdio_register()Dan Carpenter
There is a typo here so we return directly instead of unwinding. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11mrf24j40: add device managed APIsVarka Bhadram
adds the device managed APIs so that no need worry about freeing the resources. Signed-off-by: Varka Bhadram <varkab@cdac.in> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11sfc: PIO:Restrict to 64bit arch and use 64-bit writes.Jon Cooper
Fixes:ee45fd92c739 ("sfc: Use TX PIO for sufficiently small packets") The linux net driver uses memcpy_toio() in order to copy into the PIO buffers. Even on a 64bit machine this causes 32bit accesses to a write- combined memory region. There are hardware limitations that mean that only 64bit naturally aligned accesses are safe in all cases. Due to being write-combined memory region two 32bit accesses may be coalesced to form a 64bit non 64bit aligned access. Solution was to open-code the memory copy routines using pointers and to only enable PIO for x86_64 machines. Not tested on platforms other than x86_64 because this patch disables the PIO feature on other platforms. Compile-tested on x86 to ensure that works. The WARN_ON_ONCE() code in the previous version of this patch has been moved into the internal sfc debug driver as the assertion was unnecessary in the upstream kernel code. This bug fix applies to v3.13 and v3.14 stable branches. Signed-off-by: Shradha Shah <sshah@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: xen-netback: include linux/vmalloc.h againArnd Bergmann
commit e9ce7cb6b107 ("xen-netback: Factor queue-specific data into queue struct") added a use of vzalloc/vfree to interface.c, but removed the #include <linux/vmalloc.h> statement at the same time, which causes this build error: drivers/net/xen-netback/interface.c: In function 'xenvif_free': drivers/net/xen-netback/interface.c:754:2: error: implicit declaration of function 'vfree' [-Werror=implicit-function-declaration] vfree(vif->queues); ^ cc1: some warnings being treated as errors Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Wei Liu <wei.liu2@citrix.com> Cc: Andrew J. Bennieston <andrew.bennieston@citrix.com> Acked-by: Wei Liu <wei.liu2@citrix.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: phy: realtek: register/unregister multiple drivers properlyJongsung Kim
Using phy_drivers_register/_unregister functions is proper way to handle multiple PHY drivers registration. For Realtek PHY drivers module, it fixes incomplete current error-handlings up and adds missed unregistration for the RTL8201CP driver. Signed-off-by: Jongsung Kim <neidhard.kim@lge.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: sh_eth: Fix timing of RACT setting in sh_eth_rx()Yoshihiro Shimoda
This patch fixes an issue that we cannot use nfs rootfs correctly on r8a7790 when the command below runs on a host PC. $ sudo ping -f -l 8 $BOARD_IP_ADDR Since the driver sets the RACT to 1 in the first while loop of sh_eth_rx(), the controller accepts a next frame into the next RX descriptor during the while loop. But, in the first while loop doesn't allocate a next skb. So, this patch removes the RACT setting in the first while loop of sh_eth_rx(). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: sh_eth: Fix receive packet "exceeded" condition in sh_eth_rx()Yoshihiro Shimoda
This patch fixes the packet "exceeded" condition in sh_eth_rx() when RACT in an RX descriptor is not set and the "quota" is 0. Otherwise, kernel panic happens because the "&n->poll_list" is deleted twice in sh_eth_poll() which calls napi_complete() and net_rx_action(). Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: sxgbe: remove duplicate SXGBE_CORE_L34_ADDCTL_REG defineDan Carpenter
The SXGBE_CORE_L34_ADDCTL_REG define is cut and pasted twice so we can delete the second instance. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11qlcnic: remove duplicate QLC_83XX_GET_LSO_CAPABILITY defineDan Carpenter
The QLC_83XX_GET_LSO_CAPABILITY define is cut and pasted twice so we can delete the second instance. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Sony Chacko <sony.chacko@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net/mlx4_en: Use affinity hintYuval Atias
The “affinity hint” mechanism is used by the user space daemon, irqbalancer, to indicate a preferred CPU mask for irqs. Irqbalancer can use this hint to balance the irqs between the cpus indicated by the mask. We wish the HCA to preferentially map the IRQs it uses to numa cores close to it. To accomplish this, we use cpumask_set_cpu_local_first(), that sets the affinity hint according the following policy: First it maps IRQs to “close” numa cores. If these are exhausted, the remaining IRQs are mapped to “far” numa cores. Signed-off-by: Yuval Atias <yuvala@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11Merge branch 'master' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates 2014-06-11 This series contains updates to igb, i40e and i40evf. Todd makes a change to igb to un-hide invariant returns by getting rid of the E1000_SUCCESS define and converting those returns to return 0. Jacob separates the hardware logic from the set function, so that we can re-use it during a ptp_reset in igb. This enables the reset to return functionality to the last know timestamp mode, rather than resetting the value. Ashish implements context flags for headwb and headwb_addr so that we do not have to keep them always enabled. Shannon updates the admin queue API for the new firmware, which adds set_pf_content, nvm_config_read/write, replaces set_phy_reset with set_phy_debug and removes nvm_read/write_reg_se. Cleans up the driver to use the stored base_queue value since there is no need to read the PCI register for the PF's base queue on every single transmit queue enable and disable as we already have the value stored from reading the capability features at startup. Anjali changes the notion of source and destination for FD_SB in ethtool to align i40e with other drivers. Adds flow director statistics to the PF stats. Fixes a bug in ethtool for flow director drop packet filter where the drop action comes down as a ring_cookie value, so allow it as a special value that can be used to configure destination control. Mitch fixes the i40evf to keep the driver from going down when it is already in a down state. This prevents a CPU soft lock in napi_disable(). Also change the i40evf to check the admin queue error bits since the firmware can indicate any admin queue error states to the driver via some bits in the length registers. Neerav separates out the DCB capability and enabled flags because currently if the firmware reports DCB capability the driver enables I40E_FLAG_DCB_ENABLED flag. When this flag is enabled the driver inserts a tag when transmitting a packet from the port even if there are no DCB traffic classes configured at the port. So by adding the additional flag, I40E_FLAG_DCB_CAPABLE, that will be set when the DCB capability is present and the existing enabled flag will only be set if there are more than one traffic classes configured at the port. Greg fixes the i40e driver to not automatically accept tagged packets by default so that the system must request a VLAN tag packet filter to get packets with that tag. Greg also converts i40e to use the in-kernel ether_addr_copy() instead of mempcy(). Jesse removes the FTYPE field from the receive descriptor to match the hardware implementation. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11i40e/i40evf: Bump i40e to version 0.4.10 and i40evf to 0.9.34Catherine Sullivan
Bump versions. Change-ID: Ic4a84354955061ca18321b1e97c9c30fe1563b5c Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e: use stored base_queue valueShannon Nelson
No need to read the PCI register for the PF's base queue on every single Tx queue enable and disable as we already have the value stored from reading the capability features at startup. Change-ID: Ic02fb622757742f43cb8269369c3d972d4f66555 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e: Fix a bug in ethtool for FD drop packet filter actionAnjali Singhai Jain
A drop action comes down as a ring_cookie value, so allow it as a special value that can be used to configure destination control. Also fix the output to filter read command accordingly. Change-ID: I9956723cee42f3194885403317dd21ed4a151144 Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e/i40evf: Add Flow director stats to PF statsAnjali Singhai Jain
Add members to stat struct to keep track of Flow director ATR and SideBand filter packet matches. Change-ID: Ibbb31a53c7adcc2bb96991dd80565442a2f2513c Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e/i40evf: remove FTYPEJesse Brandeburg
This change drops the FTYPE field from the Rx descriptor, to match the hardware implementation. Change-ID: I66d31d2b43861da45e8ace4fb03df033abe88bab Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40evf: check admin queue error bitsMitch Williams
FW can indicate any admin queue error states to the driver via some bits in the length registers. Each time we process an admin queue message, check these bits and log any errors we find. Since the VF really can't do much, we just print the message and depend on the PF driver to clear things up on our behalf. Change-ID: I92bc6c53ce3b4400544e0ca19c5de2d27490bd0d Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e/i40evf: User ether_addr_copy instead of memcpyGreg Rose
Linux gives us a function to copy Ethernet MAC addresses, let's use it. Change-ID: I0c861900029ca5ea65a53ca39565852fb633f6fd Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e: Do not accept tagged packets by defaultGreg Rose
Remove the filter created by the firmware with the default MAC address it reads out of the NVM storage and a promiscuous VLAN tag and replace it with a filter that will not accept tagged packets by default. The system must request a VLAN tag packet filter to get packets with that tag. Change-ID: I119e6c3603a039bd68282ba31bf26f33a575490a Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e: Separate out DCB capability and enabled flagsNeerav Parikh
Currently if the firmware reports DCB capability the driver enables I40E_FLAG_DCB_ENABLED flag. When this flag is enabled the driver inserts a tag when transmitting a packet from the port even if there are no DCB traffic classes configured at the port. This patch adds a new flag I40E_FLAG_DCB_CAPABLE that will be set when the DCB capability is present and the existing flag I40E_FLAG_DCB_ENABLED will be set only if there are more than one traffic classes configured at the port. Change-ID: I24ccbf53ef293db2eba80c8a9772acf729795bd5 Signed-off-by: Neerav Parikh <neerav.parikh@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40evf: don't go further downMitch Williams
If the device is down, there's no place to go but up, so don't try to go down even more. This prevents a CPU soft lock in napi_disable(). Change-ID: I8b058b9ee974dfa01c212fae2597f4f54b333314 Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e: Change the notion of src and dst for FD_SB in ethtoolAnjali Singhai Jain
In XL710 devices we program FD filter's fields from Tx perspective of the flow. However the user interface exposed in ethtool should be compliant with the previous generation of drivers where a filter src and dst field are from the RX perspective. This patch changes the ethtool interface in this regard to match the other drivers. Change-ID: Iec6ccddd87357c4fb53ccf33aa0fae699faf70cf Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e/i40evf: AdminQ API update for new FWShannon Nelson
Add set_pf_context, replace set_phy_reset with set_phy_debug, add nvm_config_read/write, remove nvm_read/write_reg_se and add some PHY types. With these changes we bump the API version to 1.2. Change-ID: I4dc3aec175c2316f66fc9b726b3f7d594699d84e Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11i40e/i40evf: set headwb Tx context flags and use themAshish Shah
Set appropriate fields in Tx queue configuration virtchnl message to pf to enable headwb and setup headwb addr. Then use that info from the VF to set headwb and headwb_addr instead of always enabling them. Change-ID: I7d393d1b2b07f0f3355b3a4f7c2d3c6ee3b0d622 Signed-off-by: Ashish Shah <ashish.n.shah@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11igb: separate hardware setting from the set_ts_config ioctlJacob Keller
This patch separates the hardware logic from the set function, so that we can re-use it during a ptp_reset. This enables the reset to return functionality to the last known timestamp mode, rather than resetting the value. We initialize the mode to off during the ptp_init cycle. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11igb: unhide invariant returnsTodd Fujinaka
Return a 0 directly rather than a constant. Reported-by: Peter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-06-11amd-xgbe: Rename MAX_DMA_CHANNELS to avoid powerpc conflictLendacky, Thomas
MAX_DMA_CHANNELS is defined in asm/scatterlist.h of the powerpc architecture. Rename this #define in xgbe.h to avoid the redefined warning issued during compilation. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11farsync: Fix confusion about DMA address and buffer offset typesBen Hutchings
Use dma_addr_t for DMA address parameters and u32 for shared memory offset parameters. Do not assume that dma_addr_t is the same as unsigned long; it will not be in PAE configurations. Truncate DMA addresses to 32 bits when printing them. This is OK because the DMA mask for this device is 32-bit (per default). Also rename the DMA address parameters from 'skb' to 'dma'. Compile-tested only. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net/mlx4_core: Keep only one driver entry release mlx4_privWei Yang
Following commit befdf89 "net/mlx4_core: Preserve pci_dev_data after __mlx4_remove_one()", there are two mlx4 pci callbacks which will attempt to release the mlx4_priv object -- .shutdown and .remove. This leads to a use-after-free access to the already freed mlx4_priv instance and trigger a "Kernel access of bad area" crash when both .shutdown and .remove are called. During reboot or kexec, .shutdown is called, with the VFs probed to the host going through shutdown first and then the PF. Later, the PF will trigger VFs' .remove since VFs still have driver attached. Fix that by keeping only one driver entry which releases mlx4_priv. Fixes: befdf89 ('net/mlx4_core: Preserve pci_dev_data after __mlx4_remove_one()') CC: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net/mlx4_core: Fix SRIOV free-pool management when enforcing resource quotasJack Morgenstein
The Hypervisor driver tracks free slots and reserved slots at the global level and tracks allocated slots and guaranteed slots per VF. Guaranteed slots are treated as reserved by the driver, so the total reserved slots is the sum of all guaranteed slots over all the VFs. As VFs allocate resources, free (global) is decremented and allocated (per VF) is incremented for those resources. However, reserved (global) is never changed. This means that effectively, when a VF allocates a resource from its guaranteed pool, it is actually reducing that resource's free pool (since the global reserved count was not also reduced). The fix for this problem is the following: For each resource, as long as a VF's allocated count is <= its guaranteed number, when allocating for that VF, the reserved count (global) should be reduced by the allocation as well. When the global reserved count reaches zero, the remaining global free count is still accessible as the free pool for that resource. When the VF frees resources, the reverse happens: the global reserved count for a resource is incremented only once the VFs allocated number falls below its guaranteed number. This fix was developed by Rick Kready <kready@us.ibm.com> Reported-by: Rick Kready <kready@us.ibm.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: wimax: i2400m: control.c: Cleaning up conjunction always evaluates to falseRickard Strandqvist
Logical conjunction always evaluates to false: minor < 2 && minor > 1 I guess what you wanted is rather: minor > 2 || minor < 1 This was partly found using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11net: ethernet: toshiba: ps3_gelic_net.c: Cleaning up a check on a memory ↵Rickard Strandqvist
allocation A check on a memory allocation is checked incorrectly. This was partly found using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Acked-by: Geoff Levand <geoff@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-11amd-xgbe: fix unused variable compilation warning in phylib driverfrançois romieu
Fix following compilation warning: [...] CC drivers/net/phy/amd-xgbe-phy.o drivers/net/phy/amd-xgbe-phy.c:1353:30: warning: ‘amd_xgbe_phy_ids’ defined but not used [-Wunused-variable] static struct mdio_device_id amd_xgbe_phy_ids[] = { ^ Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-10cxgb4: Change default Interrupt Holdoff Packet Count ThresholdHariprasad Shenai
Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-10iw_cxgb4: don't truncate the recv window sizeHariprasad Shenai
Fixed a bug that shows up with recv window sizes that exceed the size of the RCV_BUFSIZ field in opt0 (>= 1024K). If the recv window exceeds this, then we specify the max possible in opt0, add add the rest in via a RX_DATA_ACK credits. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-10iw_cxgb4: Choose appropriate hw mtu index and ISS for iWARP connectionsHariprasad Shenai
Select the appropriate hw mtu index and initial sequence number to optimize hw memory performance. Add new cxgb4_best_aligned_mtu() which allows callers to provide enough information to be used to [possibly] select an MTU which will result in the TCP Data Segment Size (AKA Maximum Segment Size) to be an aligned value. If an RTR message exhange is required, then align the ISS to 8B - 1 + 4, so that after the SYN the send seqno will align on a 4B boundary. The RTR message exchange will leave the send seqno aligned on an 8B boundary. If an RTR is not required, then align the ISS to 8B - 1. The goal is to have the send seqno be 8B aligned when we send the first FPDU. Based on original work by Casey Leedom <leeedom@chelsio.com> and Steve Wise <swise@opengridcomputing.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-10iw_cxgb4: Allocate and use IQs specifically for indirect interruptsHariprasad Shenai
Currently indirect interrupts for RDMA CQs funnel through the LLD's RDMA RXQs, which also handle direct interrupts for offload CPLs during RDMA connection setup/teardown. The intended T4 usage model, however, is to have indirect interrupts flow through dedicated IQs. IE not to mix indirect interrupts with CPL messages in an IQ. This patch adds the concept of RDMA concentrator IQs, or CIQs, setup and maintained by the LLD and exported to iw_cxgb4 for use when creating CQs. RDMA CPLs will flow through the LLD's RDMA RXQs, and CQ interrupts flow through the CIQs. Design: cxgb4 creates and exports an array of CIQs for the RDMA ULD. These IQs are sized according to the max available CQs available at adapter init. In addition, these IQs don't need FL buffers since they only service indirect interrupts. One CIQ is setup per RX channel similar to the RDMA RXQs. iw_cxgb4 will utilize these CIQs based on the vector value passed into create_cq(). The num_comp_vectors advertised by iw_cxgb4 will be the number of CIQs configured, and thus the vector value will be the index into the array of CIQs. Based on original work by Steve Wise <swise@opengridcomputing.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>