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2023-01-23mtd: spinand: macronix: use scratch buffer for DMA operationDaniel Golle
The mx35lf1ge4ab_get_eccsr() function uses an SPI DMA operation to read the eccsr, hence the buffer should not be on stack. Since commit 380583227c0c7f ("spi: spi-mem: Add extra sanity checks on the op param") the kernel emmits a warning and blocks such operations. Use the scratch buffer to get eccsr instead of trying to directly read into a stack-allocated variable. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/Y8i85zM0u4XdM46z@makrotopia.org
2023-01-16ARM: s3c: remove s3c24xx specific hacksArnd Bergmann
A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or similar symbols that are no longer available with the platform gone, though the drivers themselves are still used on newer platforms, so remove these hacks. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-13mtd: rawnand: vf610_nfc: use regular comments for functionsRandy Dunlap
These comments are not quite in kernel-doc format and they don't need to be, so just use "/*" comment markers for them. This prevents these kernel-doc warnings: drivers/mtd/nand/raw/vf610_nfc.c:210: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Read accessor for internal SRAM buffer drivers/mtd/nand/raw/vf610_nfc.c:245: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Write accessor for internal SRAM buffer Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230113064004.24391-1-rdunlap@infradead.org
2023-01-13mtd: rawnand: Support for sequential cache readsJaimeLiao
Add support for sequential cache reads for controllers using the generic core helpers for their fast read/write helpers. Sequential reads may reduce the overhead when accessing physically continuous data by loading in cache the next page while the previous page gets sent out on the NAND bus. The ONFI specification provides the following additional commands to handle sequential cached reads: * 0x31 - READ CACHE SEQUENTIAL: Requires the NAND chip to load the next page into cache while keeping the current cache available for host reads. * 0x3F - READ CACHE END: Tells the NAND chip this is the end of the sequential cache read, the current cache shall remain accessible for the host but no more internal cache loading operation is required. On the bus, a multi page read operation is currently handled like this: 00 -- ADDR1 -- 30 -- WAIT_RDY (tR+tRR) -- DATA1_IN 00 -- ADDR2 -- 30 -- WAIT_RDY (tR+tRR) -- DATA2_IN 00 -- ADDR3 -- 30 -- WAIT_RDY (tR+tRR) -- DATA3_IN Sequential cached reads may instead be achieved with: 00 -- ADDR1 -- 30 -- WAIT_RDY (tR) -- \ 31 -- WAIT_RDY (tRCBSY+tRR) -- DATA1_IN \ 31 -- WAIT_RDY (tRCBSY+tRR) -- DATA2_IN \ 3F -- WAIT_RDY (tRCBSY+tRR) -- DATA3_IN Below are the read speed test results with regular reads and sequential cached reads, on NXP i.MX6 VAR-SOM-SOLO in mapping mode with a NAND chip characterized with the following timings: * tR: 20 µs * tRCBSY: 5 µs * tRR: 20 ns and the following geometry: * device size: 2 MiB * eraseblock size: 128 kiB * page size: 2 kiB ============= Normal read @ 33MHz ================= mtd_speedtest: eraseblock read speed is 15633 KiB/s mtd_speedtest: page read speed is 15515 KiB/s mtd_speedtest: 2 page read speed is 15398 KiB/s =================================================== ========= Sequential cache read @ 33MHz =========== mtd_speedtest: eraseblock read speed is 18285 KiB/s mtd_speedtest: page read speed is 15875 KiB/s mtd_speedtest: 2 page read speed is 16253 KiB/s =================================================== We observe an overall speed improvement of about 5% when reading 2 pages, up to 15% when reading an entire block. This is due to the ~14us gain on each additional page read (tR - (tRCBSY + tRR)). Co-developed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-4-miquel.raynal@bootlin.com
2023-01-13mtd: rawnand: Prepare the late addition of supported operation checksMiquel Raynal
Add an empty envelope just to show how to add additional checks for new operations. This is going to be used for sequential cached reads, which require the page size to be known (and the discovery to be over), hence the "late" designation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-3-miquel.raynal@bootlin.com
2023-01-13mtd: rawnand: Check the data only read pattern only onceMiquel Raynal
Instead of checking if a pattern is supported each time we need it, let's create a bitfield that only the core would be allowed to fill at startup time. The core and the individual drivers may then use it in order to check what operation they should use. This bitfield is supposed to grow over time. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-2-miquel.raynal@bootlin.com
2023-01-07mtd: remove tmio_nand driverArnd Bergmann
With the TMIO MFD drivers gone, the NAND support is also obsolete and can be removed. Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2023-01-07mtd: rawnand: pasemi: Don't use static data to track per-device stateUwe Kleine-König
Up to now the pasemi nand driver only supported a single device instance. However the check for that was racy because two parallel calls of pasemi_nand_probe() could pass the check if (pasemi_nand_mtd) return -ENODEV; before any of them assigns a non-NULL value to it. So rework the driver to make use of per-device driver data. As an intended side effect the driver can bind more than one device and also gets rid of the check if (!pasemi_nand_mtd) return 0; in the remove callback that could only ever trigger after the above race happened. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230102124051.1508424-1-u.kleine-koenig@pengutronix.de
2023-01-02mtd: dataflash: remove duplicate SPI ID tableArnd Bergmann
Building with -Werror=override-init reveals that two patches added the same device ID table to this driver: drivers/mtd/devices/mtd_dataflash.c:946:27: error: initialized field overwritten [-Werror=override-init] 946 | .id_table = dataflash_spi_ids, | ^~~~~~~~~~~~~~~~~ drivers/mtd/devices/mtd_dataflash.c:946:27: note: (near initialization for 'dataflash_driver.id_table') Remove one of the copies. Fixes: 27a030e87292 ("mtd: dataflash: Add device-tree SPI IDs") Fixes: ac4f83482afb ("mtd: dataflash: Add SPI ID table") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221215164736.1315815-1-arnd@kernel.org
2023-01-02mtd: rawnand: sunxi: Fix the size of the last OOB regionSamuel Holland
The previous code assigned to the wrong structure member. Fixes: c66811e6d350 ("mtd: nand: sunxi: switch to mtd_ooblayout_ops") Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-By: Dhruva Gole <d-gole@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-6-samuel@sholland.org
2023-01-02mtd: rawnand: sunxi: Remove an unnecessary checkSamuel Holland
Each chip is required to have a unique CS number ("reg" property) in the range 0-7, so there is no need to separately count the number of chips. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-4-samuel@sholland.org
2023-01-02mtd: rawnand: sunxi: Remove an unnecessary checkSamuel Holland
sunxi_nand->nsels cannot be zero, so the second check implies the first. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-3-samuel@sholland.org
2023-01-02mtd: rawnand: sunxi: Clean up chips after failed initSamuel Holland
If a chip fails to initialize, we need to clean up any chips that were already initialized/registered. Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-2-samuel@sholland.org
2023-01-02mtd: rawnand: marvell: add missing layoutsAviram Dali
A missing layouts were added to the driver to support NAND flashes with ECC layouts of 12 or 16 with page sized of 2048, 4096 or 8192. Usually theses are rare layouts, but in Marvell AC5 driver, the ECC level is set according to the spare area, so we may use these layouts more frequently. Signed-off-by: Aviram Dali <aviramd@marvell.com> Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221216162715.3230766-1-vadym.kochan@plvision.eu
2023-01-02mtd: cfi: allow building spi-intel standaloneArnd Bergmann
When MTD or MTD_CFI_GEOMETRY is disabled, the spi-intel driver fails to build, as it includes the shared CFI header: include/linux/mtd/cfi.h:62:2: error: #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. [-Werror=cpp] 62 | #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. linux/mtd/spi-nor.h does not actually need to include cfi.h, so remove the inclusion here to fix the warning. This uncovers a missing #include in spi-nor/core.c so add that there to prevent a different build issue. Fixes: e23e5a05d1fd ("mtd: spi-nor: intel-spi: Convert to SPI MEM") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Tokunori Ikegami <ikegami.t@gmail.com> Acked-by: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221220141352.1486360-1-arnd@kernel.org
2023-01-02mtd: parsers: scpart: fix __udivdi3 undefined on mipsMikhail Zhilkin
This fixes the following compile error on mips architecture with clang version 16.0.0 reported by the 0-DAY CI Kernel Test Service: ld.lld: error: undefined symbol: __udivdi3 referenced by scpart.c mtd/parsers/scpart.o:(scpart_parse) in archive drivers/built-in.a As a workaround this makes 'offs' a 32-bit type. This is enough, because the mtd containing partition table practically does not exceed 1 MB. We can revert this when the [Link] has been resolved. Link: https://github.com/ClangBuiltLinux/linux/issues/1635 Fixes: 9b78ef0c7997 ("mtd: parsers: add support for Sercomm partitions") Reported-by: kernel test robot <lkp@intel.com> Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/805fe58e-690f-6a3f-5ebf-2f6f6e6e4599@gmail.com
2023-01-02mtd: parsers: Fix potential memory leak in mtd_parser_tplink_safeloader_parse()Yuan Can
The parts needs to be freed with all its elements, otherwise it will be leaked. Fixes: 00a3588084be ("mtd: parsers: add TP-Link SafeLoader partitions table parser") Signed-off-by: Yuan Can <yuancan@huawei.com> Reviewed-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221208113620.78855-1-yuancan@huawei.com
2022-12-26mtd: spi-nor: sfdp: Use SFDP_DWORD() macro for optional parameter tablesTakahiro Kuwano
Change 0-based indexing values of parameter tables to 1-based ones by SFDP_DWORD() macro. Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/48cb008b40fdef4bf7f87e37029efaa2bfefa9ef.1672026365.git.Takahiro.Kuwano@infineon.com
2022-12-26mtd: spi-nor: sfdp: Rename BFPT_DWORD() macro to SFDP_DWORD()Takahiro Kuwano
BFPT_DWORD() converts 1-based indexing to 0-based indexing for C arrays, and is used in BFPT parse. Per JESD216F.02, the conversion is applicable to other parameter tables than BFPT. This patch renames the macro to SFDP_DWORD() so that we can use it for other parameter tables than BFPT. Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/e42feac840fe3a31187419e91b2d514d9f259d15.1672026365.git.Takahiro.Kuwano@infineon.com
2022-12-26mtd: spi-nor: sfdp: Fix index value for SCCR dwordsTakahiro Kuwano
Array index for SCCR 22th DOWRD should be 21. Fixes: 981a8d60e01f ("mtd: spi-nor: Parse SFDP SCCR Map") Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Michael Walle <michael@walle.cc> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/d8a2a77c2c95cf776e7dcae6392d29fdcf5d6307.1672026365.git.Takahiro.Kuwano@infineon.com
2022-12-13Merge tag 'mtd/for-6.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "MTD core changes: - Fix refcount error in del_mtd_device() - Fix possible resource leak in init_mtd() - Set ROOT_DEV for partitions marked as rootfs in DT - Describe marking rootfs partitions in the bindings - Fix device name leak when register device fails in add_mtd_device() - Try to find OF node for every MTD partition - simplify (a bit) code find partition-matching dynamic OF node MTD driver changes: - pxa2xx-flash maps: fix memory leak in probe - BCM parser: refer to ARCH_BCMBCA instead of ARCH_BCM4908 - lpddr2_nvm: Fix possible null-ptr-deref - inftlcore: fix repeated words in comments - lart: remove driver - tplink: - Add TP-Link SafeLoader partitions table parser and bindings - Describe TP-Link SafeLoader parser - Describe TP-Link SafeLoader dynamic subpartitions - mtdoops: - Panic caused mtdoops to call mtdoops_erase function immediately - Add mtdoops_erase function and move mtdoops_inc_counter after it - Change printk() to counterpart pr_ functions MTD binding cleanup: - Fixed-partitions: Fix 'sercomm,scpart-id' schema - Standardize the style in the examples - Drop object types when referencing other files - Argue in favor of keeping additionalProperties set to true - NVMEM-cells: - Inherit from MTD partitions - Drop range property from example - Partitions: - Change qcom,smem-part partition type - Constrain the list of parsers - Physmap: Reuse the generic definitions - SPI-NOR: Drop common properties - Sunxi-nand: Add an example to validate the bindings - Onenand: Mention the expected node name - Ingenic: Mark partitions in the controller node as deprecated - NAND: - Standardize the child node name - Drop common properties already defined in generic files - nand-chip.yaml should reference mtd.yaml - Remove useless file about partitions - Clarify all partition subnodes SPI NOR core changes: - Add support for flash reset using the dt reset-gpios property. - Update hwcaps.mask to include 8D-8D-8D read and page program ops when xSPI profile 1.0 table is defined. - Bypass zero erase size in spi_nor_find_best_erase_type(). - Fix select_uniform_erase to skip 0 erase size - Add generic flash driver. If a flash is not found in the flash_info array, fall back to the generic flash driver which is described solely by the flash's SFDP tables. - Fix the number of bytes for the dummy cycles in spi_nor_spimem_check_readop(). - Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable. SPI NOR manufacturer drivers changes: - Spansion: - use PARSE_SFDP for s28hs512t, - add support for s28hl512t, s28hl01gt, and s28hs01gt. - Gigadevice: Replace default_init() with post_bfpt() for gd25q256. - Micron - ST: Enable locking for mt25qu256a. - Winbond: Add support for W25Q512NW-IQ. - ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP. Raw NAND core changes: - Drop obsolete dependencies on COMPILE_TEST - MAINTAINERS: rectify entry for MESON NAND controller bindings - Drop EXPORT_SYMBOL_GPL for nanddev_erase() Raw NAND driver changes: - marvell: Enable NFC/DEVBUS arbiter - gpmi: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync - mpc5121: Replace NO_IRQ by 0 - lpc32xx_{slc,mlc}: - Switch to using pm_ptr() - Switch to using gpiod API - lpc32xx_mlc: Switch to using pm_ptr() - cadence: Support 64-bit slave dma interface - rockchip: Describe rk3128-nfc in the bindings - brcmnand: Update interrupts description in the bindings SPI-NAND driver changes: - winbond: - Add Winbond W25N02KV flash support - Fix flash identification" * tag 'mtd/for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (76 commits) mtd: rawnand: Drop obsolete dependencies on COMPILE_TEST mtd: maps: pxa2xx-flash: fix memory leak in probe mtd: core: Fix refcount error in del_mtd_device() mtd: spi-nor: add SFDP fixups for Quad Page Program mtd: spi-nor: issi: is25wp256: Init flash based on SFDP mtd: spi-nor: winbond: add support for W25Q512NW-IQ mtd: spi-nor: micron-st: Enable locking for mt25qu256a mtd: spi-nor: Fix the number of bytes for the dummy cycles mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt mtd: spi-nor: Fix formatting in spi_nor_read_raw() kerneldoc comment mtd: spi-nor: sysfs: print JEDEC ID for generic flash driver mtd: spi-nor: add generic flash driver mtd: spi-nor: fix select_uniform_erase to skip 0 erase size mtd: spi-nor: move function declaration out of sfdp.h mtd: spi-nor: remember full JEDEC flash ID mtd: spi-nor: sysfs: hide manufacturer if it is not set mtd: spi-nor: hide jedec_id sysfs attribute if not present mtd: spi-nor: Check for zero erase size in spi_nor_find_best_erase_type() mtd: rawnand: marvell: Enable NFC/DEVBUS arbiter mtd: parsers: refer to ARCH_BCMBCA instead of ARCH_BCM4908 ...
2022-12-12Merge tag 'random-6.2-rc1-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/crng/random Pull random number generator updates from Jason Donenfeld: - Replace prandom_u32_max() and various open-coded variants of it, there is now a new family of functions that uses fast rejection sampling to choose properly uniformly random numbers within an interval: get_random_u32_below(ceil) - [0, ceil) get_random_u32_above(floor) - (floor, U32_MAX] get_random_u32_inclusive(floor, ceil) - [floor, ceil] Coccinelle was used to convert all current users of prandom_u32_max(), as well as many open-coded patterns, resulting in improvements throughout the tree. I'll have a "late" 6.1-rc1 pull for you that removes the now unused prandom_u32_max() function, just in case any other trees add a new use case of it that needs to converted. According to linux-next, there may be two trivial cases of prandom_u32_max() reintroductions that are fixable with a 's/.../.../'. So I'll have for you a final conversion patch doing that alongside the removal patch during the second week. This is a treewide change that touches many files throughout. - More consistent use of get_random_canary(). - Updates to comments, documentation, tests, headers, and simplification in configuration. - The arch_get_random*_early() abstraction was only used by arm64 and wasn't entirely useful, so this has been replaced by code that works in all relevant contexts. - The kernel will use and manage random seeds in non-volatile EFI variables, refreshing a variable with a fresh seed when the RNG is initialized. The RNG GUID namespace is then hidden from efivarfs to prevent accidental leakage. These changes are split into random.c infrastructure code used in the EFI subsystem, in this pull request, and related support inside of EFISTUB, in Ard's EFI tree. These are co-dependent for full functionality, but the order of merging doesn't matter. - Part of the infrastructure added for the EFI support is also used for an improvement to the way vsprintf initializes its siphash key, replacing an sleep loop wart. - The hardware RNG framework now always calls its correct random.c input function, add_hwgenerator_randomness(), rather than sometimes going through helpers better suited for other cases. - The add_latent_entropy() function has long been called from the fork handler, but is a no-op when the latent entropy gcc plugin isn't used, which is fine for the purposes of latent entropy. But it was missing out on the cycle counter that was also being mixed in beside the latent entropy variable. So now, if the latent entropy gcc plugin isn't enabled, add_latent_entropy() will expand to a call to add_device_randomness(NULL, 0), which adds a cycle counter, without the absent latent entropy variable. - The RNG is now reseeded from a delayed worker, rather than on demand when used. Always running from a worker allows it to make use of the CPU RNG on platforms like S390x, whose instructions are too slow to do so from interrupts. It also has the effect of adding in new inputs more frequently with more regularity, amounting to a long term transcript of random values. Plus, it helps a bit with the upcoming vDSO implementation (which isn't yet ready for 6.2). - The jitter entropy algorithm now tries to execute on many different CPUs, round-robining, in hopes of hitting even more memory latencies and other unpredictable effects. It also will mix in a cycle counter when the entropy timer fires, in addition to being mixed in from the main loop, to account more explicitly for fluctuations in that timer firing. And the state it touches is now kept within the same cache line, so that it's assured that the different execution contexts will cause latencies. * tag 'random-6.2-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random: (23 commits) random: include <linux/once.h> in the right header random: align entropy_timer_state to cache line random: mix in cycle counter when jitter timer fires random: spread out jitter callback to different CPUs random: remove extraneous period and add a missing one in comments efi: random: refresh non-volatile random seed when RNG is initialized vsprintf: initialize siphash key using notifier random: add back async readiness notifier random: reseed in delayed work rather than on-demand random: always mix cycle counter in add_latent_entropy() hw_random: use add_hwgenerator_randomness() for early entropy random: modernize documentation comment on get_random_bytes() random: adjust comment to account for removed function random: remove early archrandom abstraction random: use random.trust_{bootloader,cpu} command line option only stackprotector: actually use get_random_canary() stackprotector: move get_random_canary() into stackprotector.h treewide: use get_random_u32_inclusive() when possible treewide: use get_random_u32_{above,below}() instead of manual loop treewide: use get_random_u32_below() instead of deprecated function ...
2022-12-05Merge tag 'spi-nor/for-6.2' into mtd/nextMiquel Raynal
SPI NOR core changes: * Add support for flash reset using the dt reset-gpios property. * Update hwcaps.mask to include 8D-8D-8D read and page program ops when xSPI profile 1.0 table is defined. * Bypass zero erase size in spi_nor_find_best_erase_type(). * Fix select_uniform_erase to skip 0 erase size * Add generic flash driver. If a flash is not found in the flash_info array, fall back to the generic flash driver which is described solely by the flash's SFDP tables. * Fix the number of bytes for the dummy cycles in spi_nor_spimem_check_readop(). * Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable. SPI NOR manufacturer drivers changes: * Spansion: - use PARSE_SFDP for s28hs512t, - add support for s28hl512t, s28hl01gt, and s28hs01gt. * Gigadevice: Replace default_init() with post_bfpt() for gd25q256. * Micron - ST: Enable locking for mt25qu256a. * Winbond: Add support for W25Q512NW-IQ. * ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP. Fix merge conflict in the jedec,spi-nor bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-12-05Merge tag 'nand/for-6.2' into mtd/nextMiquel Raynal
Raw NAND core changes: * Drop obsolete dependencies on COMPILE_TEST * MAINTAINERS: rectify entry for MESON NAND controller bindings * Drop EXPORT_SYMBOL_GPL for nanddev_erase() Raw NAND driver changes: * marvell: Enable NFC/DEVBUS arbiter * gpmi: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync * mpc5121: Replace NO_IRQ by 0 * lpc32xx_{slc,mlc}: - Switch to using pm_ptr() - Switch to using gpiod API * lpc32xx_mlc: Switch to using pm_ptr() * cadence: Support 64-bit slave dma interface * rockchip: Describe rk3128-nfc in the bindings * brcmnand: Update interrupts description in the bindings SPI-NAND driver changes: * winbond: - Add Winbond W25N02KV flash support - Fix flash identification Fix merge conflict with mtd tree regarding the brcm bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-11-25mtd: rawnand: Drop obsolete dependencies on COMPILE_TESTJean Delvare
Since commit 0166dc11be91 ("of: make CONFIG_OF user selectable"), it is possible to test-build any driver which depends on OF on any architecture by explicitly selecting OF. Therefore depending on COMPILE_TEST as an alternative is no longer needed. It is actually better to always build such drivers with OF enabled, so that the test builds are closer to how each driver will actually be built on its intended target. Building them without OF may not test much as the compiler will optimize out potentially large parts of the code. In the worst case, this could even pop false positive warnings. Dropping COMPILE_TEST here improves the quality of our testing and avoids wasting time on non-existent issues. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221124115946.5edb771c@endymion.delvare
2022-11-24mtd: maps: pxa2xx-flash: fix memory leak in probeZheng Yongjun
Free 'info' upon remapping error to avoid a memory leak. Fixes: e644f7d62894 ("[MTD] MAPS: Merge Lubbock and Mainstone drivers into common PXA2xx driver") Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> [<miquel.raynal@bootlin.com>: Reword the commit log] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221119073307.22929-1-zhengyongjun3@huawei.com
2022-11-24mtd: core: Fix refcount error in del_mtd_device()Shang XiaoJing
del_mtd_device() will call of_node_put() to mtd_get_of_node(mtd), which is mtd->dev.of_node. However, memset(&mtd->dev, 0) is called before of_node_put(). As the result, of_node_put() won't do anything in del_mtd_device(), and causes the refcount leak. del_mtd_device() memset(&mtd->dev, 0, sizeof(mtd->dev) # clear mtd->dev of_node_put() mtd_get_of_node(mtd) # mtd->dev is cleared, can't locate of_node # of_node_put(NULL) won't do anything Fix the error by caching the pointer of the device_node. OF: ERROR: memory leak, expected refcount 1 instead of 2, of_node_get()/of_node_put() unbalanced - destroy cset entry: attach overlay node /spi/spi-sram@0 CPU: 3 PID: 275 Comm: python3 Tainted: G N 6.1.0-rc3+ #54 0d8a1edddf51f172ff5226989a7565c6313b08e2 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.15.0-0-g2dd4b9b3f840-prebuilt.qemu.org 04/01/2014 Call Trace: <TASK> dump_stack_lvl+0x67/0x83 kobject_get+0x155/0x160 of_node_get+0x1f/0x30 of_fwnode_get+0x43/0x70 fwnode_handle_get+0x54/0x80 fwnode_get_nth_parent+0xc9/0xe0 fwnode_full_name_string+0x3f/0xa0 device_node_string+0x30f/0x750 pointer+0x598/0x7a0 vsnprintf+0x62d/0x9b0 ... cfs_overlay_release+0x30/0x90 config_item_release+0xbe/0x1a0 config_item_put+0x5e/0x80 configfs_rmdir+0x3bd/0x540 vfs_rmdir+0x18c/0x320 do_rmdir+0x198/0x330 __x64_sys_rmdir+0x2c/0x40 do_syscall_64+0x37/0x90 entry_SYSCALL_64_after_hwframe+0x63/0xcd Fixes: 00596576a051 ("mtd: core: clear out unregistered devices a bit more") Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> [<miquel.raynal@bootlin.com>: Light reword of the commit log] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221119063915.11108-1-shangxiaojing@huawei.com
2022-11-22mtd: spi-nor: add SFDP fixups for Quad Page ProgramSudip Mukherjee
SFDP table of some flash chips do not advertise support of Quad Input Page Program even though it has support. Use flags and add hardware cap for these chips. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> [tudor.ambarus@microchip.com: move pp setting in spi_nor_init_default_params] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220920184808.44876-2-sudip.mukherjee@sifive.com
2022-11-22mtd: spi-nor: issi: is25wp256: Init flash based on SFDPSudip Mukherjee
The datasheet of is25wp256 says it supports SFDP. Get rid of the static initialization of the flash parameters and init them when parsing SFDP. Testing showed the flash using SPINOR_OP_READ_1_1_4_4B 0x6c, SPINOR_OP_PP_4B 0x12 and SPINOR_OP_BE_4K_4B 0x21 before enabling SFDP. After this patch, it parses the SFDP information and still uses the same opcodes. Set sector_size and n_sectors to zero as they will be discovered when parsing SFDP. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> [tudor.ambarus@microchip.com: set sector_size and n_sectors to zero] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220920184808.44876-1-sudip.mukherjee@sifive.com
2022-11-21mtd: spi-nor: winbond: add support for W25Q512NW-IQJae Hyun Yoo
Add support for Winbond W25Q512NW-IQ/IN Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf Link: https://lore.kernel.org/r/20220716000643.3541839-2-quic_jaehyoo@quicinc.com
2022-11-21mtd: spi-nor: micron-st: Enable locking for mt25qu256aEliav Farber
mt25qu256a [1] uses the 4 bit Block Protection scheme and supports Top/Bottom protection via the BP and TB bits of the Status Register. BP3 is located in bit 6 of the Status Register. Tested on MT25QU256ABA8ESF-0SIT. [1] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf Signed-off-by: Eliav Farber <farbere@amazon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20221020092058.33844-1-farbere@amazon.com
2022-11-21mtd: spi-nor: Fix the number of bytes for the dummy cyclesAllen-KH Cheng
The number of bytes used by spi_nor_spimem_check_readop() may be incorrect for the dummy cycles. Since nor->read_dummy is not initialized before spi_nor_spimem_adjust_hwcaps(). We use both mode and wait state clock cycles instead of nor->read_dummy. Fixes: 0e30f47232ab ("mtd: spi-nor: add support for DTR protocol") Co-developed-by: Bayi Cheng <bayi.cheng@mediatek.com> Signed-off-by: Bayi Cheng <bayi.cheng@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Dhruva Gole <d-gole@ti.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20221031124633.13189-1-allen-kh.cheng@mediatek.com
2022-11-21mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with ↵Yaliang Wang
gd25q256_post_bfpt When utilizing PARSE_SFDP to initialize the flash parameter, the deprecated initializing method spi_nor_init_params_deprecated() and the function spi_nor_manufacturer_init_params() within it will never be executed, which results in the default_init hook function will also never be executed. This is okay for 'D' generation of GD25Q256, because 'D' generation is implementing the JESD216B standards, it has QER field defined in BFPT, parsing the SFDP can properly set the quad_enable function. The 'E' generation also implements the JESD216B standards, and it has the same status register definitions as 'D' generation, parsing the SFDP to set the quad_enable function should also work for 'E' generation. However, the same thing can't apply to 'C' generation. 'C' generation 'GD25Q256C' implements the JESD216 standards, and it doesn't have the QER field defined in BFPT, since it does have QE bit in status register 1, the quad_enable hook needs to be tweaked to properly set the quad_enable function, this can be done in post_bfpt fixup hook. Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com> [tudor.ambarus@microchip.com: Update comment in gd25q256_post_bfpt] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20221016171901.1483542-2-yaliang.wang@windriver.com
2022-11-21mtd: spi-nor: Fix formatting in spi_nor_read_raw() kerneldoc commentJonathan Neuschäfer
It doesn't make sense to put "set" on its own line like that. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20221101162906.990125-1-j.neuschaefer@gmx.net
2022-11-21mtd: spi-nor: sysfs: print JEDEC ID for generic flash driverMichael Walle
We don't have a database entry for the generic SPI-NOR flash driver and thus we don't have a JEDEC ID to print. Print the (cached) JEDEC ID instead. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-8-michael@walle.cc
2022-11-21mtd: spi-nor: add generic flash driverMichael Walle
Our SFDP parsing is everything we need to support all basic operations of a flash device. If the flash isn't found in our in-kernel flash database, gracefully fall back to a driver described solely by its SFDP tables. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-7-michael@walle.cc
2022-11-21mtd: spi-nor: fix select_uniform_erase to skip 0 erase sizeMichael Walle
4bait will set the erase size to 0 if there is no corresponding opcode for the 4byte erase. Fix spi_nor_select_uniform_erase to skip the 0 erase size to avoid mtd device registration failure cases. Reported-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220810220654.1297699-6-michael@walle.cc
2022-11-21mtd: spi-nor: move function declaration out of sfdp.hMichael Walle
sfdp.h should only contain constants related to the JEDEC SFDP specification(s). Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-5-michael@walle.cc
2022-11-21mtd: spi-nor: remember full JEDEC flash IDMichael Walle
At the moment, we print the JEDEC ID that is stored in our database. The generic flash support won't have such an entry in our database. To find out the JEDEC ID later we will have to cache it. There is also another advantage: If the flash is found in the database, the ID could be truncated because the ID of the entry is used which can be shorter. Some flashes still holds valuable information in the bytes after the JEDEC ID and come in handy during debugging of when coping with INFO6() entries. These are not accessible for now. Save a copy of the ID bytes after reading and display it via debugfs. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-4-michael@walle.cc
2022-11-21mtd: spi-nor: sysfs: hide manufacturer if it is not setMichael Walle
The manufacturer may be optional when pure SFDP flashes are supported. Hide the sysfs property if no manufacturer is set. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-3-michael@walle.cc
2022-11-21mtd: spi-nor: hide jedec_id sysfs attribute if not presentMichael Walle
Some non-jedec compliant flashes (like the Everspin flashes) don't have an ID at all. Hide the attribute in this case. Fixes: 36ac02286265 ("mtd: spi-nor: add initial sysfs support") Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-2-michael@walle.cc
2022-11-21mtd: spi-nor: Check for zero erase size in spi_nor_find_best_erase_type()Alexander Sverdlin
Erase can be zeroed in spi_nor_parse_4bait() or spi_nor_init_non_uniform_erase_map(). In practice it happened with mt25qu256a, which supports 4K, 32K, 64K erases with 3b address commands, but only 4K and 64K erase with 4b address commands. Fixes: dc92843159a7 ("mtd: spi-nor: fix erase_type array to indicate current map conf") Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20211119081412.29732-1-alexander.sverdlin@nokia.com
2022-11-18treewide: use get_random_u32_inclusive() when possibleJason A. Donenfeld
These cases were done with this Coccinelle: @@ expression H; expression L; @@ - (get_random_u32_below(H) + L) + get_random_u32_inclusive(L, H + L - 1) @@ expression H; expression L; expression E; @@ get_random_u32_inclusive(L, H - + E - - E ) @@ expression H; expression L; expression E; @@ get_random_u32_inclusive(L, H - - E - + E ) @@ expression H; expression L; expression E; expression F; @@ get_random_u32_inclusive(L, H - - E + F - + E ) @@ expression H; expression L; expression E; expression F; @@ get_random_u32_inclusive(L, H - + E + F - - E ) And then subsequently cleaned up by hand, with several automatic cases rejected if it didn't make sense contextually. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> # for infiniband Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-11-18treewide: use get_random_u32_below() instead of deprecated functionJason A. Donenfeld
This is a simple mechanical transformation done by: @@ expression E; @@ - prandom_u32_max + get_random_u32_below (E) Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Darrick J. Wong <djwong@kernel.org> # for xfs Reviewed-by: SeongJae Park <sj@kernel.org> # for damon Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> # for infiniband Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> # for arm Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # for mmc Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-11-17mtd: rawnand: marvell: Enable NFC/DEVBUS arbiterHamish Martin
The CN9130 SoC (an ARMADA 8K type) has both a NAND Flash Controller and a generic local bus controller (Device Bus Controller) that share common pins. With a board design that incorporates both a NAND flash and uses the Device Bus (in our case for an SRAM) accessing the Device Bus device fails unless the NfArbiterEn bit is set. Setting the bit enables arbitration between the Device Bus and the NAND flash. Since there is no obvious downside in enabling this for designs that don't require arbitration, we always enable it. Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221109231325.7714-1-hamish.martin@alliedtelesis.co.nz
2022-11-17mtd: parsers: refer to ARCH_BCMBCA instead of ARCH_BCM4908Lukas Bulwahn
Commit dd5c672d7ca9 ("arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA") removes config ARCH_BCM4908 as config ARCH_BCMBCA has the same intent. Probably due to concurrent development, commit 002181f5b150 ("mtd: parsers: add Broadcom's U-Boot parser") introduces 'Broadcom's U-Boot partition parser' that depends on ARCH_BCM4908, but this use was not visible during the config refactoring from the commit above. Hence, these two changes create a reference to a non-existing config symbol. Adjust the MTD_BRCM_U_BOOT definition to refer to ARCH_BCMBCA instead of ARCH_BCM4908 to remove the reference to the non-existing config symbol ARCH_BCM4908. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221116124932.4748-1-lukas.bulwahn@gmail.com
2022-11-17dt-bindings: mtd: Remove useless file about partitionsMiquel Raynal
There is already a real partitions.yaml file, so assuming everybody knows hot to read yaml schema now, this text file is no longer needed, so drop it. Depending on the situation, the lines referring to this file are either dropped or edited to point to mtd.yaml which includes partition{,s}.yaml. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/linux-mtd/20221114090315.848208-3-miquel.raynal@bootlin.com
2022-11-17mtd: lpddr2_nvm: Fix possible null-ptr-derefHui Tang
It will cause null-ptr-deref when resource_size(add_range) invoked, if platform_get_resource() returns NULL. Fixes: 96ba9dd65788 ("mtd: lpddr: add driver for LPDDR2-NVM PCM memories") Signed-off-by: Hui Tang <tanghui20@huawei.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221114090240.244172-1-tanghui20@huawei.com
2022-11-07mtd: rawnand: lpc32xx_slc: Switch to using pm_ptr()Geert Uytterhoeven
The switch to using the gpiod API removed the last user of lpc32xx_wp_disable() outside #ifdef CONFIG_PM, causing build failures if CONFIG_PM=n: drivers/mtd/nand/raw/lpc32xx_slc.c:318:13: error: ‘lpc32xx_wp_disable’ defined but not used [-Werror=unused-function] 318 | static void lpc32xx_wp_disable(struct lpc32xx_nand_host *host) | ^~~~~~~~~~~~~~~~~~ Fix this by switching from #ifdef CONFIG_PM to pm_ptr(), increasing compile-coverage as a side-effect. Reported-by: noreply@ellerman.id.au Fixes: 6b923db2867cb5e1 ("mtd: rawnand: lpc32xx_slc: switch to using gpiod API") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221027131028.3838303-2-geert@linux-m68k.org
2022-11-07mtd: rawnand: lpc32xx_mlc: Switch to using pm_ptr()Geert Uytterhoeven
The switch to using the gpiod API removed the last user of lpc32xx_wp_disable() outside #ifdef CONFIG_PM, causing build failures if CONFIG_PM=n: drivers/mtd/nand/raw/lpc32xx_mlc.c:380:13: error: ‘lpc32xx_wp_disable’ defined but not used [-Werror=unused-function] 380 | static void lpc32xx_wp_disable(struct lpc32xx_nand_host *host) | ^~~~~~~~~~~~~~~~~~ Fix this by switching from #ifdef CONFIG_PM to pm_ptr(), increasing compile-coverage as a side-effect. Reported-by: noreply@ellerman.id.au Fixes: 782e32a990d9d702 ("mtd: rawnand: lpc32xx_mlc: switch to using gpiod API") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221027131028.3838303-1-geert@linux-m68k.org
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