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2016-02-10drm/amdgpu: fix issue with overlapping userptrsChristian König
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(), leading to a possible circular locking dependency. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-10drm/radeon: hold reference to fences in radeon_sa_bo_newNicolai Hähnle
An arbitrary amount of time can pass between spin_unlock and radeon_fence_wait_any, so we need to ensure that nobody frees the fences from under us. Based on the analogous fix for amdgpu. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2016-02-10drm/amdgpu: remove unnecessary forward declarationNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2016-02-10drm/amdgpu: hold reference to fences in amdgpu_sa_bo_new (v2)Nicolai Hähnle
An arbitrary amount of time can pass between spin_unlock and fence_wait_any_timeout, so we need to ensure that nobody frees the fences from under us. A stress test (rapidly starting and killing hundreds of glxgears instances) ran into a deadlock in fence_wait_any_timeout after about an hour, and this race condition appears to be a plausible cause. v2: agd: rebase on upstream Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2016-02-10drm/amdgpu: fix s4 resumeFlora Cui
No need to re-init asic if it's already been initialized. Skip IB tests since kernel processes are frozen in thaw. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-08drm/amdgpu/cz: plumb pg flags through to powerplayAlex Deucher
Enable vce and uvd pg based on single set of pg flags. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu/tonga: plumb pg flags through to powerplayAlex Deucher
Enable vce and uvd pg based on single set of pg flags. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drma/dmgpu: move cg and pg flags into shared headersAlex Deucher
So they can be used by powerplay. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: remove unused cg definesAlex Deucher
Leftover from radeon. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: add a cgs interface to fetch cg and pg flagsAlex Deucher
Needed to pass the cg and pg info to powerplay. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amd/powerplay/tonga: disable vce pgAlex Deucher
Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amd/powerplay/tonga: disable uvd pgAlex Deucher
Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amd/powerplay/cz: disable vce pgAlex Deucher
Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amd/powerplay/cz: disable uvd pgAlex Deucher
Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: be consistent with uvd cg flagsAlex Deucher
Don't do anything if the uvd cg flags are not set. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: clean up vce pg flags for cz/stAlex Deucher
It was already disabled elsewhere, make it offical. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: handle vce pg flags properlyAlex Deucher
Don't attempt to start/stop the vce block if pg is disabled. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: handle uvd pg flags properlyAlex Deucher
Don't attempt to start/stop the uvd block if pg is disabled. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu/dpm/ci: switch over to the common pcie caps interfaceAlex Deucher
We already query this at driver init, so use that info. Also handles virtualization cases. Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu/cik: don't mess with aspm if gpu is root busAlex Deucher
Pcie registers may not be available in a virtualized environment. Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08drm/amdgpu: add pcie cap module parameters (v2)Alex Deucher
Allows the user to force the supported pcie gen and lane config on both the asic and the chipset. Useful for debugging pcie problems and for virtualization where we may not be able to query the pcie bridge caps. Default to: gen: chipset 1/2, asic 1/2/3 lanes: 1/2/4/8/16 v2: fix bare metal case Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05Merge branch 'drm-fixes-mst' of git://people.freedesktop.org/~airlied/linux ↵Dave Airlie
into drm-fixes displayport multistream fixes from AMD. * 'drm-fixes-mst' of git://people.freedesktop.org/~airlied/linux: drm/dp/mst: deallocate payload on port destruction drm/dp/mst: Reverse order of MST enable and clearing VC payload table. drm/dp/mst: move GUID storage from mgr, port to only mst branch drm/dp/mst: change MST detection scheme drm/dp/mst: Calculate MST PBN with 31.32 fixed point drm: Add drm_fixp_from_fraction and drm_fixp2int_ceil drm/mst: Add range check for max_payloads during init drm/mst: Don't ignore the MST PBN self-test result drm: fix missing reference counting decrease
2016-02-05drm/dp/mst: deallocate payload on port destructionMykola Lysenko
This is needed to properly deallocate port payload after downstream branch get unplugged. In order to do this unplugged MST topology should be preserved, to find first alive port on path to unplugged MST topology, and send payload deallocation request to branch device of found port. For this mstb and port kref's are used in reversed order to track when port and branch memory could be freed. Added additional functions to find appropriate mstb as described above. Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm/dp/mst: Reverse order of MST enable and clearing VC payload table.Andrey Grodzovsky
On DELL U3014 if you clear the table before enabling MST it sometimes hangs the receiver. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Cc: stable@vger.kernel.org Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm/dp/mst: move GUID storage from mgr, port to only mst branchHersen Wu
Previous implementation does not handle case below: boot up one MST branch to DP connector of ASIC. After boot up, hot plug 2nd MST branch to DP output of 1st MST, GUID is not created for 2nd MST branch. When downstream port of 2nd MST branch send upstream request, it fails because 2nd MST branch GUID is not available. New Implementation: only create GUID for MST branch and save it within Branch. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Cc: stable@vger.kernel.org Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm/dp/mst: change MST detection schemeMykola Lysenko
1. Get edid for all connected MST displays, not only on logical ports, in the same thread as MST topology detection is done: There are displays that have branches inside w/o logical ports. So in case another SST display connected downstream system can end-up in situation when 3 DOWN requests sent: two for ‘remote i2c read’ and one for ‘enum path resources’, making slots full. 2. Call notification callback in one place in the end of topology discovery/update: This is done to reduce number of events sent to userspace in case complex topology discovery is going, adding multiple number of connectors; 3. Remove notification callback call from short pulse interrupt processing function: This is done in order not to block interrupt processing function, in case any MST request will be made from it. Notification will be send from topology discovery/update work item. Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Cc: stable@vger.kernel.org Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm/dp/mst: Calculate MST PBN with 31.32 fixed pointHarry Wentland
Our PBN value overflows the 20 bits integer part of the 20.12 fixed point. We need to use 31.32 fixed point to avoid this. This happens with display clocks larger than 293122 (at 24 bpp), which we see with the Sharp (and similar) 4k tiled displays. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm/mst: Add range check for max_payloads during initImre Deak
max_payload is limited by the space we have in drm_dp_mst_topology_mgr::vcpi_mask,payload_mask. We need to track max_payloads+1 IDs in these masks, see drm_dp_mst_assign_payload_id(). Add a sanity check for this. Caught by coverity. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: David Weinehall <david.weinehall@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm/mst: Don't ignore the MST PBN self-test resultImre Deak
Otherwise this call would have no effect. Caught by Coverity. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: David Weinehall <david.weinehall@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05drm: fix missing reference counting decreaseInsu Yun
In drm_dp_mst_allocate_vcpi, it returns true in two paths, but in one path, there is no reference couting decrease. Signed-off-by: Insu Yun <wuninsu@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-05Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-fixes - fix and enable iceland/topaz support - handle WC on platforms that don't support it * 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: disable uvd and vce clockgating on Fiji drm/amdgpu: remove exp hardware support from iceland drm/amdgpu: load MEC ucode manually on iceland drm/amdgpu: don't load MEC2 on topaz drm/amdgpu: drop topaz support from gmc8 module drm/amdgpu: pull topaz gmc bits into gmc_v7 drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above drm/amdgpu: iceland use CI based MC IP drm/amdgpu: move gmc7 support out of CIK dependency drm/amdgpu/gfx7: enable cp inst/reg error interrupts drm/amdgpu/gfx8: enable cp inst/reg error interrupts drm/amdgpu: mask out WC from BO on unsupported arches drm/radeon: mask out WC from BO on unsupported arches drm: add helper to check for wc memory support drm/amdgpu: no need to load MC firmware on fiji
2016-02-05Merge tag 'drm-amdkfd-fixes-2016-01-28' of ↵Dave Airlie
git://people.freedesktop.org/~gabbayo/linux into drm-fixes two static checker fixes. * tag 'drm-amdkfd-fixes-2016-01-28' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: Remove unnecessary cast in kfree drm/amdgpu: fix non-ANSI declaration of amdgpu_amdkfd_gfx_*_get_functions()
2016-02-05Merge branch 'exynos-drm-fixes' of ↵Dave Airlie
git://git.kernel.org:/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes Just regression fixes. - Fix build warning and error without PM configuration - Fix no display issue on Snow board reported by Michal Suchanek, http://www.spinics.net/lists/dri-devel/msg99473.html * 'exynos-drm-fixes' of git://git.kernel.org:/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: dp: Fix panel and bridge lookup logic drm: exynos: make PM functions as __maybe_unused drm/exynos: fix building without CONFIG_PM_SLEEP
2016-02-05Merge branch 'drm/adv7511' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into drm-fixes misc adv7511 edid reading fixes. * 'drm/adv7511' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: drm: adv7511: it's HPD, not HDP drm: adv7511: mark ADV7511_REG_EDID_READ_CTRL volatile drm: adv7511: really enable interrupts for EDID detection
2016-02-05Merge tag 'drm-intel-fixes-2016-02-04' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-fixes misc i915 fixes. * tag 'drm-intel-fixes-2016-02-04' of git://anongit.freedesktop.org/drm-intel: drm/i915: refine qemu south bridge detection drm/i915: Remove select to deleted STOP_MACHINE from Kconfig drm/i915: Fix NULL plane->fb oops on SKL drm/i915: Don't reject primary plane windowing with color keying enabled on SKL+ drm/i915/dp: fall back to 18 bpp when sink capability is unknown drm/i915: Make sure DC writes are coherent on flush.
2016-02-03drm/amdgpu: disable uvd and vce clockgating on FijiAlex Deucher
Doesn't work properly yet. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02drm/amdgpu: remove exp hardware support from icelandAlex Deucher
It's working now. bug: https://bugs.freedesktop.org/show_bug.cgi?id=92270 Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: load MEC ucode manually on icelandAlex Deucher
The smc doesn't handle it. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: don't load MEC2 on topazAlex Deucher
Not validated. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: drop topaz support from gmc8 moduleAlex Deucher
topaz is actually gmc7. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: pull topaz gmc bits into gmc_v7Alex Deucher
Add the topaz golden settings into the gmc7 module. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 aboveKen Wang
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: iceland use CI based MC IPKen Wang
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu: move gmc7 support out of CIK dependencyAlex Deucher
It's used by iceland which is VI. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/amdgpu/gfx7: enable cp inst/reg error interruptsAlex Deucher
Enable CP register/instruction error interrupts. Useful for debugging command stream problems. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02drm/amdgpu/gfx8: enable cp inst/reg error interruptsAlex Deucher
Enable CP register/instruction error interrupts. Useful for debugging command stream problems. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02drm/amdgpu: mask out WC from BO on unsupported archesOded Gabbay
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm/radeon: mask out WC from BO on unsupported archesOded Gabbay
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-02-02drm: adv7511: it's HPD, not HDPWolfram Sang
Fix this typo, consequently used over both files :) Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Archit Taneja <architt@codeaurora.org>
2016-02-02drm: adv7511: mark ADV7511_REG_EDID_READ_CTRL volatileWolfram Sang
This register includes a counter which is decremented by the chip on I2C failures. Also, it is reset when powering down. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Archit Taneja <architt@codeaurora.org>
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