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path: root/drivers/cxl
AgeCommit message (Expand)Author
2023-09-22cxl/acpi: Annotate struct cxl_cxims_data with __counted_byKees Cook
2023-09-22cxl/port: Fix cxl_test register enumeration regressionDan Williams
2023-09-14cxl/region: Refactor granularity select in cxl_port_setup_targets()Alison Schofield
2023-09-14cxl/region: Match auto-discovered region decoders by HPA rangeAlison Schofield
2023-09-14cxl/mbox: Fix CEL logic for poison and security commandsIra Weiny
2023-09-11cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native()Smita Koralahalli
2023-09-11cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registersSmita Koralahalli
2023-07-28cxl/memdev: Only show sanitize sysfs files when supportedDavidlohr Bueso
2023-07-28cxl/memdev: Document security state in kern-docDavidlohr Bueso
2023-07-18cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws()Breno Leitao
2023-07-18cxl/acpi: Fix a use-after-free in cxl_parse_cfmws()Breno Leitao
2023-07-14cxl/mem: Fix a double shift bugDan Carpenter
2023-07-14cxl: fix CONFIG_FW_LOADER dependencyArnd Bergmann
2023-06-29cxl: Fix one kernel-doc commentYang Li
2023-06-27cxl/pci: Use correct flag for sanitize pollingDavidlohr Bueso
2023-06-25Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams
2023-06-25Merge branch 'for-6.5/cxl-perf' into for-6.5/cxlDan Williams
2023-06-25perf: CXL Performance Monitoring Unit driverJonathan Cameron
2023-06-25Merge branch 'for-6.5/cxl-region-fixes' into for-6.5/cxlDan Williams
2023-06-25Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxlDan Williams
2023-06-25Merge branch 'for-6.5/cxl-fwupd' into for-6.5/cxlDan Williams
2023-06-25Merge branch 'for-6.5/cxl-background' into for-6.5/cxlDan Williams
2023-06-25cxl: add a firmware update mechanism using the sysfs firmware loaderVishal Verma
2023-06-25cxl/mem: Support Secure EraseDavidlohr Bueso
2023-06-25cxl/mem: Wire up Sanitization supportDavidlohr Bueso
2023-06-25cxl/mbox: Add sanitization handling machineryDavidlohr Bueso
2023-06-25cxl/mem: Introduce security state sysfs fileDavidlohr Bueso
2023-06-25cxl/mbox: Allow for IRQ_NONE case in the isrDavidlohr Bueso
2023-06-25Revert "cxl/port: Enable the HDM decoder capability for switch ports"Dan Williams
2023-06-25cxl/memdev: Formalize endpoint port linkageDan Williams
2023-06-25cxl/pci: Unconditionally unmask 256B Flit errorsDan Williams
2023-06-25cxl/region: Manage decoder target_type at decoder-attach timeDan Williams
2023-06-25cxl/hdm: Default CXL_DEVTYPE_DEVMEM decoders to CXL_DECODER_DEVMEMDan Williams
2023-06-25cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM}Dan Williams
2023-06-25cxl/memdev: Make mailbox functionality optionalDan Williams
2023-06-25cxl/mbox: Move mailbox related driver state to its own data structureDan Williams
2023-06-25cxl: Remove leftover attribute documentation in 'struct cxl_dev_state'Dan Williams
2023-06-25cxl: Fix kernel-doc warningsDan Williams
2023-06-25cxl/regs: Clarify when a 'struct cxl_register_map' is input vs outputDan Williams
2023-06-25cxl/region: Fix state transitions after reset failureDan Williams
2023-06-25cxl/region: Flag partially torn down regions as unusableDan Williams
2023-06-25cxl/region: Move cache invalidation before region teardown, and before setupDan Williams
2023-06-25cxl/port: Store the downstream port's Component Register mappings in struct c...Robert Richter
2023-06-25cxl/port: Store the port's Component Register mappings in struct cxl_portRobert Richter
2023-06-25cxl/pci: Early setup RCH dport component registers from RCRBRobert Richter
2023-06-25cxl/mem: Prepare for early RCH dport component register setupRobert Richter
2023-06-25cxl/regs: Remove early capability checks in Component Register setupRobert Richter
2023-06-25cxl/port: Remove Component Register base address from struct cxl_dportRobert Richter
2023-06-25cxl/acpi: Directly bind the CEDT detected CHBCR to the Host Bridge's portRobert Richter
2023-06-25cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs()Robert Richter
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