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path: root/drivers/clk/meson/meson8b.c
AgeCommit message (Expand)Author
2019-06-11clk: meson: meson8b: add the cts_i958 clockMartin Blumenstingl
2019-06-11clk: meson: meson8b: add the cts_mclk_i958 clocksMartin Blumenstingl
2019-06-11clk: meson: meson8b: add the cts_amclk clocksMartin Blumenstingl
2019-05-20clk: meson: meson8b: fix a typo in the VPU parent names array variableMartin Blumenstingl
2019-04-01clk: meson: meson8b: add the video decoder clock treesMartin Blumenstingl
2019-04-01clk: meson: meson8b: add the VPU clock treesMartin Blumenstingl
2019-04-01clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2Martin Blumenstingl
2019-04-01clk: meson: meson8b: use a separate clock table for Meson8m2Martin Blumenstingl
2019-02-13clk: meson: meson8b: fix the naming of the APB clocksMartin Blumenstingl
2019-02-02clk: meson: rework and clean drivers dependenciesJerome Brunet
2019-01-07clk: meson: meson8b: add the GPU clock treeMartin Blumenstingl
2019-01-07clk: meson: meson8b: use a separate clock table for Meson8Martin Blumenstingl
2018-12-03clk: meson: meson8b: add the read-only video clock treesMartin Blumenstingl
2018-12-03clk: meson: meson8b: add the fractional divider for vid_pll_dcoMartin Blumenstingl
2018-12-03clk: meson: meson8b: fix the offset of vid_pll_dco's N valueMartin Blumenstingl
2018-11-23clk: meson: meson8b: add the CPU clock post divider clocksMartin Blumenstingl
2018-11-23clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3Martin Blumenstingl
2018-11-23clk: meson: meson8b: allow changing the CPU clock treeMartin Blumenstingl
2018-11-23clk: meson: meson8b: run from the XTAL when changing the CPU frequencyMartin Blumenstingl
2018-11-23clk: meson: meson8b: add support for more M/N values in sys_pllMartin Blumenstingl
2018-11-23clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICALMartin Blumenstingl
2018-11-23clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_selMartin Blumenstingl
2018-11-23clk: meson: meson8b: fix the width of the cpu_scale_div clockMartin Blumenstingl
2018-11-23clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_tableMartin Blumenstingl
2018-11-23clk: meson: meson8b: use the HHI syscon if availableMartin Blumenstingl
2018-09-26clk: meson: meson8b: use the regmap in the internal reset controllerMartin Blumenstingl
2018-09-26clk: meson: meson8b: register the clock controller earlyMartin Blumenstingl
2018-09-26clk: meson: clk-pll: drop hard-coded rates from pll tablesJerome Brunet
2018-09-26clk: meson: clk-pll: remove od parametersJerome Brunet
2018-09-26clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessaryJerome Brunet
2018-09-26clk: meson: clk-pll: add enable bitJerome Brunet
2018-06-09Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2018-05-21clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICALMartin Blumenstingl
2018-05-18clk: meson: use SPDX license identifiers consistentlyJerome Brunet
2018-05-15clk: meson: meson8b: add support for the NAND clocksMartin Blumenstingl
2018-04-25clk: meson: meson8b: fix meson8b_cpu_clk parent clock nameMartin Blumenstingl
2018-04-25clk: meson: meson8b: fix meson8b_fclk_div3_div clock nameMartin Blumenstingl
2018-03-14clk: meson: Drop unused local variable and add staticStephen Boyd
2018-03-13clk: meson: clean-up clk81 clocksJerome Brunet
2018-03-13clk: meson: add fdiv clock gatesJerome Brunet
2018-03-13clk: meson: add mpll pre-dividerJerome Brunet
2018-03-13clk: meson: add fractional part of meson8b fixed_pllJerome Brunet
2018-03-13clk: meson: rework meson8b cpu clockJerome Brunet
2018-03-13clk: meson: split divider and gate part of mpllJerome Brunet
2018-03-13clk: meson: migrate plls clocks to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate mplls clocks to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate muxes to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate dividers to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate gates to clk_regmapJerome Brunet
2018-03-13clk: meson: add regmap to the clock controllersJerome Brunet