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clk
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ingenic
Age
Commit message (
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Author
2020-05-28
clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused
Stephen Boyd
2020-05-28
clk: X1000: Add FIXDIV for SSI clock of X1000.
周琰杰 (Zhou Yanjie)
2020-05-28
clk: Ingenic: Add CGU driver for X1830.
周琰杰 (Zhou Yanjie)
2020-05-28
clk: Ingenic: Adjust cgu code to make it compatible with X1830.
周琰杰 (Zhou Yanjie)
2020-05-28
clk: Ingenic: Remove unnecessary spinlock when reading registers.
周琰杰 (Zhou Yanjie)
2020-03-20
clk: ingenic/TCU: Fix round_rate returning error
Paul Cercueil
2020-03-20
clk: ingenic/jz4770: Exit with error if CGU init failed
Paul Cercueil
2020-03-20
clk: JZ4780: Add function for enable the second core.
周琰杰 (Zhou Yanjie)
2020-03-20
clk: Ingenic: Add support for TCU of X1000.
周琰杰 (Zhou Yanjie)
2019-11-27
Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' ...
Stephen Boyd
2019-11-22
clk: ingenic: Allow drivers to be built with COMPILE_TEST
Stephen Boyd
2019-11-13
clk: Ingenic: Add CGU driver for X1000.
Zhou Yanjie
2019-11-08
drivers/clk: convert VL struct to struct_size
Stephen Kitt
2019-09-22
Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Linus Torvalds
2019-08-12
clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro
Paul Cercueil
2019-08-08
clk: jz4740: Add TCU clock
Paul Cercueil
2019-08-08
clk: ingenic: Add driver for the TCU clocks
Paul Cercueil
2019-08-07
clk: ingenic/jz4740: Fix "pll half" divider not read/written properly
Paul Cercueil
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2019-06-25
clk: ingenic: Remove unused functions
Paul Cercueil
2019-06-25
clk: ingenic: Handle setting the Low-Power Mode bit
Paul Cercueil
2019-06-25
clk: ingenic: Add missing header in cgu.h
Paul Cercueil
2019-06-07
clk: ingenic/jz4725b: Fix "pll half" divider not read/written properly
Paul Cercueil
2019-06-07
clk: ingenic/jz4725b: Fix incorrect dividers for main clocks
Paul Cercueil
2019-06-07
clk: ingenic/jz4770: Fix incorrect dividers for main clocks
Paul Cercueil
2019-06-07
clk: ingenic/jz4740: Fix incorrect dividers for main clocks
Paul Cercueil
2019-06-07
clk: ingenic: Add support for divider tables
Paul Cercueil
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
2019-04-11
clk: ingenic: jz4725b: Add UDC PHY clock
Paul Cercueil
2019-02-26
clk: ingenic: Remove set but not used variable 'enable'
YueHaibing
2019-02-22
clk: ingenic: Fix doc of ingenic_cgu_div_info
Paul Cercueil
2019-02-22
clk: ingenic: Fix round_rate misbehaving with non-integer dividers
Paul Cercueil
2019-02-05
clk: ingenic: jz4740: Fix gating of UDC clock
Paul Cercueil
2018-10-16
clk: Add Ingenic jz4725b CGU driver
Paul Cercueil
2018-10-16
clk: ingenic: Add proper Kconfig entries
Paul Cercueil
2018-07-06
clk: ingenic: Add missing flag for UDC clock
Paul Cercueil
2018-07-06
clk: ingenic: Fix incorrect data for the i2s clock
Paul Cercueil
2018-06-15
docs: Fix some broken references
Mauro Carvalho Chehab
2018-06-01
clk: ingenic: jz4770: Add 150us delay after enabling VPU clock
Paul Cercueil
2018-06-01
clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
Paul Cercueil
2018-06-01
clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
Paul Cercueil
2018-06-01
clk: ingenic: jz4770: Change OTG from custom to standard gated clock
Paul Cercueil
2018-06-01
clk: ingenic: Support specifying "wait for clock stable" delay
Paul Cercueil
2018-06-01
clk: ingenic: Add support for clocks whose gate bit is inverted
Paul Cercueil
2018-01-18
clk: Add Ingenic jz4770 CGU driver
Paul Cercueil
2018-01-18
clk: ingenic: Add code to enable/disable PLLs
Paul Cercueil
2018-01-18
clk: ingenic: support PLLs with no bypass bit
Paul Cercueil
2018-01-18
clk: ingenic: Fix recalc_rate for clocks with fixed divider
Paul Cercueil
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