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path: root/arch/riscv/kernel/sys_hwprobe.c
AgeCommit message (Expand)Author
2024-08-14RISC-V: hwprobe: Add SCALAR to misaligned perf definesEvan Green
2024-08-14RISC-V: hwprobe: Add MISALIGNED_PERF keyEvan Green
2024-07-26RISC-V: Provide the frequency of time CSR via hwprobePalmer Dabbelt
2024-07-22RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabeticallyConor Dooley
2024-07-12Merge patch series "riscv: Apply Zawrs when available"Palmer Dabbelt
2024-07-12riscv: hwprobe: export Zawrs ISA extensionAndrew Jones
2024-07-11riscv: hwprobe: export highest virtual userspace addressClément Léger
2024-06-26riscv: hwprobe: export Zcmop ISA extensionClément Léger
2024-06-26riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensionsClément Léger
2024-06-26riscv: hwprobe: export Zimop ISA extensionClément Léger
2024-05-30riscv: vector: adjust minimum Vector requirement to ZVE32XAndy Chiu
2024-05-30riscv: hwprobe: add zve Vector subextensions into hwprobe interfaceAndy Chiu
2024-04-28riscv: hwprobe: export Zihintpause ISA extensionClément Léger
2024-03-13riscv: Set unaligned access speed at compile timeCharlie Jenkins
2024-01-09Merge patch series "riscv: hwprobe: add Zicond, Zacas and Ztso support"Palmer Dabbelt
2024-01-09Merge patch series "RISC-V: hwprobe: Introduce which-cpus"Palmer Dabbelt
2024-01-03RISC-V: hwprobe: Introduce which-cpus flagAndrew Jones
2024-01-03RISC-V: Move the hwprobe syscall to its own fileAndrew Jones