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Author
2023-04-29
RISC-V: fix sifive and thead section mismatches in errata
Randy Dunlap
2023-04-28
Merge tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2023-04-25
RISC-V: hwprobe: Remove __init on probe_vendor_features()
Evan Green
2023-04-18
Merge patch series "RISC-V Hardware Probing User Interface"
Palmer Dabbelt
2023-04-18
RISC-V: hwprobe: Support probing of misaligned access performance
Evan Green
2023-03-14
riscv: alternatives: Rename errata_id to patch_id
Andrew Jones
2023-03-14
riscv: alternatives: Remove unnecessary define and unused struct
Andrew Jones
2023-03-07
RISC-V: fix taking the text_mutex twice during sifive errata patching
Conor Dooley
2023-02-21
RISC-V: take text_mutex during alternative patching
Conor Dooley
2023-02-14
riscv: Fix early alternative patching
Samuel Holland
2023-01-31
riscv: switch to relative alternative entries
Jisheng Zhang
2022-10-27
drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores
Heiko Stuebner
2022-10-13
Merge patch series "Some style cleanups for recent extension additions"
Palmer Dabbelt
2022-10-13
riscv: check for kernel config option in t-head memory types errata
Heiko Stuebner
2022-10-13
riscv: use BIT() macros in t-head errata init
Heiko Stuebner
2022-10-13
riscv: drop some idefs from CMO initialization
Heiko Stuebner
2022-09-13
RISC-V: Clean up the Zicbom block size probing
Palmer Dabbelt
2022-08-10
riscv: implement Zicbom-based CMO instructions + the t-head variant
Palmer Dabbelt
2022-08-06
Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
2022-08-03
riscv: implement cache-management errata for T-Head SoCs
Heiko Stuebner
2022-07-07
riscv: don't warn for sifive erratas in modules
Heiko Stuebner
2022-06-16
riscv: remove usage of function-pointers from cpufeatures and t-head errata
Heiko Stuebner
2022-05-11
riscv: add memory-type errata for T-Head
Heiko Stuebner
2022-05-11
riscv: implement module alternatives
Heiko Stuebner
2022-05-11
riscv: allow different stages with alternatives
Heiko Stuebner
2022-05-11
riscv: integrate alternatives better into the main architecture
Heiko Stuebner
2022-01-09
riscv: errata: alternative: mark vendor_patch_func __initdata
Jisheng Zhang
2021-06-01
riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled
Vincent
2021-04-26
riscv: sifive: Apply errata "cip-1200" patch
Vincent Chen
2021-04-26
riscv: sifive: Apply errata "cip-453" patch
Vincent Chen
2021-04-26
riscv: sifive: Add SiFive alternative ports
Vincent Chen
2021-04-26
riscv: Introduce alternative mechanism to apply errata solution
Vincent Chen