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path: root/arch/powerpc/kernel/head_8xx.S
AgeCommit message (Expand)Author
2016-03-11powerpc/8xx: rewrite set_context() in CChristophe Leroy
2016-03-11powerpc/8xx: remove special handling of CPU6 errata in set_dec()Christophe Leroy
2016-03-11powerpc/8xx: Map linear kernel RAM with 8M pagesChristophe Leroy
2016-03-11powerpc/8xx: Save r3 all the time in DTLB miss handlerChristophe Leroy
2016-03-09powerpc/8xx: CONFIG_DEBUG_PAGEALLOC requires ITLBmiss for kernel addressesChristophe Leroy
2015-06-02powerpc/8xx: Implementation of PAGE_EXECLEROY Christophe
2015-06-02powerpc/8xx: Handle PAGE_USER via APG bitsLEROY Christophe
2015-06-02powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000LEROY Christophe
2015-06-02powerpc/8xx: Use SPRG2 instead of DAR for saving r3LEROY Christophe
2015-06-02powerpc/8xx: dont save CR in SCRATCH registersLEROY Christophe
2015-06-02powerpc/8xx: Handle CR out of exception PROLOG/EPILOGLEROY Christophe
2015-06-02powerpc/8xx: macro for handling CPU15 errataLEROY Christophe
2015-01-29powerpc/8xx: Remove duplicated code in set_context()LEROY Christophe
2015-01-29powerpc/8xx: Optimise access to swapper_pg_dirLEROY Christophe
2015-01-29powerpc/8xx: Take benefit of aligned PGDIRLEROY Christophe
2015-01-29powerpc/8xx: remove tests on PGDIR entry validityLEROY Christophe
2015-01-29powerpc/8xx: remove remaining unnecessary code in FixupDARLEROY Christophe
2015-01-29powerpc/8xx: use _PAGE_RO instead of _PAGE_RWLEROY Christophe
2014-11-07powerpc/8xx: Invalidate non present TLB as early as possibleLEROY Christophe
2014-11-07powerpc/8xx: Use DAR to save r3 for CPU6 ERRATALEROY Christophe
2014-11-07powerpc/8xx: Don't restore regs to save them again.LEROY Christophe
2014-11-07powerpc/8xx: _PMD_PRESENT already set in level 1 entriesLEROY Christophe
2014-11-07powerpc/8xx: set PTE bit 22 off TLBmissLEROY Christophe
2014-11-07powerpc/8xx: Better readibility of ERRATA CPU6 handlingLEROY Christophe
2014-11-07powerpc/8xx: Implement 16k pagesLEROY Christophe
2014-11-07powerpc/8xx: Const for TLB RPN forced valueLEROY Christophe
2014-11-07powerpc/8xx: Use PAGE size related constsLEROY Christophe
2014-11-07powerpc/8xx: Don't use MD_TWC for walkLEROY Christophe
2014-11-07powerpc/8xx: Use M_TW instead of M_TWBLEROY Christophe
2014-11-07powerpc/8xx: No need to restore registers and save them again.LEROY Christophe
2014-11-07powerpc/8xx: DataAccess exception not generated by MPC8xxLEROY Christophe
2014-11-07powerpc/8xx: exception InstructionAccess does not exist on MPC8xxLEROY Christophe
2014-09-04powerpc/8xx: Duplicate two insns instead of branchingLEROY Christophe
2014-09-04powerpc/8xx: Optimize verification in FixupDARLEROY Christophe
2014-09-04powerpc/8xx: No need to save r10 and r3 when not calling FixupDARLEROY Christophe
2014-09-04powerpc/8xx: Fix comment about DIRTY updateLEROY Christophe
2014-09-04powerpc/8xx: Remove loading of r10 at end of FixupDARLEROY Christophe
2014-09-04powerpc/8xx: Use SCRATCH0 and SCRATCH1 also for TLB handlersLEROY Christophe
2014-09-04powerpc/8xx: Declare SPRG2 as a SCRATCH registerLEROY Christophe
2013-10-28powerpc/8xx: Fixing issue with CONFIG_PIN_TLBLEROY Christophe
2013-08-14powerpc: Remove the empty giveup_fpu() function on 32bit kernelKevin Hao
2012-03-09powerpc: Call do_page_fault() with interrupts offBenjamin Herrenschmidt
2011-09-20powerpc/32: Pass device tree address as u64 to machine_initScott Wood
2010-11-29powerpc: Remove second definition of STACK_FRAME_OVERHEADStephen Rothwell
2010-04-07powerpc/8xx: Use SPRG2 and DAR registers to stash r11 and cr.Joakim Tjernlund
2010-04-07powerpc/8xx: Don't touch ACCESSED when no SWAP.Joakim Tjernlund
2010-04-07powerpc/8xx: Avoid testing for kernel space in ITLB Miss.Joakim Tjernlund
2010-04-07powerpc/8xx: Optimze TLB Miss handlersJoakim Tjernlund
2010-01-15powerpc/8xx: Fix user space TLB walk in dcbX fixupJoakim Tjernlund
2010-01-15powerpc/8xx: Always pin kernel instruction TLBJoakim Tjernlund
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