| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-11-11 | MIPS: CM, CPC: Ensure core-other GCRs reflect the correct core | Paul Burton |
| 2015-11-11 | MIPS: CM: Introduce core-other locking functions | Paul Burton |
| 2015-10-26 | MIPS: Always read full 64 bit CM error GCRs for CM3 | Paul Burton |
| 2015-10-26 | MIPS: Avoid buffer overrun in mips_cm_error_report | Paul Burton |
| 2015-10-26 | MIPS: Don't read GCRs when a CM is not present | Paul Burton |
| 2015-08-26 | MIPS: CM: Add support for reporting CM cache errors | Markos Chandras |
| 2015-08-26 | MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels. | Markos Chandras |
| 2015-08-26 | MIPS: mips-cm: Extend CM accessors for 64-bit CPUs | Markos Chandras |
| 2015-08-26 | MIPS: Add platform callback before initializing the L2 cache | Markos Chandras |
| 2014-11-24 | MIPS: Replace use of phys_t with phys_addr_t. | Ralf Baechle |
| 2014-03-06 | MIPS: Add generic CM probe & access code | Paul Burton |
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index : linux.git | |
| dakr's fork of kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git |
| summaryrefslogtreecommitdiff |