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https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.11
Generic Fixups/Cleanups:
- main_pktdma reg ranges fixes
- dtbs_check warning cleanups with addition of cpsw-mac-efuse node and
dropping "syscon", "simple-mfd" compatibles in favor of simple-bus
- Disable McASP FIFOs across SoCs for better latency
- Add memory node to bootloader stage with bootph-all
- Restructure am62p and j722s dtsi for share nodes across these SoCs
- DT warning fixes around USB type-C connector node (AM62/AM62P)
SoC Specific features and Fixes:
AM62
- GPMC and ELM addition
AM62A
- Enable RTC by default
- Crypto accelerator support
AM64 and AM65
- PRU system event support
AM69/J784S4:
- CPSW2G and CPSW9G addition with QSGMII and UXSGMII board support
- PCIe, USB, McASP, EHRPWM node additions
AM67/J722s
- Fix to update GPIO count
- Add gpio-ranges definition
- McASP support for audio
- PCIe, USB, Serdes support
Board Specific features and fixes:
AM62
- am62x-phyboard-lyra carrier board support
- am625-verdin: nau8822 PLL support
- sk: CMA node addition
- lp-sk: NAND expansion card overlay
AM62A
- New phyboard-lyra-am62ax from phytec
- CMA node addition
AM64:
- phycore-board: PMIC support
- hummingbird-t: RS485 RTS pin polarity update
- am6xx-phycore-som: overlays for variants w/o SPI, RTC, ETH PHY or w/
QSPI
- EVM: GPMC NAND expansion card overlay
- EVM: ICSSG ethernet MII mode overlay support
- SK: power supply temp sensors support
AM68
- SK: PMIC, OSPI
J721e
- SK: MCAN Support
- Overlay for infotainment expansion board
AM69/J784S4
- EVM: PCIe RC/EP, USB3, MCAN support
- SK: PMIC support
* tag 'ti-k3-dt-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (89 commits)
arm64: dts: ti: k3-am62a7-sk: Reserve 576MiB of global CMA
arm64: dts: ti: k3-am62x-sk-common: Reserve 128MiB of global CMA
arm64: dts: ti: k3-am62x-sk-common: Fix graph_child_address warns
arm64: dts: ti: k3-am62p5-sk: fix graph_child_address warnings
arm64: dts: ti: k3-j722s: Add gpio-ranges properties
arm64: dts: ti: k3-am62p: Add gpio-ranges properties
arm64: dts: ti: k3-pinctrl: Define a generic GPIO MUX Mode
arm64: dts: ti: k3-am62: Add cpsw-mac-efuse node to wkup_conf
arm64: dts: ti: k3-am62a: Add cpsw-mac-efuse node to wkup_conf
arm64: dts: ti: k3-j784s4: Add cpsw-mac-efuse node to mcu_conf
arm64: dts: ti: k3-j721s2: Add cpsw-mac-efuse node to mcu_conf
arm64: dts: ti: k3-j721e: Add cpsw-mac-efuse node to mcu_conf
arm64: dts: ti: k3-j7200: Add cpsw-mac-efuse node to mcu_conf
arm64: dts: ti: k3-am65: Add cpsw-mac-efuse node to mcu_conf
arm: dts: k3-am642-evm-nand: Add bootph-all to NAND related nodes
arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM62Ax
dt-bindings: arm: ti: Add bindings for PHYTEC AM62Ax based hardware
arm64: dts: ti: Add am62x-phyboard-lyra carrier board
arm64: dts: ti: k3-am62a: Enable AUDIO_REFCLKx
arm64: dts: ti: k3-j784s4-evm: Enable analog audio support
...
Link: https://lore.kernel.org/r/37f251a1-f3bd-402f-ab22-cf786c3871d7@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.11, round 1
Highlights:
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-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
* tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (31 commits)
arm64: dts: st: describe power supplies for stm32mp257f-ev1 board
arm64: dts: st: add scmi regulators on stm32mp25
regulator: Add STM32MP25 regulator bindings
ARM: dts: stm32: omit unused pinctrl groups from stm32mp13 dtb files
arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board
arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25
arm64: dts: st: add HPDMA nodes on stm32mp251
ARM: dts: stm32: Add ethernet support for DH STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: order stm32mp13-pinctrl nodes
ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board
ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13
ARM: dts: stm32: Document output pins for PWMs on stm32mp135f-dk
ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards
ARM: dts: stm32: Missing clocks for stm32f429's syscfg.
ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
dt-bindings: arm: stm32: Add compatible string for DH electronics STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: osd32: move pwr_regulators to common
...
Link: https://lore.kernel.org/r/8f10bd29-d067-4060-89ff-2e1a605f3141@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.11
This introduces new support for the Sony Xperia Z3 Compact, HTC One
(M8), Samsung Galaxy Tab 4 8.0 Wi-Fi, Samsung Galaxy Grand 2, and
Samsung Galaxy Note 3 devices.
The Motorola Moto G and Motorola Moto G 4G gains accelerometer and
magnetometer support, with the latter also getting framebuffer supplies
and a temperature sensor wired up.
The SMBB (charger block) is enabled across all MSM8x26 Lumia devices, as
this is used for USB state changes.
The operating mode for SDC regulator is set to HPM on Sony Xperia
"Shinano" family to avoid brownouts on uSD-cards.
The panel on LGE Nexus 5 is connected to the backlight, to make this
turn off on blanking.
MSM8974 is transitioned to use the mailbox-abstraction for invoking
PC interrupts on remote processors.
* tag 'qcom-arm32-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (24 commits)
ARM: dts: qcom: qcom-msm8226-samsung-ms013g: Add initial device tree
ARM: dts: qcom: apq8064: drop incorrect ranges from QFPROM
ARM: dts: qcom: msm8926-motorola-peregrine: Add framebuffer supplies
ARM: dts: qcom: msm8926-motorola-peregrine: Update temperature sensor
ARM: dts: qcom: msm8926-motorola-peregrine: Add accelerometer, magnetometer, regulator
ARM: dts: qcom: msm8974: Use mboxes in smsm node
ARM: dts: qcom: msm8974-sony-shinano: increase load on l21 for sdhc2
ARM: dts: qcom: Add Sony Xperia Z3 Compact smartphone
ARM: dts: qcom: use generic node names for Adreno and QFPROM
ARM: dts: qcom: motorola-falcon: add accelerometer, magnetometer
ARM: dts: qcom: Add initial support for HTC One (M8)
ARM: dts: qcom: msm8974: Use mboxes properties for APCS
ARM: dts: qcom: mdm9615: drop #power-domain-cells property of GCC
ARM: dts: qcom: ipq8064: drop #power-domain-cells property of GCC
ARM: dts: qcom: ipq4019: drop #power-domain-cells property of GCC
ARM: dts: qcom: msm8960: drop #power-domain-cells property of GCC
ARM: dts: qcom: msm8660: drop #power-domain-cells property of GCC
ARM: dts: qcom: apq8064: drop #power-domain-cells property of GCC
ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon
ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name
...
Link: https://lore.kernel.org/r/20240705032926.13333-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The beeper in the NSLU2 is just a GPIO connected to a
speaker, so we need to use PWM on the GPIO to get any kind
of sound out.
Tested with some random beeps by enabling INPUT_EVDEV and
running beep.c with e.g. beep 400 for a 400 Hz tone.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240627-ixp4xx-dts-v1-1-cdbbe1150873@linaro.org
Link: https://lore.kernel.org/r/20240703-ixp4xx-dts-v1-1-e5149da36f6e@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner SoC device tree changes for 6.11
This includes a commit shared with the clk tree. This commit adds clock
and reset indices to the device tree binding, and thus is needed for
both the device tree and driver changes.
ARM64 device tree and binding-only changes
- Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC
- Add cache information for A64, H6, and H616 SoCs
- Correct model names and descriptions for Pine64 boards
- Add GPADC (general purpose ADC) for H616 SoC
- Add ADC joysticks based on GPADC for anbernic-rg35xx-h board
- Add additional CPU OPPs for the H700 on top of existing H616 ones
- Enable DVFS for rg35xx boards
- Add IOMMU for H616 SoC
RISC-V device tree changes
- Add system LDOs to D1s/T113 SoC
- Add ClockworkPi and DevTerm device trees
* tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees
riscv: dts: allwinner: d1s-t113: Add system LDOs
arm64: dts: allwinner: h616: add IOMMU node
arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling
arm64: dts: allwinner: h616: add additional CPU OPPs for the H700
arm64: dts: allwinner: anbernic-rg35xx-h: Add ADC joysticks
arm64: dts: allwinner: h616: Add GPADC device node
dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
ARM: dts: sunxi: remove duplicated entries in makefile
arm64: dts: allwinner: Add cache information to the SoC dtsi for H616
arm64: dts: allwinner: Add cache information to the SoC dtsi for A64
arm64: dts: allwinner: Correct the model names for Pine64 boards
dt-bindings: arm: sunxi: Correct the descriptions for Pine64 boards
arm64: dts: allwinner: Add cache information to the SoC dtsi for H6
ARM: dts: sun50i: Add LRADC node
dt-bindings: input: sun4i-lradc-keys: Add H616 compatible
Link: https://lore.kernel.org/r/ZoQa8r1N8yi7FlPV@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree change for 6.11:
- New board support: imx8mm-iot-gateway, imx93-9x9-qsb, imx95-19x19-evk,
imx8mp-tqma8mpql-mba8mp-ras314, etc.
- A series from Adam Ford that improves imx8mp-beacon-kit support by
fixing dtschema issues and enabling HDMI bridge HPD
- A set of changes from Alexander Stein that adds partitions subnode
to spi-nor
- A great number of changes from Frank Li that add audio, flexcan, gpmi
related devices for imx8dxl, imx8qm based boards
- A bunch of layerscape dtschema issue fixes from Frank Li
- A series from Krzysztof Kozlowski to use defines for interrupts
- A number of improvements on i.MX8MP DHCOM devices from Marek Vasut
- A couple of changes from Parthiban Nallathambi that add PCIe PHY and
RS232/RS485 overlays for phygate-tauri-l board
- A series from Shengjiu Wang that adds bt-sco and XCVR sound card
support for imx8mp-evk
- A series from Tim Harvey that fixes dt-schema warnings and adds DP83867
configuration for i.MX8M Venice devices
- Other random feature additions and improvments on various boards
* tag 'imx-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (91 commits)
arm64: dts: imx8mp: Remove 'snps,rx-sched-sp'
arm64: dts: imx8mm-verdin: add TPM device
arm64: dts: imx8mp-evk: Add audio XCVR sound card
arm64: dts: imx8mp: Add audio XCVR device node
arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM rev.200
arm64: dts: imx8mp: Do not reconfigure Audio PLL2 on DH i.MX8M Plus DHCOM SoM
arm64: dts: layerscape: rename b(q)man-portals to b(q)man-portals-bus
arm64: dts: fsl-ls1046a: rename thermal node name
arm64: dts: fsl-ls1043a: remove unused clk-name at watchdog node
arm64: dts: layerscape: rename aux_bus to aux-bus
arm64: dts: layerscape: change pcie interrupt order
arm64: dts: layerscape: rename node name "wdt" to "watchdog"
arm64: dts: layerscape: add #dma-cells for qdma
arm64: dts: layerscape: remove compatible string 'fsl,fman-xmdio' for fman3
arm64: dts: layerscape: replace node name 'nor' with 'flash'
arm64: dts: fsl-ls1012a: remove property 'snps,host-vbus-glitches'
arm64: dts: fsl-lx2160a: fix #address-cells for pinctrl-single
arm64: dts: layerscape: add platform special compatible string for gpio
arm64: dts: layerscape: rename node 'timer' as 'rtc'
arm64: dts: imx8qxp-mek: Pass memory-region to the DSP node
...
Link: https://lore.kernel.org/r/20240702142153.413061-4-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX ARM device tree change for 6.11:
- A few changes from Krzysztof Kozlowski to fix dtschema issues
- A series from Michael Walle to improve kontron-samx6i SoM support by
fixing various errors and add kontron-samx6i-ads2 board
- Add LVDS port data mapping for M53 Menlo board
- Convert NVMEM usage to layout syntax on MBA6 boards
* tag 'imx-dt-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6qdl-kontron-samx6i: add actual device trees
ARM: dts: imx6qdl-kontron-samx6i: remove wake-up-gpio property
ARM: dts: imx6qdl-kontron-samx6i: fix PCIe reset polarity
ARM: dts: imx6qdl-kontron-samx6i: fix node names
ARM: dts: imx6qdl-kontron-samx6i: add SDIO_PWR_EN support
ARM: dts: imx6qdl-kontron-samx6i: always enable eMMC
ARM: dts: imx6qdl-kontron-samx6i: fix product name
ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects
ARM: dts: imx6qdl-kontron-samx6i: cleanup the PMIC node
ARM: dts: imx6qdl-kontron-samx6i: fix board reset
ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset
ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode
ARM: dts: nxp: imx6: convert NVMEM content to layout syntax
ARM: dts: e60k02: fix aliases for mmc
ARM: dts: imx: Add LVDS port data mapping on M53 Menlo
ARM: dts: imx28-tx28: drop redundant 'panel-name' property
ARM: dts: imx: drop redundant 'u-boot,panel-name' property
ARM: dts: imx6dl-aristainetos2_4: drop redundant 'power-on-delay' property
ARM: dts: imx: correct choice of panel native mode
ARM: dts: imx: align panel timings node name with dtschema
Link: https://lore.kernel.org/r/20240702142153.413061-3-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX DT bindings for 6.11:
- Add compatible string for various new boards
- Drop Li Yang as maintainer for bindings as his email bounces
* tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: document Kontron SMARC-sAMX6i boards
dt-bindings: arm: add MBa8MP-RAS314 SBC
dt-bindings: arm: fsl: add i.MX93 9x9 QSB board
dt-bindings: arm: fsl: add i.MX95 19x19 EVK board
dt-bindings: arm: fsl: Document Compulab IOT-GATE-iMX8
dt-bindings: Drop Li Yang as maintainer for all bindings
Link: https://lore.kernel.org/r/20240702142153.413061-2-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.11
Few cleanups and improvements which were missed by their maintainers:
1. Add Krzysztof as odd-fixer for old ARM platforms: Alphascale, AXM
LSI, Moxa, TI Nspire and VT8500 (with Alexey Charkov).
2. VT8500: align node names with bindings (USB, panel timings).
3. Cirrus: align node names with bindings (panel timings).
4. TI Nspire: correct unit addresses, correct watchdog compatible and
properties while making it disabled (never tested).
5. Nuvoton, Aspeed: align node names with bindings (I2C).
IMPORTANT: At least for Aspeed it is known to affect some user-space
tools, because that user-space looks for specific node path via
/sys/firmware/devicetree. The /sys/firmware/devicetree is not the ABI
and any user-space relying on it:
- Prevents any changes in DTS, e.g. node renaming or moving,
changing unit addresses (re-arranging child bus addressing).
- Is using undocumented interface.
- Is neither reliable nor understandable.
6. TI OMAP and Davinci: align node names with bindings (panel timings),
drop incorrect property.
7. STI: document in bindings codec child to fix dtbs_checks.
* tag 'dt-cleanup-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: omap am5729-beagleboneai: drop unneeded ti,enable-id-detection
dt-bindings: soc: sti: st,sti-syscon: document codec node
ARM: dts: ti: align panel timings node name with dtschema
arm: dts: aspeed: Use standard 'i2c' bus node name
arm: dts: nuvoton: Use standard 'i2c' bus node name
MAINTAINERS: ARM: alphascale: add Krzysztof Kozlowski as maintainer
ARM: dts: nspire: Add full compatible for watchdog node
ARM: dts: nspire: Add unit name addresses to memory nodes
MAINTAINERS: ARM: nspire: add Krzysztof Kozlowski as maintainer
MAINTAINERS: ARM: vt8500: add Alexey and Krzysztof as maintainers
MAINTAINERS: ARM: axm: add Krzysztof Kozlowski as maintainer
MAINTAINERS: ARM: moxa: add Krzysztof Kozlowski as maintainer
ARM: dts: cirrus: align panel timings node name with dtschema
ARM: dts: vt8500: align panel timings node name with dtschema
ARM: dts: vt8500: replace "uhci" nodename with generic name "usb"
Link: https://lore.kernel.org/r/20240702065359.7378-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.11
Few cleanups and improvements which were missed by their maintainers:
1. Spreadtrum: correct PMU nodes - split per clusters.
2. HiSilicon: add dedicated compatible to syscon node ("syscon" alone is
not allowed).
3. APM: add dedicated compatible to syscon node (binding applied to MFD
tree).
* tag 'dt64-cleanup-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
arm64: dts: apm: Add dedicated syscon poweroff compatibles
arm64: dts: hisilicon: hi3660: add dedicated hi3660-usb3-otg-bc compatible
dt-bindings: soc: hisilicon: document hi3660-usb3-otg-bc
arm64: dts: sprd: Split PMU nodes for heterogeneous CPUs
Link: https://lore.kernel.org/r/20240702065359.7378-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10
1. Google GS101: Minor cleanup and add fake regulators to USB phy, to
satisfy dtbs_check. The PMIC providing these regulators is not yet
implemented.
2. Exynos850: Add True Random Number Generator.
* tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos850: Enable TRNG
arm64: dts: exynos: gs101-oriole: add placeholder regulators for USB phy
arm64: dts: exynos: gs101: reorder properties as per guidelines
Link: https://lore.kernel.org/r/20240702063514.6215-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.11-rc1
This contains one patch that reworks the device tree structure for
Jetson Orin NX and Jetson Orin Nano, which are both within the same
family. This restructuring makes it easier to extend both platforms
in a consistent way in the future.
* tag 'tegra-for-6.11-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Restructure Orin NX/Nano device tree
Link: https://lore.kernel.org/r/20240628210818.3627404-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Describe power supplies for stm32mp257f-ev1 board.
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add SCMI regulators description on STM32MP25.
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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These bindings will be used for the SCMI voltage domain.
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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stm32mp13-pinctrl.dtsi contains nearly all pinctrl groups collected from
all boards. Most of them end up unused by a board and only waste binary
space. Add /omit-if-no-ref/ to the groups to scrub the unused groups
from the dtbs.
Use the following regex to update the file and drop two useless newlines too:
s@^\t[^:]\+: [^ ]\+ {$@\t/omit-if-no-ref/\r&@
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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ETHERNET2 instance is connected to Realtek PHY in RGMII mode
Ethernet is SNSP IP with GMAC5 version.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add pinctrl entry related to ETH2 in stm32mp25-pinctrl.dtsi
ethernet2: RGMII with crystal.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Both instances ethernet based on GMAC SNPS IP on stm32mp25.
GMAC IP version is SNPS 5.3
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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The High Performance Direct Memory Access (HPDMA) controller is used to
perform programmable data transfers between memory-mapped peripherals
and memories (or between memories) via linked-lists.
There are 3 instances of HPDMA on stm32mp251, using stm32-dma3 driver, with
16 channels per instance and with one interrupt per channel.
Channels 0 to 7 are implemented with a FIFO of 8 bytes.
Channels 8 to 11 are implemented with a FIFO of 32 bytes.
Channels 12 to 15 are implemented with a FIFO of 128 bytes.
Thanks to stm32-dma3 bindings, the user can ask for a channel with specific
FIFO size.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add ethernet support for the DH STM32MP13xx DHCOR DHSBC carrier board.
This carrier board is populated with two gigabit ethernet ports and two
Realtek RTL8211F PHYs, both are described in this DT patch.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Keep alphabetic order for pins definition nodes for a better read.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Ethernet1: RMII with crystal
Ethernet2: RMII with no cristal, need "phy-supply" property to work,
today this property was managed by Ethernet glue, but should be present
and managed in PHY node. So I will push second Ethernet in next step.
PHYs used are SMSC (LAN8742A)
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Those pins are used for Ethernet 1 and 2 on STM32MP13F-DK board.
ethernet1: RMII with crystal.
ethernet2: RMII without crystal.
Add analog gpio pin configuration ("sleep") to manage power mode on
stm32mp13.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Both instances ethernet based on GMAC SNPS IP on stm32mp13.
GMAC IP version is SNPS 4.20.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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To simplify identifying the pins where the PWM output is routed to,
add a comment to each PWM device about the respective pin on the
expansion connector.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Define the GIC interrupt (PPI 15) to be used on ST STM32MP15x boards
for OP-TEE async notif.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Without clock definition, SYSCFG will not work, EXTI interrupt for
port other than GPIOA will fail to operate.
Signed-off-by: Yanjun Yang <yangyj.ee@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on
STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC
carrier board.
The SoM contains the following peripherals:
- STPMIC (power delivery)
- 512MB DDR3L memory
- eMMC and SDIO WiFi module
The DHSBC carrier board contains the following peripherals:
- Two RGMII Ethernet ports
- USB-A Host port, USB-C peripheral port, USB-C power supply plug
- Expansion connector
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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and DHSBC board
Add new pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board.
The following pinmux nodes are added:
- ADC pins
- ADC CC pins
- ETH1 pins
- ETH2 pins
- I2C5 pins
- MCAN1 pins
- MCAN2 pins
- PWM13 pins
- PWM5 pins
- QSPI pins
- SAI1 pins
- SDMMC2 D4..D7 pins
- SPI2 pins
- SPI3 pins
- UART4 pins
- UART7 pins
- USART1 pins
- USART2 pins
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Reserve 576MiB of CMA as global CMA pool starting after initial 1GiB of
DDR.
AM62ax has different multimedia components such as Camera, Display, H.264
VPU and JPEG Encoder which use CMA for buffer allocations.
The 12x 720x480 realtime VPU decode use-case requires 544MiB of CMA,
additional 32MiB is kept as buffer in case some other peripheral also
require it while VPU is running.
The reason to choose latter 1GiB is to not overlap with existing memory map
which is utilizing initial 1GiB for remoteproc firmwares as shared here
[1].
Also some drivers such as JPEG require 32bit addressing so not allocating
from higher DDR address.
Link: https://lore.kernel.org/all/20240605124859.3034-5-hnagalla@ti.com [1]
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Tested-by: Brandon Brnich <b-brnich@ti.com>
Reviewed-by: Randolph Sapp <rs@ti.com>
Link: https://lore.kernel.org/r/20240613150902.2173582-3-devarsht@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Reserve 128MiB of global CMA which is also marked as re-usable
so that OS can also use the same if peripheral drivers are not using the
same.
AM62x supports multimedia components such as GPU, dual Display and Camera.
Assuming the worst-case scenario where all 3 are run in parallel below
is the calculation :
1) OV5640 camera sensor supports 1920x1080 resolution
-> 1920 width x 1080 height x 2 bytesperpixel x 8 buffers
(default in yavta) : 32MiB
2) 1920x1200 Microtips LVDS panel supported
-> 1920 width x 1080 height x 4 bytesperpixel x 2 buffers :
16 MiB
3) 1920x1080 HDMI display supported
-> 1920 width x 1080 height x 4 bytesperpixel x 2 buffers :
15.82 MiB which is ~16 MiB
4) IMG GPU shares with display allocated buffers while rendering
but in case some dedicated operation viz color conversion,
keeping same window of ~16 MiB for GPU too.
Total is 80 MiB and adding 32 MiB for other peripherals and extra
16 MiB to keep as buffer for fragmentation thus rounding total to 128
MiB.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Randolph Sapp <rs@ti.com>
Link: https://lore.kernel.org/r/20240613150902.2173582-2-devarsht@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Samsung Galaxy Grand 2 is a phone based on MSM8226. It's similar to the
other Samsung devices based on MSM8226 with only a few minor differences.
The device trees contain initial support with:
- GPIO keys
- Regulator haptic
- SDHCI (internal and external storage)
- UART (on USB connector via the TI TSU6721 MUIC)
- Regulators
- Touchscreen
- Accelerometer
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Reviewed-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240630132859.2885-3-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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According to nxp,dwmac-imx.yaml, 'snps,rx-sched-sp' is not a valid
property.
Remove it from the imx8mp board devicetree files to avoid
dt-schema warnings:
... 'snps,tx-sched-sp' does not match any of the regexes
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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There is no direct mapping between QFPROM children and parent/SoC MMIO
bus, so 'ranges' property is not correct. Pointed by dtbs_check:
qcom-apq8064-cm-qs600.dtb: efuse@700000: Unevaluated properties are not allowed ('ranges' was unexpected)
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406292139.yqPYyUfi-lkp@intel.com/
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240701062253.18149-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Fix the following warnings when compiling dtbs with W=1:
../arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi:343.10-353.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/tps6598x@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62-main.dtsi:633.22-643.5: Warning (graph_child_address): /bus@f0000/dwc3-usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Tested-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240626101520.1782320-3-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Fix the following warnings that are thrown when building dtbs with W=1:
../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:367.10-376.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/usb-power-controller@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi:647.22-657.5: Warning (graph_child_address): /bus@f0000/usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
also defined at ../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:517.7-528.3
Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240626101520.1782320-2-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The AM67A/J722S/TDA4AEN platform is a derivative of AM62P platform
and we have no single 1:1 relation regarding index of GPIO and pin
controller. The GPIOs and pin controller registers have mapping and
holes in the map. These have been extracted from the J722S data
sheet. The MCU mapping is carried forward as is with J722S, however the
main GPIO block has differences that needs to be accounted for.
Mux mode input is selected as it is bi-directional. In case a specific
pull type or a specific pin level drive setting is desired, the board
device tree files will have to explicitly mux those pins for the GPIO
with the desired setting.
Ref: J722S Data sheet https://www.ti.com/lit/gpn/tda4aen-q1
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20240627162539.691223-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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On the AM62P platform we have no single 1:1 relation regarding index
of GPIO and pin controller. The GPIOs and pin controller registers
have mapping and holes in the map. These have been extracted from the
AM62P data sheet.
MCU pinctrl definition is shared as it is common between AM62P and
J722S, but that is not the case for main domain.
Ref: AM62P Data sheet https://www.ti.com/lit/gpn/am62p
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20240627162539.691223-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Introduce a GPIO mux mode macro for easier readability. All K3 devices
use mux mode 7 to switch to GPIO mux and this allows the gpio-ranges to
be defined for pinctrl-single clearly.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20240627162539.691223-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The WKUP system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-8-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The WKUP system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-7-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-6-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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|
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-5-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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|
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-4-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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|
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-3-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
|
|
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-2-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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NAND boot would require these nodes to be present at early stage.
Ensure that by adding "bootph-all" to relevant nodes.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240628-am642-evm-nand-bootph-v2-1-387bfa1533a6@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC.
It can be used in combination with different carrier boards.
This module can come with different sizes and models for
DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family.
A development Kit, called phyBOARD-Lyra [2] is used as a carrier board
reference design with a mapper board being used to allow the phyCORE-AM62Ax
to fit the phyBOARD-Lyra.
Supported features:
* Debug UART
* SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* GPIO Expander
* LEDs
* USB
* HDMI
* USB-C
* Audio
For more details, see:
[1] Product page SoM: https://www.phytec.com/product/phycore-am62a
[2] Product page CB: https://www.phytec.com/product/phyboard-am62a
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240626155244.3311436-4-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add devicetree bindings for AM62Ax based phyCORE-AM62A7 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626155244.3311436-3-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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