diff options
Diffstat (limited to 'drivers/video')
150 files changed, 3791 insertions, 3031 deletions
diff --git a/drivers/video/68328fb.c b/drivers/video/68328fb.c index fa44fbed397d..552258c8f99d 100644 --- a/drivers/video/68328fb.c +++ b/drivers/video/68328fb.c @@ -478,11 +478,10 @@ int __init mc68x328fb_init(void) return -EINVAL; } - printk(KERN_INFO - "fb%d: %s frame buffer device\n", fb_info.node, fb_info.fix.id); - printk(KERN_INFO - "fb%d: %dx%dx%d at 0x%08lx\n", fb_info.node, - mc68x328fb_default.xres_virtual, mc68x328fb_default.yres_virtual, + fb_info(&fb_info, "%s frame buffer device\n", fb_info.fix.id); + fb_info(&fb_info, "%dx%dx%d at 0x%08lx\n", + mc68x328fb_default.xres_virtual, + mc68x328fb_default.yres_virtual, 1 << mc68x328fb_default.bits_per_pixel, videomemory); return 0; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 84b685f7ab6e..14317b70b413 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -996,6 +996,8 @@ config FB_ATMEL select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT + select FB_MODE_HELPERS + select VIDEOMODE_HELPERS help This enables support for the AT91/AT32 LCD Controller. diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c index afe4702a5528..14d6b3793e0a 100644 --- a/drivers/video/amba-clcd.c +++ b/drivers/video/amba-clcd.c @@ -545,7 +545,7 @@ static int clcdfb_register(struct clcd_fb *fb) static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id) { - struct clcd_board *board = dev->dev.platform_data; + struct clcd_board *board = dev_get_platdata(&dev->dev); struct clcd_fb *fb; int ret; @@ -599,8 +599,6 @@ static int clcdfb_remove(struct amba_device *dev) { struct clcd_fb *fb = amba_get_drvdata(dev); - amba_set_drvdata(dev, NULL); - clcdfb_disable(fb); unregister_framebuffer(&fb->fb); if (fb->fb.cmap.len) diff --git a/drivers/video/amifb.c b/drivers/video/amifb.c index a6780eecff0e..0dac36ce09d6 100644 --- a/drivers/video/amifb.c +++ b/drivers/video/amifb.c @@ -3742,13 +3742,12 @@ default_chipset: if (err) goto unset_drvdata; - printk("fb%d: %s frame buffer device, using %dK of video memory\n", - info->node, info->fix.id, info->fix.smem_len>>10); + fb_info(info, "%s frame buffer device, using %dK of video memory\n", + info->fix.id, info->fix.smem_len>>10); return 0; unset_drvdata: - dev_set_drvdata(&pdev->dev, NULL); fb_dealloc_cmap(&info->cmap); free_irq: free_irq(IRQ_AMIGA_COPPER, info->par); @@ -3768,7 +3767,6 @@ static int __exit amifb_remove(struct platform_device *pdev) struct fb_info *info = dev_get_drvdata(&pdev->dev); unregister_framebuffer(info); - dev_set_drvdata(&pdev->dev, NULL); fb_dealloc_cmap(&info->cmap); free_irq(IRQ_AMIGA_COPPER, info->par); custom.dmacon = DMAF_ALL | DMAF_MASTER; diff --git a/drivers/video/arcfb.c b/drivers/video/arcfb.c index e43401afdd03..1b0b233b8b39 100644 --- a/drivers/video/arcfb.c +++ b/drivers/video/arcfb.c @@ -556,9 +556,8 @@ static int arcfb_probe(struct platform_device *dev) goto err1; } } - printk(KERN_INFO - "fb%d: Arc frame buffer device, using %dK of video memory\n", - info->node, videomemorysize >> 10); + fb_info(info, "Arc frame buffer device, using %dK of video memory\n", + videomemorysize >> 10); /* this inits the lcd but doesn't clear dirty pixels */ for (i = 0; i < num_cols * num_rows; i++) { @@ -572,8 +571,7 @@ static int arcfb_probe(struct platform_device *dev) /* if we were told to splash the screen, we just clear it */ if (!nosplash) { for (i = 0; i < num_cols * num_rows; i++) { - printk(KERN_INFO "fb%d: splashing lcd %d\n", - info->node, i); + fb_info(info, "splashing lcd %d\n", i); ks108_set_start_line(par, i, 0); ks108_clear_lcd(par, i); } diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 94a51f1ef904..a6b29bd4a12a 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -137,8 +137,7 @@ static void arkfb_settile(struct fb_info *info, struct fb_tilemap *map) if ((map->width != 8) || (map->height != 16) || (map->depth != 1) || (map->length != 256)) { - printk(KERN_ERR "fb%d: unsupported font parameters: width %d, " - "height %d, depth %d, length %d\n", info->node, + fb_err(info, "unsupported font parameters: width %d, height %d, depth %d, length %d\n", map->width, map->height, map->depth, map->length); return; } @@ -517,7 +516,7 @@ static void ark_set_pixclock(struct fb_info *info, u32 pixclock) int rv = dac_set_freq(par->dac, 0, 1000000000 / pixclock); if (rv < 0) { - printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); + fb_err(info, "cannot set requested pixclock, keeping old value\n"); return; } @@ -584,7 +583,7 @@ static int arkfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) rv = svga_match_format (arkfb_formats, var, NULL); if (rv < 0) { - printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); + fb_err(info, "unsupported mode requested\n"); return rv; } @@ -604,14 +603,15 @@ static int arkfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; if (mem > info->screen_size) { - printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); + fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n", + mem >> 10, (unsigned int) (info->screen_size >> 10)); return -EINVAL; } rv = svga_check_timings (&ark_timing_regs, var, info->node); if (rv < 0) { - printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); + fb_err(info, "invalid timings requested\n"); return rv; } @@ -693,7 +693,7 @@ static int arkfb_set_par(struct fb_info *info) vga_wseq(par->state.vgabase, 0x18, regval); /* Set the offset register */ - pr_debug("fb%d: offset register : %d\n", info->node, offset_value); + fb_dbg(info, "offset register : %d\n", offset_value); svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); /* fix for hi-res textmode */ @@ -716,7 +716,7 @@ static int arkfb_set_par(struct fb_info *info) /* Set mode-specific register values */ switch (mode) { case 0: - pr_debug("fb%d: text mode\n", info->node); + fb_dbg(info, "text mode\n"); svga_set_textmode_vga_regs(par->state.vgabase); vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ @@ -725,7 +725,7 @@ static int arkfb_set_par(struct fb_info *info) break; case 1: - pr_debug("fb%d: 4 bit pseudocolor\n", info->node); + fb_dbg(info, "4 bit pseudocolor\n"); vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ @@ -733,44 +733,44 @@ static int arkfb_set_par(struct fb_info *info) dac_set_mode(par->dac, DAC_PSEUDO8_8); break; case 2: - pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); + fb_dbg(info, "4 bit pseudocolor, planar\n"); vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_8); break; case 3: - pr_debug("fb%d: 8 bit pseudocolor\n", info->node); + fb_dbg(info, "8 bit pseudocolor\n"); vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode */ if (info->var.pixclock > 20000) { - pr_debug("fb%d: not using multiplex\n", info->node); + fb_dbg(info, "not using multiplex\n"); svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_8); } else { - pr_debug("fb%d: using multiplex\n", info->node); + fb_dbg(info, "using multiplex\n"); svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_16); hdiv = 2; } break; case 4: - pr_debug("fb%d: 5/5/5 truecolor\n", info->node); + fb_dbg(info, "5/5/5 truecolor\n"); vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_RGB1555_16); break; case 5: - pr_debug("fb%d: 5/6/5 truecolor\n", info->node); + fb_dbg(info, "5/6/5 truecolor\n"); vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_RGB0565_16); break; case 6: - pr_debug("fb%d: 8/8/8 truecolor\n", info->node); + fb_dbg(info, "8/8/8 truecolor\n"); vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode ??? */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ @@ -779,7 +779,7 @@ static int arkfb_set_par(struct fb_info *info) hdiv = 2; break; case 7: - pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); + fb_dbg(info, "8/8/8/8 truecolor\n"); vga_wseq(par->state.vgabase, 0x11, 0x1E); /* 32bpp accel mode */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ @@ -787,7 +787,7 @@ static int arkfb_set_par(struct fb_info *info) hmul = 2; break; default: - printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node); + fb_err(info, "unsupported mode - bug\n"); return -EINVAL; } @@ -879,19 +879,19 @@ static int arkfb_blank(int blank_mode, struct fb_info *info) switch (blank_mode) { case FB_BLANK_UNBLANK: - pr_debug("fb%d: unblank\n", info->node); + fb_dbg(info, "unblank\n"); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); break; case FB_BLANK_NORMAL: - pr_debug("fb%d: blank\n", info->node); + fb_dbg(info, "blank\n"); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); break; case FB_BLANK_POWERDOWN: case FB_BLANK_HSYNC_SUSPEND: case FB_BLANK_VSYNC_SUSPEND: - pr_debug("fb%d: sync down\n", info->node); + fb_dbg(info, "sync down\n"); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); break; @@ -1048,12 +1048,12 @@ static int ark_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) rc = register_framebuffer(info); if (rc < 0) { - dev_err(info->device, "cannot register framebugger\n"); + dev_err(info->device, "cannot register framebuffer\n"); goto err_reg_fb; } - printk(KERN_INFO "fb%d: %s on %s, %d MB RAM\n", info->node, info->fix.id, - pci_name(dev), info->fix.smem_len >> 20); + fb_info(info, "%s on %s, %d MB RAM\n", + info->fix.id, pci_name(dev), info->fix.smem_len >> 20); /* Record a reference to the driver data */ pci_set_drvdata(dev, info); @@ -1108,7 +1108,6 @@ static void ark_pci_remove(struct pci_dev *dev) pci_release_regions(dev); /* pci_disable_device(dev); */ - pci_set_drvdata(dev, NULL); framebuffer_release(info); } } diff --git a/drivers/video/asiliantfb.c b/drivers/video/asiliantfb.c index d5a37d62847b..d611f1a1ac53 100644 --- a/drivers/video/asiliantfb.c +++ b/drivers/video/asiliantfb.c @@ -527,8 +527,8 @@ static int init_asiliant(struct fb_info *p, unsigned long addr) return err; } - printk(KERN_INFO "fb%d: Asiliant 69000 frame buffer (%dK RAM detected)\n", - p->node, p->fix.smem_len / 1024); + fb_info(p, "Asiliant 69000 frame buffer (%dK RAM detected)\n", + p->fix.smem_len / 1024); writeb(0xff, mmio_base + 0x78c); chips_hw_init(p); diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c index 64e41f5448c4..e21d1f58554c 100644 --- a/drivers/video/atafb.c +++ b/drivers/video/atafb.c @@ -3246,11 +3246,8 @@ int __init atafb_init(void) return -EINVAL; } - // FIXME: mode needs setting! - //printk("fb%d: %s frame buffer device, using %dK of video memory\n", - // fb_info.node, fb_info.mode->name, screen_len>>10); - printk("fb%d: frame buffer device, using %dK of video memory\n", - fb_info.node, screen_len >> 10); + fb_info(&fb_info, "frame buffer device, using %dK of video memory\n", + screen_len >> 10); /* TODO: This driver cannot be unloaded yet */ return 0; diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 088511a58a26..8521051cf946 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -20,12 +20,55 @@ #include <linux/gfp.h> #include <linux/module.h> #include <linux/platform_data/atmel.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_gpio.h> +#include <video/of_display_timing.h> +#include <video/videomode.h> #include <mach/cpu.h> #include <asm/gpio.h> #include <video/atmel_lcdc.h> +struct atmel_lcdfb_config { + bool have_alt_pixclock; + bool have_hozval; + bool have_intensity_bit; +}; + + /* LCD Controller info data structure, stored in device platform_data */ +struct atmel_lcdfb_info { + spinlock_t lock; + struct fb_info *info; + void __iomem *mmio; + int irq_base; + struct work_struct task; + + unsigned int smem_len; + struct platform_device *pdev; + struct clk *bus_clk; + struct clk *lcdc_clk; + + struct backlight_device *backlight; + u8 bl_power; + u8 saved_lcdcon; + + u32 pseudo_palette[16]; + bool have_intensity_bit; + + struct atmel_lcdfb_pdata pdata; + + struct atmel_lcdfb_config *config; +}; + +struct atmel_lcdfb_power_ctrl_gpio { + int gpio; + int active_low; + + struct list_head list; +}; + #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) @@ -34,12 +77,6 @@ #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */ #define ATMEL_LCDC_FIFO_SIZE 512 /* words */ -struct atmel_lcdfb_config { - bool have_alt_pixclock; - bool have_hozval; - bool have_intensity_bit; -}; - static struct atmel_lcdfb_config at91sam9261_config = { .have_hozval = true, .have_intensity_bit = true, @@ -248,18 +285,27 @@ static void exit_backlight(struct atmel_lcdfb_info *sinfo) static void init_contrast(struct atmel_lcdfb_info *sinfo) { + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; + /* contrast pwm can be 'inverted' */ - if (sinfo->lcdcon_pol_negative) + if (pdata->lcdcon_pol_negative) contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE); /* have some default contrast/backlight settings */ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); - if (sinfo->lcdcon_is_backlight) + if (pdata->lcdcon_is_backlight) init_backlight(sinfo); } +static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on) +{ + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; + + if (pdata->atmel_lcdfb_power_control) + pdata->atmel_lcdfb_power_control(pdata, on); +} static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { .type = FB_TYPE_PACKED_PIXELS, @@ -299,9 +345,11 @@ static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo, static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo) { + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; + /* Turn off the LCD controller and the DMA controller */ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, - sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET); + pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET); /* Wait for the LCDC core to become idle */ while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) @@ -321,9 +369,11 @@ static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo) static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo) { - lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon); + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; + + lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon); lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, - (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) + (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR); } @@ -424,6 +474,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, { struct device *dev = info->device; struct atmel_lcdfb_info *sinfo = info->par; + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; unsigned long clk_value_khz; clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; @@ -510,7 +561,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, else var->green.length = 6; - if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { + if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { /* RGB:5X5 mode */ var->red.offset = var->green.length + 5; var->blue.offset = 0; @@ -527,7 +578,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, var->transp.length = 8; /* fall through */ case 24: - if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { + if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { /* RGB:888 mode */ var->red.offset = 16; var->blue.offset = 0; @@ -576,6 +627,7 @@ static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo) static int atmel_lcdfb_set_par(struct fb_info *info) { struct atmel_lcdfb_info *sinfo = info->par; + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; unsigned long hozval_linesz; unsigned long value; unsigned long clk_value_khz; @@ -637,7 +689,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) /* Initialize control register 2 */ - value = sinfo->default_lcdcon2; + value = pdata->default_lcdcon2; if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) value |= ATMEL_LCDC_INVLINE_INVERTED; @@ -741,6 +793,7 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int transp, struct fb_info *info) { struct atmel_lcdfb_info *sinfo = info->par; + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; unsigned int val; u32 *pal; int ret = 1; @@ -777,8 +830,7 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, */ } else { /* new style BGR:565 / RGB:565 */ - if (sinfo->lcd_wiring_mode == - ATMEL_LCDC_WIRING_RGB) { + if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { val = ((blue >> 11) & 0x001f); val |= ((red >> 0) & 0xf800); } else { @@ -912,16 +964,187 @@ static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) clk_disable_unprepare(sinfo->lcdc_clk); } +#ifdef CONFIG_OF +static const struct of_device_id atmel_lcdfb_dt_ids[] = { + { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, }, + { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, }, + { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, }, + { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, }, + { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, }, + { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, }, + { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids); + +static const char *atmel_lcdfb_wiring_modes[] = { + [ATMEL_LCDC_WIRING_BGR] = "BRG", + [ATMEL_LCDC_WIRING_RGB] = "RGB", +}; + +const int atmel_lcdfb_get_of_wiring_modes(struct device_node *np) +{ + const char *mode; + int err, i; + + err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode); + if (err < 0) + return ATMEL_LCDC_WIRING_BGR; + + for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++) + if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i])) + return i; + + return -ENODEV; +} + +static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on) +{ + struct atmel_lcdfb_power_ctrl_gpio *og; + + list_for_each_entry(og, &pdata->pwr_gpios, list) + gpio_set_value(og->gpio, on); +} + +static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) +{ + struct fb_info *info = sinfo->info; + struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; + struct fb_var_screeninfo *var = &info->var; + struct device *dev = &sinfo->pdev->dev; + struct device_node *np =dev->of_node; + struct device_node *display_np; + struct device_node *timings_np; + struct display_timings *timings; + enum of_gpio_flags flags; + struct atmel_lcdfb_power_ctrl_gpio *og; + bool is_gpio_power = false; + int ret = -ENOENT; + int i, gpio; + + sinfo->config = (struct atmel_lcdfb_config*) + of_match_device(atmel_lcdfb_dt_ids, dev)->data; + + display_np = of_parse_phandle(np, "display", 0); + if (!display_np) { + dev_err(dev, "failed to find display phandle\n"); + return -ENOENT; + } + + ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel); + if (ret < 0) { + dev_err(dev, "failed to get property bits-per-pixel\n"); + goto put_display_node; + } + + ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time); + if (ret < 0) { + dev_err(dev, "failed to get property atmel,guard-time\n"); + goto put_display_node; + } + + ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2); + if (ret < 0) { + dev_err(dev, "failed to get property atmel,lcdcon2\n"); + goto put_display_node; + } + + ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon); + if (ret < 0) { + dev_err(dev, "failed to get property bits-per-pixel\n"); + goto put_display_node; + } + + ret = -ENOMEM; + for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) { + gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio", + i, &flags); + if (gpio < 0) + continue; + + og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL); + if (!og) + goto put_display_node; + + og->gpio = gpio; + og->active_low = flags & OF_GPIO_ACTIVE_LOW; + is_gpio_power = true; + ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio"); + if (ret) { + dev_err(dev, "request gpio %d failed\n", gpio); + goto put_display_node; + } + + ret = gpio_direction_output(gpio, og->active_low); + if (ret) { + dev_err(dev, "set direction output gpio %d failed\n", gpio); + goto put_display_node; + } + } + + if (is_gpio_power) + pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio; + + ret = atmel_lcdfb_get_of_wiring_modes(display_np); + if (ret < 0) { + dev_err(dev, "invalid atmel,lcd-wiring-mode\n"); + goto put_display_node; + } + pdata->lcd_wiring_mode = ret; + + pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight"); + + timings = of_get_display_timings(display_np); + if (!timings) { + dev_err(dev, "failed to get display timings\n"); + goto put_display_node; + } + + timings_np = of_find_node_by_name(display_np, "display-timings"); + if (!timings_np) { + dev_err(dev, "failed to find display-timings node\n"); + goto put_display_node; + } + + for (i = 0; i < of_get_child_count(timings_np); i++) { + struct videomode vm; + struct fb_videomode fb_vm; + + ret = videomode_from_timings(timings, &vm, i); + if (ret < 0) + goto put_timings_node; + ret = fb_videomode_from_videomode(&vm, &fb_vm); + if (ret < 0) + goto put_timings_node; + + fb_add_videomode(&fb_vm, &info->modelist); + } + + return 0; + +put_timings_node: + of_node_put(timings_np); +put_display_node: + of_node_put(display_np); + return ret; +} +#else +static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) +{ + return 0; +} +#endif static int __init atmel_lcdfb_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct fb_info *info; struct atmel_lcdfb_info *sinfo; - struct atmel_lcdfb_info *pdata_sinfo; - struct fb_videomode fbmode; + struct atmel_lcdfb_pdata *pdata = NULL; struct resource *regs = NULL; struct resource *map = NULL; + struct fb_modelist *modelist; int ret; dev_dbg(dev, "%s BEGIN\n", __func__); @@ -934,26 +1157,35 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) } sinfo = info->par; + sinfo->pdev = pdev; + sinfo->info = info; + + INIT_LIST_HEAD(&info->modelist); - if (dev->platform_data) { - pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data; - sinfo->default_bpp = pdata_sinfo->default_bpp; - sinfo->default_dmacon = pdata_sinfo->default_dmacon; - sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2; - sinfo->default_monspecs = pdata_sinfo->default_monspecs; - sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control; - sinfo->guard_time = pdata_sinfo->guard_time; - sinfo->smem_len = pdata_sinfo->smem_len; - sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight; - sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative; - sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode; + if (pdev->dev.of_node) { + ret = atmel_lcdfb_of_init(sinfo); + if (ret) + goto free_info; + } else if (dev_get_platdata(dev)) { + struct fb_monspecs *monspecs; + int i; + + pdata = dev_get_platdata(dev); + monspecs = pdata->default_monspecs; + sinfo->pdata = *pdata; + + for (i = 0; i < monspecs->modedb_len; i++) + fb_add_videomode(&monspecs->modedb[i], &info->modelist); + + sinfo->config = atmel_lcdfb_get_config(pdev); + + info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16; + memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs)); } else { dev_err(dev, "cannot get default configuration\n"); goto free_info; } - sinfo->info = info; - sinfo->pdev = pdev; - sinfo->config = atmel_lcdfb_get_config(pdev); + if (!sinfo->config) goto free_info; @@ -962,7 +1194,6 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) info->pseudo_palette = sinfo->pseudo_palette; info->fbops = &atmel_lcdfb_ops; - memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs)); info->fix = atmel_lcdfb_fix; /* Enable LCDC Clocks */ @@ -978,14 +1209,11 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) } atmel_lcdfb_start_clock(sinfo); - ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb, - info->monspecs.modedb_len, info->monspecs.modedb, - sinfo->default_bpp); - if (!ret) { - dev_err(dev, "no suitable video mode found\n"); - goto stop_clk; - } + modelist = list_first_entry(&info->modelist, + struct fb_modelist, list); + fb_videomode_to_var(&info->var, &modelist->mode); + atmel_lcdfb_check_var(&info->var, info); regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!regs) { @@ -1069,18 +1297,6 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) goto unregister_irqs; } - /* - * This makes sure that our colour bitfield - * descriptors are correctly initialised. - */ - atmel_lcdfb_check_var(&info->var, info); - - ret = fb_set_var(info, &info->var); - if (ret) { - dev_warn(dev, "unable to set display parameters\n"); - goto free_cmap; - } - dev_set_drvdata(dev, info); /* @@ -1092,13 +1308,8 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) goto reset_drvdata; } - /* add selected videomode to modelist */ - fb_var_to_videomode(&fbmode, &info->var); - fb_add_videomode(&fbmode, &info->modelist); - /* Power up the LCDC screen */ - if (sinfo->atmel_lcdfb_power_control) - sinfo->atmel_lcdfb_power_control(1); + atmel_lcdfb_power_control(sinfo, 1); dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n", info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); @@ -1107,7 +1318,6 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) reset_drvdata: dev_set_drvdata(dev, NULL); -free_cmap: fb_dealloc_cmap(&info->cmap); unregister_irqs: cancel_work_sync(&sinfo->task); @@ -1143,15 +1353,16 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev) struct device *dev = &pdev->dev; struct fb_info *info = dev_get_drvdata(dev); struct atmel_lcdfb_info *sinfo; + struct atmel_lcdfb_pdata *pdata; if (!info || !info->par) return 0; sinfo = info->par; + pdata = &sinfo->pdata; cancel_work_sync(&sinfo->task); exit_backlight(sinfo); - if (sinfo->atmel_lcdfb_power_control) - sinfo->atmel_lcdfb_power_control(0); + atmel_lcdfb_power_control(sinfo, 0); unregister_framebuffer(info); atmel_lcdfb_stop_clock(sinfo); clk_put(sinfo->lcdc_clk); @@ -1167,7 +1378,6 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev) atmel_lcdfb_free_video_memory(sinfo); } - dev_set_drvdata(dev, NULL); framebuffer_release(info); return 0; @@ -1188,9 +1398,7 @@ static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); - if (sinfo->atmel_lcdfb_power_control) - sinfo->atmel_lcdfb_power_control(0); - + atmel_lcdfb_power_control(sinfo, 0); atmel_lcdfb_stop(sinfo); atmel_lcdfb_stop_clock(sinfo); @@ -1204,8 +1412,7 @@ static int atmel_lcdfb_resume(struct platform_device *pdev) atmel_lcdfb_start_clock(sinfo); atmel_lcdfb_start(sinfo); - if (sinfo->atmel_lcdfb_power_control) - sinfo->atmel_lcdfb_power_control(1); + atmel_lcdfb_power_control(sinfo, 1); lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); /* Enable FIFO & DMA errors */ @@ -1228,6 +1435,7 @@ static struct platform_driver atmel_lcdfb_driver = { .driver = { .name = "atmel_lcdfb", .owner = THIS_MODULE, + .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids), }, }; diff --git a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c index a4dfe8cb0a0a..12ca031877d4 100644 --- a/drivers/video/aty/aty128fb.c +++ b/drivers/video/aty/aty128fb.c @@ -413,7 +413,6 @@ struct aty128fb_par { int blitter_may_be_busy; int fifo_slots; /* free slots in FIFO (64 max) */ - int pm_reg; int crt_on, lcd_on; struct pci_dev *pdev; struct fb_info *next; @@ -2016,7 +2015,6 @@ static int aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent) aty128_init_engine(par); - par->pm_reg = pdev->pm_cap; par->pdev = pdev; par->asleep = 0; par->lock_blank = 0; @@ -2029,8 +2027,8 @@ static int aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent) if (register_framebuffer(info) < 0) return 0; - printk(KERN_INFO "fb%d: %s frame buffer device on %s\n", - info->node, info->fix.id, video_card); + fb_info(info, "%s frame buffer device on %s\n", + info->fix.id, video_card); return 1; /* success! */ } @@ -2397,7 +2395,7 @@ static void aty128_set_suspend(struct aty128fb_par *par, int suspend) u32 pmgt; struct pci_dev *pdev = par->pdev; - if (!par->pm_reg) + if (!par->pdev->pm_cap) return; /* Set the chip into the appropriate suspend mode (we use D2, diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c index 9b0f12c5c284..28fafbf864a5 100644 --- a/drivers/video/aty/atyfb_base.c +++ b/drivers/video/aty/atyfb_base.c @@ -1848,7 +1848,6 @@ static int atyfb_ioctl(struct fb_info *info, u_int cmd, u_long arg) return aty_waitforvblank(par, crtc); } - break; #if defined(DEBUG) && defined(CONFIG_FB_ATY_CT) case ATYIO_CLKR: diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c index 1e30b2b3e79f..26d80a4486fb 100644 --- a/drivers/video/aty/radeon_base.c +++ b/drivers/video/aty/radeon_base.c @@ -819,11 +819,6 @@ static int radeonfb_check_var (struct fb_var_screeninfo *var, struct fb_info *in if (v.xres_virtual < v.xres) v.xres = v.xres_virtual; - if (v.xoffset < 0) - v.xoffset = 0; - if (v.yoffset < 0) - v.yoffset = 0; - if (v.xoffset > v.xres_virtual - v.xres) v.xoffset = v.xres_virtual - v.xres - 1; diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c index f7091ece580d..46a12f1a93c3 100644 --- a/drivers/video/aty/radeon_pm.c +++ b/drivers/video/aty/radeon_pm.c @@ -1427,6 +1427,8 @@ static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo) mdelay( 15); } +#if defined(CONFIG_PM) +#if defined(CONFIG_X86) || defined(CONFIG_PPC_PMAC) static void radeon_pm_reset_pad_ctlr_strength(struct radeonfb_info *rinfo) { u32 tmp, tmp2; @@ -1939,9 +1941,10 @@ static void radeon_reinitialize_M10(struct radeonfb_info *rinfo) */ radeon_pm_m10_enable_lvds_spread_spectrum(rinfo); } +#endif #ifdef CONFIG_PPC_OF - +#ifdef CONFIG_PPC_PMAC static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo) { OUTREG(MC_CNTL, rinfo->save_regs[46]); @@ -2202,6 +2205,8 @@ static void radeon_reinitialize_M9P(struct radeonfb_info *rinfo) radeon_pm_restore_pixel_pll(rinfo); radeon_pm_m10_enable_lvds_spread_spectrum(rinfo); } +#endif +#endif #if 0 /* Not ready yet */ static void radeon_reinitialize_QW(struct radeonfb_info *rinfo) @@ -2515,13 +2520,13 @@ static void radeonfb_whack_power_state(struct radeonfb_info *rinfo, pci_power_t for (;;) { pci_read_config_word(rinfo->pdev, - rinfo->pm_reg+PCI_PM_CTRL, + rinfo->pdev->pm_cap + PCI_PM_CTRL, &pwr_cmd); - if (pwr_cmd & 2) + if (pwr_cmd & state) break; - pwr_cmd = (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | 2; + pwr_cmd = (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | state; pci_write_config_word(rinfo->pdev, - rinfo->pm_reg+PCI_PM_CTRL, + rinfo->pdev->pm_cap + PCI_PM_CTRL, pwr_cmd); msleep(500); } @@ -2532,7 +2537,7 @@ static void radeon_set_suspend(struct radeonfb_info *rinfo, int suspend) { u32 tmp; - if (!rinfo->pm_reg) + if (!rinfo->pdev->pm_cap) return; /* Set the chip into appropriate suspend mode (we use D2, @@ -2804,9 +2809,6 @@ static void radeonfb_early_resume(void *data) void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk, int ignore_devlist, int force_sleep) { - /* Find PM registers in config space if any*/ - rinfo->pm_reg = rinfo->pdev->pm_cap; - /* Enable/Disable dynamic clocks: TODO add sysfs access */ if (rinfo->family == CHIP_FAMILY_RS480) rinfo->dynclk = -1; @@ -2830,7 +2832,7 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk, int ignore_devlis * reason. --BenH */ if (machine_is(powermac) && rinfo->of_node) { - if (rinfo->is_mobility && rinfo->pm_reg && + if (rinfo->is_mobility && rinfo->pdev->pm_cap && rinfo->family <= CHIP_FAMILY_RV250) rinfo->pm_mode |= radeon_pm_d2; diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h index 7351e66c7f54..cb846044f57c 100644 --- a/drivers/video/aty/radeonfb.h +++ b/drivers/video/aty/radeonfb.h @@ -342,7 +342,6 @@ struct radeonfb_info { int mtrr_hdl; - int pm_reg; u32 save_regs[100]; int asleep; int lock_blank; diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index 22ad85242e5b..372d4aea9d1c 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -564,7 +564,7 @@ int au1100fb_drv_remove(struct platform_device *dev) if (!dev) return -ENODEV; - fbdev = (struct au1100fb_device *) platform_get_drvdata(dev); + fbdev = platform_get_drvdata(dev); #if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO) au1100fb_fb_blank(VESA_POWERDOWN, &fbdev->info); @@ -636,19 +636,7 @@ static struct platform_driver au1100fb_driver = { .suspend = au1100fb_drv_suspend, .resume = au1100fb_drv_resume, }; - -static int __init au1100fb_load(void) -{ - return platform_driver_register(&au1100fb_driver); -} - -static void __exit au1100fb_unload(void) -{ - platform_driver_unregister(&au1100fb_driver); -} - -module_init(au1100fb_load); -module_exit(au1100fb_unload); +module_platform_driver(au1100fb_driver); MODULE_DESCRIPTION(DRIVER_DESC); MODULE_LICENSE("GPL"); diff --git a/drivers/video/au1200fb.c b/drivers/video/au1200fb.c index 1d02897d17f2..4cfba78a1458 100644 --- a/drivers/video/au1200fb.c +++ b/drivers/video/au1200fb.c @@ -1853,21 +1853,7 @@ static struct platform_driver au1200fb_driver = { .probe = au1200fb_drv_probe, .remove = au1200fb_drv_remove, }; - -/*-------------------------------------------------------------------------*/ - -static int __init au1200fb_init(void) -{ - return platform_driver_register(&au1200fb_driver); -} - -static void __exit au1200fb_cleanup(void) -{ - platform_driver_unregister(&au1200fb_driver); -} - -module_init(au1200fb_init); -module_exit(au1200fb_cleanup); +module_platform_driver(au1200fb_driver); MODULE_DESCRIPTION(DRIVER_DESC); MODULE_LICENSE("GPL"); diff --git a/drivers/video/backlight/l4f00242t03.c b/drivers/video/backlight/l4f00242t03.c index 923eae2f85f8..b5fc13bc24e7 100644 --- a/drivers/video/backlight/l4f00242t03.c +++ b/drivers/video/backlight/l4f00242t03.c @@ -244,7 +244,6 @@ static int l4f00242t03_remove(struct spi_device *spi) l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_POWERDOWN); lcd_device_unregister(priv->ld); - spi_set_drvdata(spi, NULL); return 0; } diff --git a/drivers/video/backlight/tosa_lcd.c b/drivers/video/backlight/tosa_lcd.c index bf081573e5b5..be5d636764bf 100644 --- a/drivers/video/backlight/tosa_lcd.c +++ b/drivers/video/backlight/tosa_lcd.c @@ -198,7 +198,7 @@ static int tosa_lcd_probe(struct spi_device *spi) ret = devm_gpio_request_one(&spi->dev, TOSA_GPIO_TG_ON, GPIOF_OUT_INIT_LOW, "tg #pwr"); if (ret < 0) - goto err_gpio_tg; + return ret; mdelay(60); @@ -219,8 +219,6 @@ static int tosa_lcd_probe(struct spi_device *spi) err_register: tosa_lcd_tg_off(data); -err_gpio_tg: - spi_set_drvdata(spi, NULL); return ret; } @@ -235,8 +233,6 @@ static int tosa_lcd_remove(struct spi_device *spi) tosa_lcd_tg_off(data); - spi_set_drvdata(spi, NULL); - return 0; } diff --git a/drivers/video/bf54x-lq043fb.c b/drivers/video/bf54x-lq043fb.c index 87f288bfc58c..42b8f9d11018 100644 --- a/drivers/video/bf54x-lq043fb.c +++ b/drivers/video/bf54x-lq043fb.c @@ -761,19 +761,7 @@ static struct platform_driver bfin_bf54x_driver = { .owner = THIS_MODULE, }, }; - -static int __init bfin_bf54x_driver_init(void) -{ - return platform_driver_register(&bfin_bf54x_driver); -} - -static void __exit bfin_bf54x_driver_cleanup(void) -{ - platform_driver_unregister(&bfin_bf54x_driver); -} +module_platform_driver(bfin_bf54x_driver); MODULE_DESCRIPTION("Blackfin BF54x TFT LCD Driver"); MODULE_LICENSE("GPL"); - -module_init(bfin_bf54x_driver_init); -module_exit(bfin_bf54x_driver_cleanup); diff --git a/drivers/video/bfin-t350mcqb-fb.c b/drivers/video/bfin-t350mcqb-fb.c index 48c0c4e38a62..b5cf1307a3d9 100644 --- a/drivers/video/bfin-t350mcqb-fb.c +++ b/drivers/video/bfin-t350mcqb-fb.c @@ -664,19 +664,7 @@ static struct platform_driver bfin_t350mcqb_driver = { .owner = THIS_MODULE, }, }; - -static int __init bfin_t350mcqb_driver_init(void) -{ - return platform_driver_register(&bfin_t350mcqb_driver); -} - -static void __exit bfin_t350mcqb_driver_cleanup(void) -{ - platform_driver_unregister(&bfin_t350mcqb_driver); -} +module_platform_driver(bfin_t350mcqb_driver); MODULE_DESCRIPTION("Blackfin TFT LCD Driver"); MODULE_LICENSE("GPL"); - -module_init(bfin_t350mcqb_driver_init); -module_exit(bfin_t350mcqb_driver_cleanup); diff --git a/drivers/video/broadsheetfb.c b/drivers/video/broadsheetfb.c index b09701c79432..8556264b16b7 100644 --- a/drivers/video/broadsheetfb.c +++ b/drivers/video/broadsheetfb.c @@ -1167,9 +1167,8 @@ static int broadsheetfb_probe(struct platform_device *dev) if (retval < 0) goto err_unreg_fb; - printk(KERN_INFO - "fb%d: Broadsheet frame buffer, using %dK of video memory\n", - info->node, videomemorysize >> 10); + fb_info(info, "Broadsheet frame buffer, using %dK of video memory\n", + videomemorysize >> 10); return 0; @@ -1217,19 +1216,7 @@ static struct platform_driver broadsheetfb_driver = { .name = "broadsheetfb", }, }; - -static int __init broadsheetfb_init(void) -{ - return platform_driver_register(&broadsheetfb_driver); -} - -static void __exit broadsheetfb_exit(void) -{ - platform_driver_unregister(&broadsheetfb_driver); -} - -module_init(broadsheetfb_init); -module_exit(broadsheetfb_exit); +module_platform_driver(broadsheetfb_driver); MODULE_DESCRIPTION("fbdev driver for Broadsheet controller"); MODULE_AUTHOR("Jaya Kumar"); diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c index 60017fc634b5..bc123d6947a4 100644 --- a/drivers/video/bw2.c +++ b/drivers/video/bw2.c @@ -363,8 +363,6 @@ static int bw2_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/carminefb.c b/drivers/video/carminefb.c index 153dd65b0ae8..65f7c15f5fdb 100644 --- a/drivers/video/carminefb.c +++ b/drivers/video/carminefb.c @@ -585,8 +585,7 @@ static int alloc_carmine_fb(void __iomem *regs, void __iomem *smem_base, if (ret < 0) goto err_dealloc_cmap; - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, - info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); *rinfo = info; return 0; @@ -746,7 +745,6 @@ static void carminefb_remove(struct pci_dev *dev) iounmap(hw->v_regs); release_mem_region(fix.mmio_start, fix.mmio_len); - pci_set_drvdata(dev, NULL); pci_disable_device(dev); kfree(hw); } diff --git a/drivers/video/cfbimgblt.c b/drivers/video/cfbimgblt.c index baed57d3cfff..a2bb276a8b24 100644 --- a/drivers/video/cfbimgblt.c +++ b/drivers/video/cfbimgblt.c @@ -181,7 +181,7 @@ static inline void slow_imageblit(const struct fb_image *image, struct fb_info * } shift += bpp; shift &= (32 - 1); - if (!l) { l = 8; s++; }; + if (!l) { l = 8; s++; } } /* write trailing bits */ diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c index ed3b8891e006..c79745b136bb 100644 --- a/drivers/video/cg14.c +++ b/drivers/video/cg14.c @@ -330,7 +330,7 @@ static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) default: ret = -ENOSYS; break; - }; + } if (!ret) { sbus_writeb(cur_mode, ®s->mcr); par->mode = mode; @@ -343,7 +343,7 @@ static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) FBTYPE_MDICOLOR, 8, info->fix.smem_len); break; - }; + } return ret; } @@ -583,8 +583,6 @@ static int cg14_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c index 9f63507ded37..64a89d5747ed 100644 --- a/drivers/video/cg3.c +++ b/drivers/video/cg3.c @@ -446,8 +446,6 @@ static int cg3_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c index 3545decc7485..70781fea092a 100644 --- a/drivers/video/cg6.c +++ b/drivers/video/cg6.c @@ -624,7 +624,7 @@ static void cg6_init_fix(struct fb_info *info, int linebytes) default: cg6_cpu_name = "i386"; break; - }; + } if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) { if (info->fix.smem_len <= 0x100000) cg6_card_name = "TGX"; @@ -839,8 +839,6 @@ static int cg6_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c index 97db3ba8f237..5aab9b9dc210 100644 --- a/drivers/video/cirrusfb.c +++ b/drivers/video/cirrusfb.c @@ -595,11 +595,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var, return -EINVAL; } - if (var->xoffset < 0) - var->xoffset = 0; - if (var->yoffset < 0) - var->yoffset = 0; - /* truncate xoffset and yoffset to maximum if too high */ if (var->xoffset > var->xres_virtual - var->xres) var->xoffset = var->xres_virtual - var->xres - 1; @@ -2159,7 +2154,6 @@ static int cirrusfb_pci_register(struct pci_dev *pdev, if (!ret) return 0; - pci_set_drvdata(pdev, NULL); iounmap(info->screen_base); err_release_legacy: if (release_io_ports) diff --git a/drivers/video/cobalt_lcdfb.c b/drivers/video/cobalt_lcdfb.c index a9031498e10c..d5533f4db1cf 100644 --- a/drivers/video/cobalt_lcdfb.c +++ b/drivers/video/cobalt_lcdfb.c @@ -368,8 +368,7 @@ static int cobalt_lcdfb_probe(struct platform_device *dev) lcd_clear(info); - printk(KERN_INFO "fb%d: Cobalt server LCD frame buffer device\n", - info->node); + fb_info(info, "Cobalt server LCD frame buffer device\n"); return 0; } @@ -395,19 +394,7 @@ static struct platform_driver cobalt_lcdfb_driver = { .owner = THIS_MODULE, }, }; - -static int __init cobalt_lcdfb_init(void) -{ - return platform_driver_register(&cobalt_lcdfb_driver); -} - -static void __exit cobalt_lcdfb_exit(void) -{ - platform_driver_unregister(&cobalt_lcdfb_driver); -} - -module_init(cobalt_lcdfb_init); -module_exit(cobalt_lcdfb_exit); +module_platform_driver(cobalt_lcdfb_driver); MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Yoichi Yuasa"); diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c index 67b77b40aa7f..fdadef979238 100644 --- a/drivers/video/controlfb.c +++ b/drivers/video/controlfb.c @@ -471,8 +471,8 @@ try_again: /* Register with fbdev layer */ if (register_framebuffer(&p->info) < 0) return -ENXIO; - - printk(KERN_INFO "fb%d: control display adapter\n", p->info.node); + + fb_info(&p->info, "control display adapter\n"); return 0; } diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index 1c446bc48b42..b0a950f36970 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c @@ -1810,11 +1810,6 @@ static void cyberpro_pci_remove(struct pci_dev *dev) iounmap(cfb->region); cyberpro_free_fb_info(cfb); - /* - * Ensure that the driver data is no longer - * valid. - */ - pci_set_drvdata(dev, NULL); if (cfb == int_cfb_info) int_cfb_info = NULL; diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index e030e17a83f2..a1d74dd11988 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -129,7 +129,6 @@ #define LCD_NUM_BUFFERS 2 -#define WSI_TIMEOUT 50 #define PALETTE_SIZE 256 #define CLK_MIN_DIV 2 @@ -1314,7 +1313,7 @@ static struct fb_ops da8xx_fb_ops = { static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev) { - struct da8xx_lcdc_platform_data *fb_pdata = dev->dev.platform_data; + struct da8xx_lcdc_platform_data *fb_pdata = dev_get_platdata(&dev->dev); struct fb_videomode *lcdc_info; int i; @@ -1336,7 +1335,7 @@ static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev) static int fb_probe(struct platform_device *device) { struct da8xx_lcdc_platform_data *fb_pdata = - device->dev.platform_data; + dev_get_platdata(&device->dev); static struct resource *lcdc_regs; struct lcd_ctrl_config *lcd_cfg; struct fb_videomode *lcdc_info; @@ -1548,7 +1547,7 @@ err_pm_runtime_disable: } #ifdef CONFIG_PM -struct lcdc_context { +static struct lcdc_context { u32 clk_enable; u32 ctrl; u32 dma_ctrl; @@ -1663,19 +1662,7 @@ static struct platform_driver da8xx_fb_driver = { .owner = THIS_MODULE, }, }; - -static int __init da8xx_fb_init(void) -{ - return platform_driver_register(&da8xx_fb_driver); -} - -static void __exit da8xx_fb_cleanup(void) -{ - platform_driver_unregister(&da8xx_fb_driver); -} - -module_init(da8xx_fb_init); -module_exit(da8xx_fb_cleanup); +module_platform_driver(da8xx_fb_driver); MODULE_DESCRIPTION("Framebuffer driver for TI da8xx/omap-l1xx"); MODULE_AUTHOR("Texas Instruments"); diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c index 7f9ff75d0db2..cd7c0df9f24b 100644 --- a/drivers/video/efifb.c +++ b/drivers/video/efifb.c @@ -108,8 +108,8 @@ static int efifb_setup(char *options) if (!*this_opt) continue; for (i = 0; i < M_UNKNOWN; i++) { - if (!strcmp(this_opt, efifb_dmi_list[i].optname) && - efifb_dmi_list[i].base != 0) { + if (efifb_dmi_list[i].base != 0 && + !strcmp(this_opt, efifb_dmi_list[i].optname)) { screen_info.lfb_base = efifb_dmi_list[i].base; screen_info.lfb_linelength = efifb_dmi_list[i].stride; screen_info.lfb_width = efifb_dmi_list[i].width; @@ -322,8 +322,7 @@ static int efifb_probe(struct platform_device *dev) printk(KERN_ERR "efifb: cannot register framebuffer\n"); goto err_fb_dealoc; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; err_fb_dealoc: diff --git a/drivers/video/ep93xx-fb.c b/drivers/video/ep93xx-fb.c index 28a837dfddd1..35a0f533f1a2 100644 --- a/drivers/video/ep93xx-fb.c +++ b/drivers/video/ep93xx-fb.c @@ -487,7 +487,7 @@ static void ep93xxfb_dealloc_videomem(struct fb_info *info) static int ep93xxfb_probe(struct platform_device *pdev) { - struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data; + struct ep93xxfb_mach_info *mach_info = dev_get_platdata(&pdev->dev); struct fb_info *info; struct ep93xx_fbi *fbi; struct resource *res; diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c index 520fc9bd887b..7eed957b6014 100644 --- a/drivers/video/exynos/exynos_mipi_dsi_common.c +++ b/drivers/video/exynos/exynos_mipi_dsi_common.c @@ -376,6 +376,7 @@ int exynos_mipi_dsi_rd_data(struct mipi_dsim_device *dsim, unsigned int data_id, "data id %x is not supported current DSI spec.\n", data_id); + mutex_unlock(&dsim->lock); return -EINVAL; } @@ -667,7 +668,7 @@ int exynos_mipi_dsi_init_dsim(struct mipi_dsim_device *dsim) default: dev_info(dsim->dev, "data lane is invalid.\n"); return -EINVAL; - }; + } exynos_mipi_dsi_sw_reset(dsim); exynos_mipi_dsi_func_reset(dsim); diff --git a/drivers/video/fb-puv3.c b/drivers/video/fb-puv3.c index 27fc956166fa..6db9ebd042a3 100644 --- a/drivers/video/fb-puv3.c +++ b/drivers/video/fb-puv3.c @@ -713,9 +713,8 @@ static int unifb_probe(struct platform_device *dev) platform_set_drvdata(dev, info); platform_device_add_data(dev, unifb_regs, sizeof(u32) * UNIFB_REGS_NUM); - printk(KERN_INFO - "fb%d: Virtual frame buffer device, using %dM of video memory\n", - info->node, UNIFB_MEMSIZE >> 20); + fb_info(info, "Virtual frame buffer device, using %dM of video memory\n", + UNIFB_MEMSIZE >> 20); return 0; err2: fb_dealloc_cmap(&info->cmap); diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index dacaf74256a3..010d19105ebc 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c @@ -1108,14 +1108,16 @@ static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, case FBIOPUT_VSCREENINFO: if (copy_from_user(&var, argp, sizeof(var))) return -EFAULT; - if (!lock_fb_info(info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(info)) { + console_unlock(); + return -ENODEV; + } info->flags |= FBINFO_MISC_USEREVENT; ret = fb_set_var(info, &var); info->flags &= ~FBINFO_MISC_USEREVENT; - console_unlock(); unlock_fb_info(info); + console_unlock(); if (!ret && copy_to_user(argp, &var, sizeof(var))) ret = -EFAULT; break; @@ -1144,12 +1146,14 @@ static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, case FBIOPAN_DISPLAY: if (copy_from_user(&var, argp, sizeof(var))) return -EFAULT; - if (!lock_fb_info(info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(info)) { + console_unlock(); + return -ENODEV; + } ret = fb_pan_display(info, &var); - console_unlock(); unlock_fb_info(info); + console_unlock(); if (ret == 0 && copy_to_user(argp, &var, sizeof(var))) return -EFAULT; break; @@ -1184,23 +1188,27 @@ static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, break; } event.data = &con2fb; - if (!lock_fb_info(info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(info)) { + console_unlock(); + return -ENODEV; + } event.info = info; ret = fb_notifier_call_chain(FB_EVENT_SET_CONSOLE_MAP, &event); - console_unlock(); unlock_fb_info(info); + console_unlock(); break; case FBIOBLANK: - if (!lock_fb_info(info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(info)) { + console_unlock(); + return -ENODEV; + } info->flags |= FBINFO_MISC_USEREVENT; ret = fb_blank(info, arg); info->flags &= ~FBINFO_MISC_USEREVENT; - console_unlock(); unlock_fb_info(info); + console_unlock(); break; default: if (!lock_fb_info(info)) @@ -1660,12 +1668,15 @@ static int do_register_framebuffer(struct fb_info *fb_info) registered_fb[i] = fb_info; event.info = fb_info; - if (!lock_fb_info(fb_info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(fb_info)) { + console_unlock(); + return -ENODEV; + } + fb_notifier_call_chain(FB_EVENT_FB_REGISTERED, &event); - console_unlock(); unlock_fb_info(fb_info); + console_unlock(); return 0; } @@ -1678,13 +1689,16 @@ static int do_unregister_framebuffer(struct fb_info *fb_info) if (i < 0 || i >= FB_MAX || registered_fb[i] != fb_info) return -EINVAL; - if (!lock_fb_info(fb_info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(fb_info)) { + console_unlock(); + return -ENODEV; + } + event.info = fb_info; ret = fb_notifier_call_chain(FB_EVENT_FB_UNBIND, &event); - console_unlock(); unlock_fb_info(fb_info); + console_unlock(); if (ret) return -EINVAL; diff --git a/drivers/video/fbsysfs.c b/drivers/video/fbsysfs.c index ef476b02fbe5..53444ac19fe0 100644 --- a/drivers/video/fbsysfs.c +++ b/drivers/video/fbsysfs.c @@ -177,9 +177,12 @@ static ssize_t store_modes(struct device *device, if (i * sizeof(struct fb_videomode) != count) return -EINVAL; - if (!lock_fb_info(fb_info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(fb_info)) { + console_unlock(); + return -ENODEV; + } + list_splice(&fb_info->modelist, &old_list); fb_videomode_to_modelist((const struct fb_videomode *)buf, i, &fb_info->modelist); @@ -189,8 +192,8 @@ static ssize_t store_modes(struct device *device, } else fb_destroy_modelist(&old_list); - console_unlock(); unlock_fb_info(fb_info); + console_unlock(); return 0; } @@ -404,12 +407,16 @@ static ssize_t store_fbstate(struct device *device, state = simple_strtoul(buf, &last, 0); - if (!lock_fb_info(fb_info)) - return -ENODEV; console_lock(); + if (!lock_fb_info(fb_info)) { + console_unlock(); + return -ENODEV; + } + fb_set_suspend(fb_info, (int)state); - console_unlock(); + unlock_fb_info(fb_info); + console_unlock(); return count; } diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c index 6d2744794dd1..4c4ffa61ae26 100644 --- a/drivers/video/ffb.c +++ b/drivers/video/ffb.c @@ -1035,8 +1035,6 @@ static int ffb_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/fm2fb.c b/drivers/video/fm2fb.c index c99c9671302b..e69d47af9932 100644 --- a/drivers/video/fm2fb.c +++ b/drivers/video/fm2fb.c @@ -289,7 +289,7 @@ static int fm2fb_probe(struct zorro_dev *z, const struct zorro_device_id *id) zorro_release_device(z); return -EINVAL; } - printk("fb%d: %s frame buffer device\n", info->node, fb_fix.id); + fb_info(info, "%s frame buffer device\n", fb_fix.id); return 0; } diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c index b047ec58ac30..e8758b9c3bcc 100644 --- a/drivers/video/fsl-diu-fb.c +++ b/drivers/video/fsl-diu-fb.c @@ -1104,7 +1104,7 @@ static int fsl_diu_cursor(struct fb_info *info, struct fb_cursor *cursor) fsl_diu_load_cursor_image(info, image, bg, fg, cursor->image.width, cursor->image.height); - }; + } /* * Show or hide the cursor. The cursor data is always stored in the diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c index ceab37020fff..4c7cb368a9dc 100644 --- a/drivers/video/gbefb.c +++ b/drivers/video/gbefb.c @@ -1236,9 +1236,9 @@ static int gbefb_probe(struct platform_device *p_dev) platform_set_drvdata(p_dev, info); gbefb_create_sysfs(&p_dev->dev); - printk(KERN_INFO "fb%d: %s rev %d @ 0x%08x using %dkB memory\n", - info->node, info->fix.id, gbe_revision, (unsigned) GBE_BASE, - gbe_mem_size >> 10); + fb_info(info, "%s rev %d @ 0x%08x using %dkB memory\n", + info->fix.id, gbe_revision, (unsigned)GBE_BASE, + gbe_mem_size >> 10); return 0; diff --git a/drivers/video/geode/gx1fb_core.c b/drivers/video/geode/gx1fb_core.c index ebbaada7b941..2794ba11f332 100644 --- a/drivers/video/geode/gx1fb_core.c +++ b/drivers/video/geode/gx1fb_core.c @@ -357,7 +357,7 @@ static int gx1fb_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err; } pci_set_drvdata(pdev, info); - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; err: @@ -399,7 +399,6 @@ static void gx1fb_remove(struct pci_dev *pdev) release_mem_region(gx1_gx_base() + 0x8300, 0x100); fb_dealloc_cmap(&info->cmap); - pci_set_drvdata(pdev, NULL); framebuffer_release(info); } diff --git a/drivers/video/geode/gxfb_core.c b/drivers/video/geode/gxfb_core.c index 19f0c1add747..1790f14bab15 100644 --- a/drivers/video/geode/gxfb_core.c +++ b/drivers/video/geode/gxfb_core.c @@ -423,7 +423,7 @@ static int gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err; } pci_set_drvdata(pdev, info); - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; err: @@ -471,7 +471,6 @@ static void gxfb_remove(struct pci_dev *pdev) pci_release_region(pdev, 1); fb_dealloc_cmap(&info->cmap); - pci_set_drvdata(pdev, NULL); framebuffer_release(info); } diff --git a/drivers/video/geode/lxfb_core.c b/drivers/video/geode/lxfb_core.c index 4dd7b5566962..9e1d19d673a1 100644 --- a/drivers/video/geode/lxfb_core.c +++ b/drivers/video/geode/lxfb_core.c @@ -555,8 +555,7 @@ static int lxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err; } pci_set_drvdata(pdev, info); - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; @@ -606,7 +605,6 @@ static void lxfb_remove(struct pci_dev *pdev) pci_release_region(pdev, 3); fb_dealloc_cmap(&info->cmap); - pci_set_drvdata(pdev, NULL); framebuffer_release(info); } diff --git a/drivers/video/grvga.c b/drivers/video/grvga.c index 861109e7de1b..c078701f15f6 100644 --- a/drivers/video/grvga.c +++ b/drivers/video/grvga.c @@ -496,7 +496,6 @@ static int grvga_probe(struct platform_device *dev) return 0; free_mem: - dev_set_drvdata(&dev->dev, NULL); if (grvga_fix_addr) iounmap((void *)virtual_start); else @@ -530,7 +529,6 @@ static int grvga_remove(struct platform_device *device) kfree((void *)info->screen_base); framebuffer_release(info); - dev_set_drvdata(&device->dev, NULL); } return 0; @@ -557,19 +555,7 @@ static struct platform_driver grvga_driver = { .remove = grvga_remove, }; - -static int __init grvga_init(void) -{ - return platform_driver_register(&grvga_driver); -} - -static void __exit grvga_exit(void) -{ - platform_driver_unregister(&grvga_driver); -} - -module_init(grvga_init); -module_exit(grvga_exit); +module_platform_driver(grvga_driver); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Aeroflex Gaisler"); diff --git a/drivers/video/gxt4500.c b/drivers/video/gxt4500.c index c35663f6a54a..135d78a02588 100644 --- a/drivers/video/gxt4500.c +++ b/drivers/video/gxt4500.c @@ -698,8 +698,7 @@ static int gxt4500_probe(struct pci_dev *pdev, const struct pci_device_id *ent) dev_err(&pdev->dev, "gxt4500: cannot register framebuffer\n"); goto err_free_cmap; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; diff --git a/drivers/video/hecubafb.c b/drivers/video/hecubafb.c index 59d23181fdb0..f64120ec9192 100644 --- a/drivers/video/hecubafb.c +++ b/drivers/video/hecubafb.c @@ -261,9 +261,8 @@ static int hecubafb_probe(struct platform_device *dev) goto err_fbreg; platform_set_drvdata(dev, info); - printk(KERN_INFO - "fb%d: Hecuba frame buffer device, using %dK of video memory\n", - info->node, videomemorysize >> 10); + fb_info(info, "Hecuba frame buffer device, using %dK of video memory\n", + videomemorysize >> 10); /* this inits the dpy */ retval = par->board->init(par); @@ -305,19 +304,7 @@ static struct platform_driver hecubafb_driver = { .name = "hecubafb", }, }; - -static int __init hecubafb_init(void) -{ - return platform_driver_register(&hecubafb_driver); -} - -static void __exit hecubafb_exit(void) -{ - platform_driver_unregister(&hecubafb_driver); -} - -module_init(hecubafb_init); -module_exit(hecubafb_exit); +module_platform_driver(hecubafb_driver); MODULE_DESCRIPTION("fbdev driver for Hecuba/Apollo controller"); MODULE_AUTHOR("Jaya Kumar"); diff --git a/drivers/video/hgafb.c b/drivers/video/hgafb.c index 1e9e2d819d1f..5ff9fe2116a4 100644 --- a/drivers/video/hgafb.c +++ b/drivers/video/hgafb.c @@ -586,8 +586,7 @@ static int hgafb_probe(struct platform_device *pdev) return -EINVAL; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); platform_set_drvdata(pdev, info); return 0; } diff --git a/drivers/video/hitfb.c b/drivers/video/hitfb.c index c2414d6ab646..a648d5186c6e 100644 --- a/drivers/video/hitfb.c +++ b/drivers/video/hitfb.c @@ -405,8 +405,7 @@ static int hitfb_probe(struct platform_device *dev) platform_set_drvdata(dev, info); - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; diff --git a/drivers/video/hpfb.c b/drivers/video/hpfb.c index b802f93cef5d..a1b7e5fa9b09 100644 --- a/drivers/video/hpfb.c +++ b/drivers/video/hpfb.c @@ -298,8 +298,7 @@ static int hpfb_init_one(unsigned long phys_base, unsigned long virt_base) if (ret < 0) goto dealloc_cmap; - printk(KERN_INFO "fb%d: %s frame buffer device\n", - fb_info.node, fb_info.fix.id); + fb_info(&fb_info, "%s frame buffer device\n", fb_info.fix.id); return 0; diff --git a/drivers/video/hyperv_fb.c b/drivers/video/hyperv_fb.c index 8ac99b87c07e..130708f96430 100644 --- a/drivers/video/hyperv_fb.c +++ b/drivers/video/hyperv_fb.c @@ -575,6 +575,10 @@ static int hvfb_setcolreg(unsigned regno, unsigned red, unsigned green, return 0; } +static int hvfb_blank(int blank, struct fb_info *info) +{ + return 1; /* get fb_blank to set the colormap to all black */ +} static struct fb_ops hvfb_ops = { .owner = THIS_MODULE, @@ -584,6 +588,7 @@ static struct fb_ops hvfb_ops = { .fb_fillrect = cfb_fillrect, .fb_copyarea = cfb_copyarea, .fb_imageblit = cfb_imageblit, + .fb_blank = hvfb_blank, }; @@ -795,12 +800,21 @@ static int hvfb_remove(struct hv_device *hdev) } +static DEFINE_PCI_DEVICE_TABLE(pci_stub_id_table) = { + { + .vendor = PCI_VENDOR_ID_MICROSOFT, + .device = PCI_DEVICE_ID_HYPERV_VIDEO, + }, + { /* end of list */ } +}; + static const struct hv_vmbus_device_id id_table[] = { /* Synthetic Video Device GUID */ {HV_SYNTHVID_GUID}, {} }; +MODULE_DEVICE_TABLE(pci, pci_stub_id_table); MODULE_DEVICE_TABLE(vmbus, id_table); static struct hv_driver hvfb_drv = { @@ -810,14 +824,43 @@ static struct hv_driver hvfb_drv = { .remove = hvfb_remove, }; +static int hvfb_pci_stub_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + return 0; +} + +static void hvfb_pci_stub_remove(struct pci_dev *pdev) +{ +} + +static struct pci_driver hvfb_pci_stub_driver = { + .name = KBUILD_MODNAME, + .id_table = pci_stub_id_table, + .probe = hvfb_pci_stub_probe, + .remove = hvfb_pci_stub_remove, +}; static int __init hvfb_drv_init(void) { - return vmbus_driver_register(&hvfb_drv); + int ret; + + ret = vmbus_driver_register(&hvfb_drv); + if (ret != 0) + return ret; + + ret = pci_register_driver(&hvfb_pci_stub_driver); + if (ret != 0) { + vmbus_driver_unregister(&hvfb_drv); + return ret; + } + + return 0; } static void __exit hvfb_drv_exit(void) { + pci_unregister_driver(&hvfb_pci_stub_driver); vmbus_driver_unregister(&hvfb_drv); } diff --git a/drivers/video/i740fb.c b/drivers/video/i740fb.c index 6c4838818950..ca7c9df193b0 100644 --- a/drivers/video/i740fb.c +++ b/drivers/video/i740fb.c @@ -203,8 +203,7 @@ static int i740fb_release(struct fb_info *info, int user) mutex_lock(&(par->open_lock)); if (par->ref_count == 0) { - printk(KERN_ERR "fb%d: release called with zero refcount\n", - info->node); + fb_err(info, "release called with zero refcount\n"); mutex_unlock(&(par->open_lock)); return -EINVAL; } @@ -1067,7 +1066,7 @@ static int i740fb_probe(struct pci_dev *dev, const struct pci_device_id *ent) par->has_sgram = !((tmp & DRAM_RAS_TIMING) || (tmp & DRAM_RAS_PRECHARGE)); - printk(KERN_INFO "fb%d: Intel740 on %s, %ld KB %s\n", info->node, + fb_info(info, "Intel740 on %s, %ld KB %s\n", pci_name(dev), info->screen_size >> 10, par->has_sgram ? "SGRAM" : "SDRAM"); @@ -1143,8 +1142,7 @@ static int i740fb_probe(struct pci_dev *dev, const struct pci_device_id *ent) goto err_reg_framebuffer; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); pci_set_drvdata(dev, info); #ifdef CONFIG_MTRR if (mtrr) { @@ -1194,7 +1192,6 @@ static void i740fb_remove(struct pci_dev *dev) pci_iounmap(dev, info->screen_base); pci_release_regions(dev); /* pci_disable_device(dev); */ - pci_set_drvdata(dev, NULL); framebuffer_release(info); } } diff --git a/drivers/video/i810/i810_main.c b/drivers/video/i810/i810_main.c index 4ce3438ade6f..038192ac7369 100644 --- a/drivers/video/i810/i810_main.c +++ b/drivers/video/i810/i810_main.c @@ -2129,7 +2129,6 @@ static void __exit i810fb_remove_pci(struct pci_dev *dev) unregister_framebuffer(info); i810fb_release_resource(info, par); - pci_set_drvdata(dev, NULL); printk("cleanup_module: unloaded i810 framebuffer device\n"); } diff --git a/drivers/video/igafb.c b/drivers/video/igafb.c index 79cbfa7d1a9b..486f18897414 100644 --- a/drivers/video/igafb.c +++ b/drivers/video/igafb.c @@ -360,9 +360,8 @@ static int __init iga_init(struct fb_info *info, struct iga_par *par) if (register_framebuffer(info) < 0) return 0; - printk("fb%d: %s frame buffer device at 0x%08lx [%dMB VRAM]\n", - info->node, info->fix.id, - par->frame_buffer_phys, info->fix.smem_len >> 20); + fb_info(info, "%s frame buffer device at 0x%08lx [%dMB VRAM]\n", + info->fix.id, par->frame_buffer_phys, info->fix.smem_len >> 20); iga_blank_border(par); return 1; diff --git a/drivers/video/imsttfb.c b/drivers/video/imsttfb.c index d5220cc90e93..aae10ce74f14 100644 --- a/drivers/video/imsttfb.c +++ b/drivers/video/imsttfb.c @@ -1461,8 +1461,8 @@ static void init_imstt(struct fb_info *info) } tmp = (read_reg_le32(par->dc_regs, SSTATUS) & 0x0f00) >> 8; - printk("fb%u: %s frame buffer; %uMB vram; chip version %u\n", - info->node, info->fix.id, info->fix.smem_len >> 20, tmp); + fb_info(info, "%s frame buffer; %uMB vram; chip version %u\n", + info->fix.id, info->fix.smem_len >> 20, tmp); } static int imsttfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index 38733ac2b698..44ee678481d5 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c @@ -755,7 +755,7 @@ static int imxfb_resume(struct platform_device *dev) static int imxfb_init_fbinfo(struct platform_device *pdev) { - struct imx_fb_platform_data *pdata = pdev->dev.platform_data; + struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev); struct fb_info *info = dev_get_drvdata(&pdev->dev); struct imxfb_info *fbi = info->par; struct device_node *np; @@ -877,7 +877,7 @@ static int imxfb_probe(struct platform_device *pdev) if (!res) return -ENODEV; - pdata = pdev->dev.platform_data; + pdata = dev_get_platdata(&pdev->dev); info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); if (!info) @@ -1066,7 +1066,7 @@ static int imxfb_remove(struct platform_device *pdev) #endif unregister_framebuffer(info); - pdata = pdev->dev.platform_data; + pdata = dev_get_platdata(&pdev->dev); if (pdata && pdata->exit) pdata->exit(fbi->pdev); diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c index 8209e46c5d28..b847d530471a 100644 --- a/drivers/video/intelfb/intelfbdrv.c +++ b/drivers/video/intelfb/intelfbdrv.c @@ -931,8 +931,6 @@ static void intelfb_pci_unregister(struct pci_dev *pdev) return; cleanup(dinfo); - - pci_set_drvdata(pdev, NULL); } /*************************************************************** diff --git a/drivers/video/jz4740_fb.c b/drivers/video/jz4740_fb.c index 2c49112fdd6c..87790e9644d0 100644 --- a/drivers/video/jz4740_fb.c +++ b/drivers/video/jz4740_fb.c @@ -99,9 +99,9 @@ #define JZ_LCD_CTRL_BPP_15_16 0x4 #define JZ_LCD_CTRL_BPP_18_24 0x5 -#define JZ_LCD_CMD_SOF_IRQ BIT(15) -#define JZ_LCD_CMD_EOF_IRQ BIT(16) -#define JZ_LCD_CMD_ENABLE_PAL BIT(12) +#define JZ_LCD_CMD_SOF_IRQ BIT(31) +#define JZ_LCD_CMD_EOF_IRQ BIT(30) +#define JZ_LCD_CMD_ENABLE_PAL BIT(28) #define JZ_LCD_SYNC_MASK 0x3ff @@ -471,7 +471,7 @@ static int jzfb_set_par(struct fb_info *info) writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL); if (!jzfb->is_enabled) - clk_disable(jzfb->ldclk); + clk_disable_unprepare(jzfb->ldclk); mutex_unlock(&jzfb->lock); @@ -485,7 +485,7 @@ static void jzfb_enable(struct jzfb *jzfb) { uint32_t ctrl; - clk_enable(jzfb->ldclk); + clk_prepare_enable(jzfb->ldclk); jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); @@ -514,7 +514,7 @@ static void jzfb_disable(struct jzfb *jzfb) jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); - clk_disable(jzfb->ldclk); + clk_disable_unprepare(jzfb->ldclk); } static int jzfb_blank(int blank_mode, struct fb_info *info) @@ -693,7 +693,7 @@ static int jzfb_probe(struct platform_device *pdev) fb_alloc_cmap(&fb->cmap, 256, 0); - clk_enable(jzfb->ldclk); + clk_prepare_enable(jzfb->ldclk); jzfb->is_enabled = 1; writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0); @@ -763,7 +763,7 @@ static int jzfb_suspend(struct device *dev) static int jzfb_resume(struct device *dev) { struct jzfb *jzfb = dev_get_drvdata(dev); - clk_enable(jzfb->ldclk); + clk_prepare_enable(jzfb->ldclk); mutex_lock(&jzfb->lock); if (jzfb->is_enabled) @@ -798,18 +798,7 @@ static struct platform_driver jzfb_driver = { .pm = JZFB_PM_OPS, }, }; - -static int __init jzfb_init(void) -{ - return platform_driver_register(&jzfb_driver); -} -module_init(jzfb_init); - -static void __exit jzfb_exit(void) -{ - platform_driver_unregister(&jzfb_driver); -} -module_exit(jzfb_exit); +module_platform_driver(jzfb_driver); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); diff --git a/drivers/video/kyro/fbdev.c b/drivers/video/kyro/fbdev.c index 6157f74ac600..50c857477e4f 100644 --- a/drivers/video/kyro/fbdev.c +++ b/drivers/video/kyro/fbdev.c @@ -623,7 +623,6 @@ static int kyrofb_ioctl(struct fb_info *info, "command instead.\n"); return -EINVAL; } - break; case KYRO_IOCTL_UVSTRIDE: if (copy_to_user(argp, &deviceInfo.ulOverlayUVStride, sizeof(unsigned long))) return -EFAULT; @@ -736,10 +735,10 @@ static int kyrofb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (register_framebuffer(info) < 0) goto out_unmap; - printk("fb%d: %s frame buffer device, at %dx%d@%d using %ldk/%ldk of VRAM\n", - info->node, info->fix.id, info->var.xres, - info->var.yres, info->var.bits_per_pixel, size >> 10, - (unsigned long)info->fix.smem_len >> 10); + fb_info(info, "%s frame buffer device, at %dx%d@%d using %ldk/%ldk of VRAM\n", + info->fix.id, + info->var.xres, info->var.yres, info->var.bits_per_pixel, + size >> 10, (unsigned long)info->fix.smem_len >> 10); pci_set_drvdata(pdev, info); @@ -779,7 +778,6 @@ static void kyrofb_remove(struct pci_dev *pdev) #endif unregister_framebuffer(info); - pci_set_drvdata(pdev, NULL); framebuffer_release(info); } diff --git a/drivers/video/leo.c b/drivers/video/leo.c index b17f5009a436..2c7f7d479fe2 100644 --- a/drivers/video/leo.c +++ b/drivers/video/leo.c @@ -469,7 +469,7 @@ static void leo_wid_put(struct fb_info *info, struct fb_wid_list *wl) default: continue; - }; + } sbus_writel(0x5800 + j, &lx_krn->krn_type); sbus_writel(wi->wi_values[0], &lx_krn->krn_value); } @@ -648,8 +648,6 @@ static int leo_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/macfb.c b/drivers/video/macfb.c index fe01add3700e..5bd2eb8d4f39 100644 --- a/drivers/video/macfb.c +++ b/drivers/video/macfb.c @@ -913,8 +913,7 @@ static int __init macfb_init(void) if (err) goto fail_dealloc; - pr_info("fb%d: %s frame buffer device\n", - fb_info.node, fb_info.fix.id); + fb_info(&fb_info, "%s frame buffer device\n", fb_info.fix.id); return 0; diff --git a/drivers/video/matrox/matroxfb_DAC1064.c b/drivers/video/matrox/matroxfb_DAC1064.c index 1717623aabc0..a01147fdf270 100644 --- a/drivers/video/matrox/matroxfb_DAC1064.c +++ b/drivers/video/matrox/matroxfb_DAC1064.c @@ -494,7 +494,7 @@ static int m1064_compute(void* out, struct my_timming* m) { if (inDAC1064(minfo, M1064_XPIXPLLSTAT) & 0x40) break; udelay(10); - }; + } CRITEND @@ -639,7 +639,7 @@ static void MGAG100_progPixClock(const struct matrox_fb_info *minfo, int flags, if (inDAC1064(minfo, M1064_XPIXPLLSTAT) & 0x40) break; udelay(10); - }; + } if (!clk) printk(KERN_ERR "matroxfb: Pixel PLL%c not locked after usual time\n", (reg-M1064_XPIXPLLAM-2)/4 + 'A'); selClk = inDAC1064(minfo, M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_SRC_MASK; diff --git a/drivers/video/matrox/matroxfb_Ti3026.c b/drivers/video/matrox/matroxfb_Ti3026.c index 9a44cec394b5..195ad7cac1ba 100644 --- a/drivers/video/matrox/matroxfb_Ti3026.c +++ b/drivers/video/matrox/matroxfb_Ti3026.c @@ -473,7 +473,7 @@ static void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout) if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) break; udelay(10); - }; + } if (!tmout) printk(KERN_ERR "matroxfb: Temporary pixel PLL not locked after 5 secs\n"); diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c index 245652911650..87c64ff4546c 100644 --- a/drivers/video/matrox/matroxfb_base.c +++ b/drivers/video/matrox/matroxfb_base.c @@ -1893,14 +1893,12 @@ static int initMatrox2(struct matrox_fb_info *minfo, struct board *b) if (register_framebuffer(&minfo->fbcon) < 0) { goto failVideoIO; } - printk("fb%d: %s frame buffer device\n", - minfo->fbcon.node, minfo->fbcon.fix.id); + fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id); /* there is no console on this fb... but we have to initialize hardware * until someone tells me what is proper thing to do */ if (!minfo->initialized) { - printk(KERN_INFO "fb%d: initializing hardware\n", - minfo->fbcon.node); + fb_info(&minfo->fbcon, "initializing hardware\n"); /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var * already before, so register_framebuffer works correctly. */ vesafb_defined.activate |= FB_ACTIVATE_FORCE; diff --git a/drivers/video/matrox/matroxfb_maven.c b/drivers/video/matrox/matroxfb_maven.c index fd2897455696..ee41a0f276b2 100644 --- a/drivers/video/matrox/matroxfb_maven.c +++ b/drivers/video/matrox/matroxfb_maven.c @@ -1295,19 +1295,7 @@ static struct i2c_driver maven_driver={ .id_table = maven_id, }; -static int __init matroxfb_maven_init(void) -{ - return i2c_add_driver(&maven_driver); -} - -static void __exit matroxfb_maven_exit(void) -{ - i2c_del_driver(&maven_driver); -} - +module_i2c_driver(maven_driver); MODULE_AUTHOR("(c) 1999-2002 Petr Vandrovec <vandrove@vc.cvut.cz>"); MODULE_DESCRIPTION("Matrox G200/G400 Matrox MGA-TVO driver"); MODULE_LICENSE("GPL"); -module_init(matroxfb_maven_init); -module_exit(matroxfb_maven_exit); -/* we do not have __setup() yet */ diff --git a/drivers/video/mb862xx/mb862xxfbdrv.c b/drivers/video/mb862xx/mb862xxfbdrv.c index 91c59c9fb082..0cd4c3318511 100644 --- a/drivers/video/mb862xx/mb862xxfbdrv.c +++ b/drivers/video/mb862xx/mb862xxfbdrv.c @@ -781,7 +781,6 @@ rel_reg: irqdisp: irq_dispose_mapping(par->irq); fbrel: - dev_set_drvdata(dev, NULL); framebuffer_release(info); return ret; } @@ -814,7 +813,6 @@ static int of_platform_mb862xx_remove(struct platform_device *ofdev) iounmap(par->mmio_base); iounmap(par->fb_base); - dev_set_drvdata(&ofdev->dev, NULL); release_mem_region(par->res->start, res_size); framebuffer_release(fbi); return 0; @@ -1157,7 +1155,6 @@ static void mb862xx_pci_remove(struct pci_dev *pdev) device_remove_file(&pdev->dev, &dev_attr_dispregs); - pci_set_drvdata(pdev, NULL); unregister_framebuffer(fbi); fb_dealloc_cmap(&fbi->cmap); diff --git a/drivers/video/mbx/mbxfb.c b/drivers/video/mbx/mbxfb.c index 0c1a874ffd2b..f0a5392f5fd3 100644 --- a/drivers/video/mbx/mbxfb.c +++ b/drivers/video/mbx/mbxfb.c @@ -890,7 +890,7 @@ static int mbxfb_probe(struct platform_device *dev) dev_dbg(&dev->dev, "mbxfb_probe\n"); - pdata = dev->dev.platform_data; + pdata = dev_get_platdata(&dev->dev); if (!pdata) { dev_err(&dev->dev, "platform data is required\n"); return -EINVAL; @@ -976,7 +976,7 @@ static int mbxfb_probe(struct platform_device *dev) platform_set_drvdata(dev, fbi); - printk(KERN_INFO "fb%d: mbx frame buffer device\n", fbi->node); + fb_info(fbi, "mbx frame buffer device\n"); if (mfbi->platform_probe) mfbi->platform_probe(fbi); diff --git a/drivers/video/metronomefb.c b/drivers/video/metronomefb.c index f30150d71be9..195cc2db4c2c 100644 --- a/drivers/video/metronomefb.c +++ b/drivers/video/metronomefb.c @@ -690,7 +690,8 @@ static int metronomefb_probe(struct platform_device *dev) goto err_csum_table; } - if (board->setup_irq(info)) + retval = board->setup_irq(info); + if (retval) goto err_csum_table; retval = metronome_init_regs(par); @@ -769,23 +770,11 @@ static struct platform_driver metronomefb_driver = { .name = "metronomefb", }, }; - -static int __init metronomefb_init(void) -{ - return platform_driver_register(&metronomefb_driver); -} - -static void __exit metronomefb_exit(void) -{ - platform_driver_unregister(&metronomefb_driver); -} +module_platform_driver(metronomefb_driver); module_param(user_wfm_size, uint, 0); MODULE_PARM_DESC(user_wfm_size, "Set custom waveform size"); -module_init(metronomefb_init); -module_exit(metronomefb_exit); - MODULE_DESCRIPTION("fbdev driver for Metronome controller"); MODULE_AUTHOR("Jaya Kumar"); MODULE_LICENSE("GPL"); diff --git a/drivers/video/mmp/fb/mmpfb.c b/drivers/video/mmp/fb/mmpfb.c index 4ab95b8daed3..7ab31eb76a8c 100644 --- a/drivers/video/mmp/fb/mmpfb.c +++ b/drivers/video/mmp/fb/mmpfb.c @@ -392,12 +392,29 @@ static int var_update(struct fb_info *info) return 0; } +static void mmpfb_set_win(struct fb_info *info) +{ + struct mmpfb_info *fbi = info->par; + struct fb_var_screeninfo *var = &info->var; + struct mmp_win win; + u32 stride; + + memset(&win, 0, sizeof(win)); + win.xsrc = win.xdst = fbi->mode.xres; + win.ysrc = win.ydst = fbi->mode.yres; + win.pix_fmt = fbi->pix_fmt; + stride = pixfmt_to_stride(win.pix_fmt); + win.pitch[0] = var->xres_virtual * stride; + win.pitch[1] = win.pitch[2] = + (stride == 1) ? (var->xres_virtual >> 1) : 0; + mmp_overlay_set_win(fbi->overlay, &win); +} + static int mmpfb_set_par(struct fb_info *info) { struct mmpfb_info *fbi = info->par; struct fb_var_screeninfo *var = &info->var; struct mmp_addr addr; - struct mmp_win win; struct mmp_mode mode; int ret; @@ -409,11 +426,8 @@ static int mmpfb_set_par(struct fb_info *info) fbmode_to_mmpmode(&mode, &fbi->mode, fbi->output_fmt); mmp_path_set_mode(fbi->path, &mode); - memset(&win, 0, sizeof(win)); - win.xsrc = win.xdst = fbi->mode.xres; - win.ysrc = win.ydst = fbi->mode.yres; - win.pix_fmt = fbi->pix_fmt; - mmp_overlay_set_win(fbi->overlay, &win); + /* set window related info */ + mmpfb_set_win(info); /* set address always */ memset(&addr, 0, sizeof(addr)); @@ -427,16 +441,12 @@ static int mmpfb_set_par(struct fb_info *info) static void mmpfb_power(struct mmpfb_info *fbi, int power) { struct mmp_addr addr; - struct mmp_win win; struct fb_var_screeninfo *var = &fbi->fb_info->var; /* for power on, always set address/window again */ if (power) { - memset(&win, 0, sizeof(win)); - win.xsrc = win.xdst = fbi->mode.xres; - win.ysrc = win.ydst = fbi->mode.yres; - win.pix_fmt = fbi->pix_fmt; - mmp_overlay_set_win(fbi->overlay, &win); + /* set window related info */ + mmpfb_set_win(fbi->fb_info); /* set address always */ memset(&addr, 0, sizeof(addr)); diff --git a/drivers/video/mmp/hw/mmp_ctrl.c b/drivers/video/mmp/hw/mmp_ctrl.c index 6ac755270ab4..8621a9f2bdcc 100644 --- a/drivers/video/mmp/hw/mmp_ctrl.c +++ b/drivers/video/mmp/hw/mmp_ctrl.c @@ -53,15 +53,14 @@ static irqreturn_t ctrl_handle_irq(int irq, void *dev_id) tmp = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR); if (tmp & isr) writel_relaxed(~isr, ctrl->reg_base + SPU_IRQ_ISR); - } while ((isr = readl(ctrl->reg_base + SPU_IRQ_ISR)) & imask); + } while ((isr = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR)) & imask); return IRQ_HANDLED; } static u32 fmt_to_reg(struct mmp_overlay *overlay, int pix_fmt) { - u32 link_config = path_to_path_plat(overlay->path)->link_config; - u32 rbswap, uvswap = 0, yuvswap = 0, + u32 rbswap = 0, uvswap = 0, yuvswap = 0, csc_en = 0, val = 0, vid = overlay_is_vid(overlay); @@ -71,27 +70,23 @@ static u32 fmt_to_reg(struct mmp_overlay *overlay, int pix_fmt) case PIXFMT_RGB888PACK: case PIXFMT_RGB888UNPACK: case PIXFMT_RGBA888: - rbswap = !(link_config & 0x1); + rbswap = 1; break; case PIXFMT_VYUY: case PIXFMT_YVU422P: case PIXFMT_YVU420P: - rbswap = link_config & 0x1; uvswap = 1; break; case PIXFMT_YUYV: - rbswap = link_config & 0x1; yuvswap = 1; break; default: - rbswap = link_config & 0x1; break; } switch (pix_fmt) { case PIXFMT_RGB565: case PIXFMT_BGR565: - val = 0; break; case PIXFMT_RGB1555: case PIXFMT_BGR1555: @@ -147,17 +142,27 @@ static void dmafetch_set_fmt(struct mmp_overlay *overlay) static void overlay_set_win(struct mmp_overlay *overlay, struct mmp_win *win) { struct lcd_regs *regs = path_regs(overlay->path); - u32 pitch; /* assert win supported */ memcpy(&overlay->win, win, sizeof(struct mmp_win)); mutex_lock(&overlay->access_ok); - pitch = win->xsrc * pixfmt_to_stride(win->pix_fmt); - writel_relaxed(pitch, ®s->g_pitch); - writel_relaxed((win->ysrc << 16) | win->xsrc, ®s->g_size); - writel_relaxed((win->ydst << 16) | win->xdst, ®s->g_size_z); - writel_relaxed(0, ®s->g_start); + + if (overlay_is_vid(overlay)) { + writel_relaxed(win->pitch[0], ®s->v_pitch_yc); + writel_relaxed(win->pitch[2] << 16 | + win->pitch[1], ®s->v_pitch_uv); + + writel_relaxed((win->ysrc << 16) | win->xsrc, ®s->v_size); + writel_relaxed((win->ydst << 16) | win->xdst, ®s->v_size_z); + writel_relaxed(win->ypos << 16 | win->xpos, ®s->v_start); + } else { + writel_relaxed(win->pitch[0], ®s->g_pitch); + + writel_relaxed((win->ysrc << 16) | win->xsrc, ®s->g_size); + writel_relaxed((win->ydst << 16) | win->xdst, ®s->g_size_z); + writel_relaxed(win->ypos << 16 | win->xpos, ®s->g_start); + } dmafetch_set_fmt(overlay); mutex_unlock(&overlay->access_ok); @@ -239,7 +244,13 @@ static int overlay_set_addr(struct mmp_overlay *overlay, struct mmp_addr *addr) /* FIXME: assert addr supported */ memcpy(&overlay->addr, addr, sizeof(struct mmp_addr)); - writel(addr->phys[0], ®s->g_0); + + if (overlay_is_vid(overlay)) { + writel_relaxed(addr->phys[0], ®s->v_y0); + writel_relaxed(addr->phys[1], ®s->v_u0); + writel_relaxed(addr->phys[2], ®s->v_v0); + } else + writel_relaxed(addr->phys[0], ®s->g_0); return overlay->addr.phys[0]; } @@ -248,7 +259,8 @@ static void path_set_mode(struct mmp_path *path, struct mmp_mode *mode) { struct lcd_regs *regs = path_regs(path); u32 total_x, total_y, vsync_ctrl, tmp, sclk_src, sclk_div, - link_config = path_to_path_plat(path)->link_config; + link_config = path_to_path_plat(path)->link_config, + dsi_rbswap = path_to_path_plat(path)->link_config; /* FIXME: assert videomode supported */ memcpy(&path->mode, mode, sizeof(struct mmp_mode)); @@ -263,6 +275,12 @@ static void path_set_mode(struct mmp_path *path, struct mmp_mode *mode) tmp |= CFG_DUMB_ENA(1); writel_relaxed(tmp, ctrl_regs(path) + intf_ctrl(path->id)); + /* interface rb_swap setting */ + tmp = readl_relaxed(ctrl_regs(path) + intf_rbswap_ctrl(path->id)) & + (~(CFG_INTFRBSWAP_MASK)); + tmp |= dsi_rbswap & CFG_INTFRBSWAP_MASK; + writel_relaxed(tmp, ctrl_regs(path) + intf_rbswap_ctrl(path->id)); + writel_relaxed((mode->yres << 16) | mode->xres, ®s->screen_active); writel_relaxed((mode->left_margin << 16) | mode->right_margin, ®s->screen_h_porch); @@ -370,20 +388,12 @@ static void path_set_default(struct mmp_path *path) * bus arbiter for faster read if not tv path; * 2.enable horizontal smooth filter; */ - if (PATH_PN == path->id) { - mask = CFG_GRA_HSMOOTH_MASK | CFG_DMA_HSMOOTH_MASK - | CFG_ARBFAST_ENA(1); - tmp = readl_relaxed(ctrl_regs(path) + dma_ctrl(0, path->id)); - tmp |= mask; - writel_relaxed(tmp, ctrl_regs(path) + dma_ctrl(0, path->id)); - } else if (PATH_TV == path->id) { - mask = CFG_GRA_HSMOOTH_MASK | CFG_DMA_HSMOOTH_MASK - | CFG_ARBFAST_ENA(1); - tmp = readl_relaxed(ctrl_regs(path) + dma_ctrl(0, path->id)); - tmp &= ~mask; - tmp |= CFG_GRA_HSMOOTH_MASK | CFG_DMA_HSMOOTH_MASK; - writel_relaxed(tmp, ctrl_regs(path) + dma_ctrl(0, path->id)); - } + mask = CFG_GRA_HSMOOTH_MASK | CFG_DMA_HSMOOTH_MASK | CFG_ARBFAST_ENA(1); + tmp = readl_relaxed(ctrl_regs(path) + dma_ctrl(0, path->id)); + tmp |= mask; + if (PATH_TV == path->id) + tmp &= ~CFG_ARBFAST_ENA(1); + writel_relaxed(tmp, ctrl_regs(path) + dma_ctrl(0, path->id)); } static int path_init(struct mmphw_path_plat *path_plat, @@ -419,6 +429,7 @@ static int path_init(struct mmphw_path_plat *path_plat, path_plat->path = path; path_plat->path_config = config->path_config; path_plat->link_config = config->link_config; + path_plat->dsi_rbswap = config->dsi_rbswap; path_set_default(path); kfree(path_info); diff --git a/drivers/video/mmp/hw/mmp_ctrl.h b/drivers/video/mmp/hw/mmp_ctrl.h index edd2002b0e99..53301cfdb1ae 100644 --- a/drivers/video/mmp/hw/mmp_ctrl.h +++ b/drivers/video/mmp/hw/mmp_ctrl.h @@ -163,6 +163,8 @@ struct lcd_regs { #define LCD_SCLK(path) ((PATH_PN == path->id) ? LCD_CFG_SCLK_DIV :\ ((PATH_TV == path->id) ? LCD_TCLK_DIV : LCD_PN2_SCLK_DIV)) +#define intf_rbswap_ctrl(id) ((id) ? (((id) & 1) ? LCD_TVIF_CTRL : \ + PN2_IOPAD_CONTROL) : LCD_TOP_CTRL) /* dither configure */ #ifdef CONFIG_CPU_PXA988 @@ -615,6 +617,8 @@ struct lcd_regs { #define LCD_SPU_DUMB_CTRL 0x01B8 #define CFG_DUMBMODE(mode) ((mode)<<28) #define CFG_DUMBMODE_MASK 0xF0000000 +#define CFG_INTFRBSWAP(mode) ((mode)<<24) +#define CFG_INTFRBSWAP_MASK 0x0F000000 #define CFG_LCDGPIO_O(data) ((data)<<20) #define CFG_LCDGPIO_O_MASK 0x0FF00000 #define CFG_LCDGPIO_ENA(gpio) ((gpio)<<12) @@ -1427,6 +1431,7 @@ struct mmphw_path_plat { struct mmp_path *path; u32 path_config; u32 link_config; + u32 dsi_rbswap; }; /* mmp ctrl describes mmp controller related info */ diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index cfdb380ec81e..804f874d32d3 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -1354,7 +1354,7 @@ static struct fb_info *mx3fb_init_fbinfo(struct device *dev, struct fb_ops *ops) static int init_fb_chan(struct mx3fb_data *mx3fb, struct idmac_channel *ichan) { struct device *dev = mx3fb->dev; - struct mx3fb_platform_data *mx3fb_pdata = dev->platform_data; + struct mx3fb_platform_data *mx3fb_pdata = dev_get_platdata(dev); const char *name = mx3fb_pdata->name; unsigned int irq; struct fb_info *fbi; @@ -1462,7 +1462,7 @@ static bool chan_filter(struct dma_chan *chan, void *arg) return false; dev = rq->mx3fb->dev; - mx3fb_pdata = dev->platform_data; + mx3fb_pdata = dev_get_platdata(dev); return rq->id == chan->chan_id && mx3fb_pdata->dma_dev == chan->device->dev; diff --git a/drivers/video/neofb.c b/drivers/video/neofb.c index c172a5281f9e..44f99a60bb9b 100644 --- a/drivers/video/neofb.c +++ b/drivers/video/neofb.c @@ -2106,8 +2106,7 @@ static int neofb_probe(struct pci_dev *dev, const struct pci_device_id *id) if (err < 0) goto err_reg_fb; - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); /* * Our driver data @@ -2148,12 +2147,6 @@ static void neofb_remove(struct pci_dev *dev) fb_destroy_modedb(info->monspecs.modedb); neo_unmap_mmio(info); neo_free_fb_info(info); - - /* - * Ensure that the driver data is no longer - * valid. - */ - pci_set_drvdata(dev, NULL); } } diff --git a/drivers/video/nuc900fb.c b/drivers/video/nuc900fb.c index 796e5112ceee..478f9808dee4 100644 --- a/drivers/video/nuc900fb.c +++ b/drivers/video/nuc900fb.c @@ -91,7 +91,7 @@ static int nuc900fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct nuc900fb_info *fbi = info->par; - struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data; + struct nuc900fb_mach_info *mach_info = dev_get_platdata(fbi->dev); struct nuc900fb_display *display = NULL; struct nuc900fb_display *default_display = mach_info->displays + mach_info->default_display; @@ -358,7 +358,7 @@ static inline void modify_gpio(void __iomem *reg, static int nuc900fb_init_registers(struct fb_info *info) { struct nuc900fb_info *fbi = info->par; - struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data; + struct nuc900fb_mach_info *mach_info = dev_get_platdata(fbi->dev); void __iomem *regs = fbi->io; /*reset the display engine*/ @@ -512,7 +512,7 @@ static int nuc900fb_probe(struct platform_device *pdev) int size; dev_dbg(&pdev->dev, "devinit\n"); - mach_info = pdev->dev.platform_data; + mach_info = dev_get_platdata(&pdev->dev); if (mach_info == NULL) { dev_err(&pdev->dev, "no platform data for lcd, cannot attach\n"); @@ -647,8 +647,7 @@ static int nuc900fb_probe(struct platform_device *pdev) goto free_cpufreq; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - fbinfo->node, fbinfo->fix.id); + fb_info(fbinfo, "%s frame buffer device\n", fbinfo->fix.id); return 0; diff --git a/drivers/video/nvidia/nv_hw.c b/drivers/video/nvidia/nv_hw.c index ed20a9871b33..81c80ac3c76f 100644 --- a/drivers/video/nvidia/nv_hw.c +++ b/drivers/video/nvidia/nv_hw.c @@ -1300,7 +1300,7 @@ void NVLoadStateExt(struct nvidia_par *par, RIVA_HW_STATE * state) break; default: break; - }; + } NV_WR32(par->PGRAPH, 0x0b38, 0x2ffff800); NV_WR32(par->PGRAPH, 0x0b3c, 0x00006000); diff --git a/drivers/video/offb.c b/drivers/video/offb.c index 0c4f34311eda..9dbea2223401 100644 --- a/drivers/video/offb.c +++ b/drivers/video/offb.c @@ -515,8 +515,7 @@ static void __init offb_init_fb(const char *name, const char *full_name, if (register_framebuffer(info) < 0) goto out_err; - printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n", - info->node, full_name); + fb_info(info, "Open Firmware frame buffer device on %s\n", full_name); return; out_err: diff --git a/drivers/video/omap/hwa742.c b/drivers/video/omap/hwa742.c index f349ee6f0cea..a4ee65b8f918 100644 --- a/drivers/video/omap/hwa742.c +++ b/drivers/video/omap/hwa742.c @@ -947,7 +947,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode, hwa742.extif = fbdev->ext_if; hwa742.int_ctrl = fbdev->int_ctrl; - omapfb_conf = fbdev->dev->platform_data; + omapfb_conf = dev_get_platdata(fbdev->dev); hwa742.sys_ck = clk_get(NULL, "hwa_sys_ck"); diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c index d40612c31a98..e4fc6d9b5371 100644 --- a/drivers/video/omap/omapfb_main.c +++ b/drivers/video/omap/omapfb_main.c @@ -1602,7 +1602,7 @@ static int omapfb_find_ctrl(struct omapfb_device *fbdev) char name[17]; int i; - conf = fbdev->dev->platform_data; + conf = dev_get_platdata(fbdev->dev); fbdev->ctrl = NULL; @@ -1674,7 +1674,7 @@ static int omapfb_do_probe(struct platform_device *pdev, goto cleanup; } - if (pdev->dev.platform_data == NULL) { + if (dev_get_platdata(&pdev->dev) == NULL) { dev_err(&pdev->dev, "missing platform data\n"); r = -ENOENT; goto cleanup; diff --git a/drivers/video/omap2/displays-new/Kconfig b/drivers/video/omap2/displays-new/Kconfig index 10b25e7cd878..e6cfc38160d3 100644 --- a/drivers/video/omap2/displays-new/Kconfig +++ b/drivers/video/omap2/displays-new/Kconfig @@ -57,6 +57,12 @@ config DISPLAY_PANEL_SHARP_LS037V7DW01 help LCD Panel used in TI's SDP3430 and EVM boards +config DISPLAY_PANEL_TPO_TD028TTEC1 + tristate "TPO TD028TTEC1 LCD Panel" + depends on SPI + help + LCD panel used in Openmoko. + config DISPLAY_PANEL_TPO_TD043MTEA1 tristate "TPO TD043MTEA1 LCD Panel" depends on SPI diff --git a/drivers/video/omap2/displays-new/Makefile b/drivers/video/omap2/displays-new/Makefile index 5aeb11b8fcd5..0323a8a1c682 100644 --- a/drivers/video/omap2/displays-new/Makefile +++ b/drivers/video/omap2/displays-new/Makefile @@ -8,5 +8,6 @@ obj-$(CONFIG_DISPLAY_PANEL_DSI_CM) += panel-dsi-cm.o obj-$(CONFIG_DISPLAY_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o obj-$(CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o obj-$(CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o +obj-$(CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o obj-$(CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_DISPLAY_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o diff --git a/drivers/video/omap2/displays-new/connector-dvi.c b/drivers/video/omap2/displays-new/connector-dvi.c index 63d88ee6dfe4..b6c50904038e 100644 --- a/drivers/video/omap2/displays-new/connector-dvi.c +++ b/drivers/video/omap2/displays-new/connector-dvi.c @@ -262,6 +262,9 @@ static int dvic_probe_pdata(struct platform_device *pdev) in = omap_dss_find_output(pdata->source); if (in == NULL) { + if (ddata->i2c_adapter) + i2c_put_adapter(ddata->i2c_adapter); + dev_err(&pdev->dev, "Failed to find video source\n"); return -EPROBE_DEFER; } @@ -313,6 +316,10 @@ static int dvic_probe(struct platform_device *pdev) err_reg: omap_dss_put_device(ddata->in); + + if (ddata->i2c_adapter) + i2c_put_adapter(ddata->i2c_adapter); + return r; } diff --git a/drivers/video/omap2/displays-new/panel-dsi-cm.c b/drivers/video/omap2/displays-new/panel-dsi-cm.c index aaaea6469cd9..b7baafe83aa3 100644 --- a/drivers/video/omap2/displays-new/panel-dsi-cm.c +++ b/drivers/video/omap2/displays-new/panel-dsi-cm.c @@ -599,7 +599,7 @@ static int dsicm_power_on(struct panel_drv_data *ddata) if (r) { dev_err(&ddata->pdev->dev, "failed to configure DSI pins\n"); goto err0; - }; + } r = in->ops.dsi->set_config(in, &dsi_config); if (r) { diff --git a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c b/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c new file mode 100644 index 000000000000..9a08908fe998 --- /dev/null +++ b/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c @@ -0,0 +1,480 @@ +/* + * Toppoly TD028TTEC1 panel support + * + * Copyright (C) 2008 Nokia Corporation + * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> + * + * Neo 1973 code (jbt6k74.c): + * Copyright (C) 2006-2007 by OpenMoko, Inc. + * Author: Harald Welte <laforge@openmoko.org> + * + * Ported and adapted from Neo 1973 U-Boot by: + * H. Nikolaus Schaller <hns@goldelico.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/spi/spi.h> +#include <linux/gpio.h> +#include <video/omapdss.h> +#include <video/omap-panel-data.h> + +struct panel_drv_data { + struct omap_dss_device dssdev; + struct omap_dss_device *in; + + int data_lines; + + struct omap_video_timings videomode; + + struct spi_device *spi_dev; +}; + +static struct omap_video_timings td028ttec1_panel_timings = { + .x_res = 480, + .y_res = 640, + .pixel_clock = 22153, + .hfp = 24, + .hsw = 8, + .hbp = 8, + .vfp = 4, + .vsw = 2, + .vbp = 2, + + .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, + .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, + + .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE, + .de_level = OMAPDSS_SIG_ACTIVE_HIGH, + .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, +}; + +#define JBT_COMMAND 0x000 +#define JBT_DATA 0x100 + +static int jbt_ret_write_0(struct panel_drv_data *ddata, u8 reg) +{ + int rc; + u16 tx_buf = JBT_COMMAND | reg; + + rc = spi_write(ddata->spi_dev, (u8 *)&tx_buf, + 1*sizeof(u16)); + if (rc != 0) + dev_err(&ddata->spi_dev->dev, + "jbt_ret_write_0 spi_write ret %d\n", rc); + + return rc; +} + +static int jbt_reg_write_1(struct panel_drv_data *ddata, u8 reg, u8 data) +{ + int rc; + u16 tx_buf[2]; + + tx_buf[0] = JBT_COMMAND | reg; + tx_buf[1] = JBT_DATA | data; + rc = spi_write(ddata->spi_dev, (u8 *)tx_buf, + 2*sizeof(u16)); + if (rc != 0) + dev_err(&ddata->spi_dev->dev, + "jbt_reg_write_1 spi_write ret %d\n", rc); + + return rc; +} + +static int jbt_reg_write_2(struct panel_drv_data *ddata, u8 reg, u16 data) +{ + int rc; + u16 tx_buf[3]; + + tx_buf[0] = JBT_COMMAND | reg; + tx_buf[1] = JBT_DATA | (data >> 8); + tx_buf[2] = JBT_DATA | (data & 0xff); + + rc = spi_write(ddata->spi_dev, (u8 *)tx_buf, + 3*sizeof(u16)); + + if (rc != 0) + dev_err(&ddata->spi_dev->dev, + "jbt_reg_write_2 spi_write ret %d\n", rc); + + return rc; +} + +enum jbt_register { + JBT_REG_SLEEP_IN = 0x10, + JBT_REG_SLEEP_OUT = 0x11, + + JBT_REG_DISPLAY_OFF = 0x28, + JBT_REG_DISPLAY_ON = 0x29, + + JBT_REG_RGB_FORMAT = 0x3a, + JBT_REG_QUAD_RATE = 0x3b, + + JBT_REG_POWER_ON_OFF = 0xb0, + JBT_REG_BOOSTER_OP = 0xb1, + JBT_REG_BOOSTER_MODE = 0xb2, + JBT_REG_BOOSTER_FREQ = 0xb3, + JBT_REG_OPAMP_SYSCLK = 0xb4, + JBT_REG_VSC_VOLTAGE = 0xb5, + JBT_REG_VCOM_VOLTAGE = 0xb6, + JBT_REG_EXT_DISPL = 0xb7, + JBT_REG_OUTPUT_CONTROL = 0xb8, + JBT_REG_DCCLK_DCEV = 0xb9, + JBT_REG_DISPLAY_MODE1 = 0xba, + JBT_REG_DISPLAY_MODE2 = 0xbb, + JBT_REG_DISPLAY_MODE = 0xbc, + JBT_REG_ASW_SLEW = 0xbd, + JBT_REG_DUMMY_DISPLAY = 0xbe, + JBT_REG_DRIVE_SYSTEM = 0xbf, + + JBT_REG_SLEEP_OUT_FR_A = 0xc0, + JBT_REG_SLEEP_OUT_FR_B = 0xc1, + JBT_REG_SLEEP_OUT_FR_C = 0xc2, + JBT_REG_SLEEP_IN_LCCNT_D = 0xc3, + JBT_REG_SLEEP_IN_LCCNT_E = 0xc4, + JBT_REG_SLEEP_IN_LCCNT_F = 0xc5, + JBT_REG_SLEEP_IN_LCCNT_G = 0xc6, + + JBT_REG_GAMMA1_FINE_1 = 0xc7, + JBT_REG_GAMMA1_FINE_2 = 0xc8, + JBT_REG_GAMMA1_INCLINATION = 0xc9, + JBT_REG_GAMMA1_BLUE_OFFSET = 0xca, + + JBT_REG_BLANK_CONTROL = 0xcf, + JBT_REG_BLANK_TH_TV = 0xd0, + JBT_REG_CKV_ON_OFF = 0xd1, + JBT_REG_CKV_1_2 = 0xd2, + JBT_REG_OEV_TIMING = 0xd3, + JBT_REG_ASW_TIMING_1 = 0xd4, + JBT_REG_ASW_TIMING_2 = 0xd5, + + JBT_REG_HCLOCK_VGA = 0xec, + JBT_REG_HCLOCK_QVGA = 0xed, +}; + +#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) + +static int td028ttec1_panel_connect(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + int r; + + if (omapdss_device_is_connected(dssdev)) + return 0; + + r = in->ops.dpi->connect(in, dssdev); + if (r) + return r; + + return 0; +} + +static void td028ttec1_panel_disconnect(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + + if (!omapdss_device_is_connected(dssdev)) + return; + + in->ops.dpi->disconnect(in, dssdev); +} + +static int td028ttec1_panel_enable(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + int r; + + if (!omapdss_device_is_connected(dssdev)) + return -ENODEV; + + if (omapdss_device_is_enabled(dssdev)) + return 0; + + in->ops.dpi->set_data_lines(in, ddata->data_lines); + in->ops.dpi->set_timings(in, &ddata->videomode); + + r = in->ops.dpi->enable(in); + if (r) + return r; + + dev_dbg(dssdev->dev, "td028ttec1_panel_enable() - state %d\n", + dssdev->state); + + /* three times command zero */ + r |= jbt_ret_write_0(ddata, 0x00); + usleep_range(1000, 2000); + r |= jbt_ret_write_0(ddata, 0x00); + usleep_range(1000, 2000); + r |= jbt_ret_write_0(ddata, 0x00); + usleep_range(1000, 2000); + + if (r) { + dev_warn(dssdev->dev, "transfer error\n"); + goto transfer_err; + } + + /* deep standby out */ + r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x17); + + /* RGB I/F on, RAM write off, QVGA through, SIGCON enable */ + r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE, 0x80); + + /* Quad mode off */ + r |= jbt_reg_write_1(ddata, JBT_REG_QUAD_RATE, 0x00); + + /* AVDD on, XVDD on */ + r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x16); + + /* Output control */ + r |= jbt_reg_write_2(ddata, JBT_REG_OUTPUT_CONTROL, 0xfff9); + + /* Sleep mode off */ + r |= jbt_ret_write_0(ddata, JBT_REG_SLEEP_OUT); + + /* at this point we have like 50% grey */ + + /* initialize register set */ + r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE1, 0x01); + r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE2, 0x00); + r |= jbt_reg_write_1(ddata, JBT_REG_RGB_FORMAT, 0x60); + r |= jbt_reg_write_1(ddata, JBT_REG_DRIVE_SYSTEM, 0x10); + r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_OP, 0x56); + r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_MODE, 0x33); + r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11); + r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11); + r |= jbt_reg_write_1(ddata, JBT_REG_OPAMP_SYSCLK, 0x02); + r |= jbt_reg_write_1(ddata, JBT_REG_VSC_VOLTAGE, 0x2b); + r |= jbt_reg_write_1(ddata, JBT_REG_VCOM_VOLTAGE, 0x40); + r |= jbt_reg_write_1(ddata, JBT_REG_EXT_DISPL, 0x03); + r |= jbt_reg_write_1(ddata, JBT_REG_DCCLK_DCEV, 0x04); + /* + * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement + * to avoid red / blue flicker + */ + r |= jbt_reg_write_1(ddata, JBT_REG_ASW_SLEW, 0x04); + r |= jbt_reg_write_1(ddata, JBT_REG_DUMMY_DISPLAY, 0x00); + + r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_A, 0x11); + r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_B, 0x11); + r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_C, 0x11); + r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040); + r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0); + r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020); + r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0); + + r |= jbt_reg_write_2(ddata, JBT_REG_GAMMA1_FINE_1, 0x5533); + r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_FINE_2, 0x00); + r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_INCLINATION, 0x00); + r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00); + + r |= jbt_reg_write_2(ddata, JBT_REG_HCLOCK_VGA, 0x1f0); + r |= jbt_reg_write_1(ddata, JBT_REG_BLANK_CONTROL, 0x02); + r |= jbt_reg_write_2(ddata, JBT_REG_BLANK_TH_TV, 0x0804); + + r |= jbt_reg_write_1(ddata, JBT_REG_CKV_ON_OFF, 0x01); + r |= jbt_reg_write_2(ddata, JBT_REG_CKV_1_2, 0x0000); + + r |= jbt_reg_write_2(ddata, JBT_REG_OEV_TIMING, 0x0d0e); + r |= jbt_reg_write_2(ddata, JBT_REG_ASW_TIMING_1, 0x11a4); + r |= jbt_reg_write_1(ddata, JBT_REG_ASW_TIMING_2, 0x0e); + + r |= jbt_ret_write_0(ddata, JBT_REG_DISPLAY_ON); + + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; + +transfer_err: + + return r ? -EIO : 0; +} + +static void td028ttec1_panel_disable(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + + if (!omapdss_device_is_enabled(dssdev)) + return; + + dev_dbg(dssdev->dev, "td028ttec1_panel_disable()\n"); + + jbt_ret_write_0(ddata, JBT_REG_DISPLAY_OFF); + jbt_reg_write_2(ddata, JBT_REG_OUTPUT_CONTROL, 0x8002); + jbt_ret_write_0(ddata, JBT_REG_SLEEP_IN); + jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x00); + + in->ops.dpi->disable(in); + + dssdev->state = OMAP_DSS_DISPLAY_DISABLED; +} + +static void td028ttec1_panel_set_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + + ddata->videomode = *timings; + dssdev->panel.timings = *timings; + + in->ops.dpi->set_timings(in, timings); +} + +static void td028ttec1_panel_get_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + + *timings = ddata->videomode; +} + +static int td028ttec1_panel_check_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + + return in->ops.dpi->check_timings(in, timings); +} + +static struct omap_dss_driver td028ttec1_ops = { + .connect = td028ttec1_panel_connect, + .disconnect = td028ttec1_panel_disconnect, + + .enable = td028ttec1_panel_enable, + .disable = td028ttec1_panel_disable, + + .set_timings = td028ttec1_panel_set_timings, + .get_timings = td028ttec1_panel_get_timings, + .check_timings = td028ttec1_panel_check_timings, +}; + +static int td028ttec1_panel_probe_pdata(struct spi_device *spi) +{ + const struct panel_tpo_td028ttec1_platform_data *pdata; + struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); + struct omap_dss_device *dssdev, *in; + + pdata = dev_get_platdata(&spi->dev); + + in = omap_dss_find_output(pdata->source); + if (in == NULL) { + dev_err(&spi->dev, "failed to find video source '%s'\n", + pdata->source); + return -EPROBE_DEFER; + } + + ddata->in = in; + + ddata->data_lines = pdata->data_lines; + + dssdev = &ddata->dssdev; + dssdev->name = pdata->name; + + return 0; +} + +static int td028ttec1_panel_probe(struct spi_device *spi) +{ + struct panel_drv_data *ddata; + struct omap_dss_device *dssdev; + int r; + + dev_dbg(&spi->dev, "%s\n", __func__); + + spi->bits_per_word = 9; + spi->mode = SPI_MODE_3; + + r = spi_setup(spi); + if (r < 0) { + dev_err(&spi->dev, "spi_setup failed: %d\n", r); + return r; + } + + ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL); + if (ddata == NULL) + return -ENOMEM; + + dev_set_drvdata(&spi->dev, ddata); + + ddata->spi_dev = spi; + + if (dev_get_platdata(&spi->dev)) { + r = td028ttec1_panel_probe_pdata(spi); + if (r) + return r; + } else { + return -ENODEV; + } + + ddata->videomode = td028ttec1_panel_timings; + + dssdev = &ddata->dssdev; + dssdev->dev = &spi->dev; + dssdev->driver = &td028ttec1_ops; + dssdev->type = OMAP_DISPLAY_TYPE_DPI; + dssdev->owner = THIS_MODULE; + dssdev->panel.timings = ddata->videomode; + dssdev->phy.dpi.data_lines = ddata->data_lines; + + r = omapdss_register_display(dssdev); + if (r) { + dev_err(&spi->dev, "Failed to register panel\n"); + goto err_reg; + } + + return 0; + +err_reg: + omap_dss_put_device(ddata->in); + return r; +} + +static int td028ttec1_panel_remove(struct spi_device *spi) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); + struct omap_dss_device *dssdev = &ddata->dssdev; + struct omap_dss_device *in = ddata->in; + + dev_dbg(&ddata->spi_dev->dev, "%s\n", __func__); + + omapdss_unregister_display(dssdev); + + td028ttec1_panel_disable(dssdev); + td028ttec1_panel_disconnect(dssdev); + + omap_dss_put_device(in); + + return 0; +} + +static struct spi_driver td028ttec1_spi_driver = { + .probe = td028ttec1_panel_probe, + .remove = td028ttec1_panel_remove, + + .driver = { + .name = "panel-tpo-td028ttec1", + .owner = THIS_MODULE, + }, +}; + +module_spi_driver(td028ttec1_spi_driver); + +MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>"); +MODULE_DESCRIPTION("Toppoly TD028TTEC1 panel driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile index 94832eb06a3d..d3aa91bdd6a8 100644 --- a/drivers/video/omap2/dss/Makefile +++ b/drivers/video/omap2/dss/Makefile @@ -10,5 +10,6 @@ omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o -omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o ti_hdmi_4xxx_ip.o +omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi4.o hdmi_common.o hdmi_wp.o hdmi_pll.o \ + hdmi_phy.o hdmi4_core.o ccflags-$(CONFIG_OMAP2_DSS_DEBUG) += -DDEBUG diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c index 60d3958d04f7..ffa45c894cd4 100644 --- a/drivers/video/omap2/dss/core.c +++ b/drivers/video/omap2/dss/core.c @@ -266,7 +266,7 @@ static int (*dss_output_drv_reg_funcs[])(void) __initdata = { venc_init_platform_driver, #endif #ifdef CONFIG_OMAP4_DSS_HDMI - hdmi_init_platform_driver, + hdmi4_init_platform_driver, #endif }; @@ -287,7 +287,7 @@ static void (*dss_output_drv_unreg_funcs[])(void) __exitdata = { venc_uninit_platform_driver, #endif #ifdef CONFIG_OMAP4_DSS_HDMI - hdmi_uninit_platform_driver, + hdmi4_uninit_platform_driver, #endif }; diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 477975009eee..4ec59ca72e5d 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2352,7 +2352,7 @@ int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, { enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); bool five_taps = true; - bool fieldmode = 0; + bool fieldmode = false; u16 in_height = oi->height; u16 in_width = oi->width; bool ilace = timings->interlace; @@ -2365,7 +2365,7 @@ int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, out_height = oi->out_height == 0 ? oi->height : oi->out_height; if (ilace && oi->height == out_height) - fieldmode = 1; + fieldmode = true; if (ilace) { if (fieldmode) @@ -2396,7 +2396,7 @@ static int dispc_ovl_setup_common(enum omap_plane plane, bool mem_to_mem) { bool five_taps = true; - bool fieldmode = 0; + bool fieldmode = false; int r, cconv = 0; unsigned offset0, offset1; s32 row_inc; @@ -2417,7 +2417,7 @@ static int dispc_ovl_setup_common(enum omap_plane plane, out_height = out_height == 0 ? height : out_height; if (ilace && height == out_height) - fieldmode = 1; + fieldmode = true; if (ilace) { if (fieldmode) @@ -2918,7 +2918,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw, break; default: BUG(); - }; + } l = dispc_read_reg(DISPC_POL_FREQ(channel)); l |= FLD_VAL(onoff, 17, 17); diff --git a/drivers/video/omap2/dss/display.c b/drivers/video/omap2/dss/display.c index fafe7c941a60..669a81fdf58e 100644 --- a/drivers/video/omap2/dss/display.c +++ b/drivers/video/omap2/dss/display.c @@ -266,7 +266,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, OMAPDSS_SIG_ACTIVE_LOW; ovt->de_level = vm->flags & DISPLAY_FLAGS_DE_HIGH ? OMAPDSS_SIG_ACTIVE_HIGH : - OMAPDSS_SIG_ACTIVE_HIGH; + OMAPDSS_SIG_ACTIVE_LOW; ovt->data_pclk_edge = vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE ? OMAPDSS_DRIVE_SIG_RISING_EDGE : OMAPDSS_DRIVE_SIG_FALLING_EDGE; diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index a598b5812285..6056b27cf73c 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -312,7 +312,7 @@ struct dsi_data { struct dsi_isr_tables isr_tables_copy; int update_channel; -#ifdef DEBUG +#ifdef DSI_PERF_MEASURE unsigned update_bytes; #endif @@ -334,7 +334,7 @@ struct dsi_data { u32 errors; spinlock_t errors_lock; -#ifdef DEBUG +#ifdef DSI_PERF_MEASURE ktime_t perf_setup_time; ktime_t perf_start_time; #endif @@ -373,7 +373,7 @@ struct dsi_packet_sent_handler_data { struct completion *completion; }; -#ifdef DEBUG +#ifdef DSI_PERF_MEASURE static bool dsi_perf; module_param(dsi_perf, bool, 0644); #endif @@ -497,7 +497,7 @@ u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) } } -#ifdef DEBUG +#ifdef DSI_PERF_MEASURE static void dsi_perf_mark_setup(struct platform_device *dsidev) { struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); @@ -4066,7 +4066,7 @@ static int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel) default: r = -EINVAL; goto err_pix_fmt; - }; + } dsi_if_enable(dsidev, false); dsi_vc_enable(dsidev, channel, false); @@ -4277,7 +4277,7 @@ static int dsi_update(struct omap_dss_device *dssdev, int channel, dw = dsi->timings.x_res; dh = dsi->timings.y_res; -#ifdef DEBUG +#ifdef DSI_PERF_MEASURE dsi->update_bytes = dw * dh * dsi_get_pixel_size(dsi->pix_fmt) / 8; #endif diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index e172531d196b..f538e867c0f8 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -427,8 +427,8 @@ int venc_init_platform_driver(void) __init; void venc_uninit_platform_driver(void) __exit; /* HDMI */ -int hdmi_init_platform_driver(void) __init; -void hdmi_uninit_platform_driver(void) __exit; +int hdmi4_init_platform_driver(void) __init; +void hdmi4_uninit_platform_driver(void) __exit; /* RFBI */ int rfbi_init_platform_driver(void) __init; diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index b9cfebb378a2..f8fd6dbacabc 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c @@ -789,50 +789,6 @@ static const struct omap_dss_features omap5_dss_features = { .burst_size_unit = 16, }; -#if defined(CONFIG_OMAP4_DSS_HDMI) -/* HDMI OMAP4 Functions*/ -static const struct ti_hdmi_ip_ops omap4_hdmi_functions = { - - .video_configure = ti_hdmi_4xxx_basic_configure, - .phy_enable = ti_hdmi_4xxx_phy_enable, - .phy_disable = ti_hdmi_4xxx_phy_disable, - .read_edid = ti_hdmi_4xxx_read_edid, - .pll_enable = ti_hdmi_4xxx_pll_enable, - .pll_disable = ti_hdmi_4xxx_pll_disable, - .video_enable = ti_hdmi_4xxx_wp_video_start, - .video_disable = ti_hdmi_4xxx_wp_video_stop, - .dump_wrapper = ti_hdmi_4xxx_wp_dump, - .dump_core = ti_hdmi_4xxx_core_dump, - .dump_pll = ti_hdmi_4xxx_pll_dump, - .dump_phy = ti_hdmi_4xxx_phy_dump, -#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) - .audio_enable = ti_hdmi_4xxx_wp_audio_enable, - .audio_disable = ti_hdmi_4xxx_wp_audio_disable, - .audio_start = ti_hdmi_4xxx_audio_start, - .audio_stop = ti_hdmi_4xxx_audio_stop, - .audio_config = ti_hdmi_4xxx_audio_config, - .audio_get_dma_port = ti_hdmi_4xxx_audio_get_dma_port, -#endif - -}; - -void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data, - enum omapdss_version version) -{ - switch (version) { - case OMAPDSS_VER_OMAP4430_ES1: - case OMAPDSS_VER_OMAP4430_ES2: - case OMAPDSS_VER_OMAP4: - ip_data->ops = &omap4_hdmi_functions; - break; - default: - ip_data->ops = NULL; - } - - WARN_ON(ip_data->ops == NULL); -} -#endif - /* Functions returning values related to a DSS feature */ int dss_feat_get_num_mgrs(void) { diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index 489b9bec4a6d..10b0556e1352 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h @@ -20,10 +20,6 @@ #ifndef __OMAP2_DSS_FEATURES_H #define __OMAP2_DSS_FEATURES_H -#if defined(CONFIG_OMAP4_DSS_HDMI) -#include "ti_hdmi.h" -#endif - #define MAX_DSS_MANAGERS 4 #define MAX_DSS_OVERLAYS 4 #define MAX_DSS_LCD_MANAGERS 3 @@ -117,8 +113,4 @@ bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type); bool dss_has_feature(enum dss_feat_id id); void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); void dss_features_init(enum omapdss_version version); -#if defined(CONFIG_OMAP4_DSS_HDMI) -void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data, - enum omapdss_version version); -#endif #endif diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c deleted file mode 100644 index 82a964074993..000000000000 --- a/drivers/video/omap2/dss/hdmi.c +++ /dev/null @@ -1,1184 +0,0 @@ -/* - * hdmi.c - * - * HDMI interface DSS driver setting for TI's OMAP4 family of processor. - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * Authors: Yong Zhi - * Mythri pk <mythripk@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "HDMI" - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <linux/mutex.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> -#include <linux/clk.h> -#include <linux/gpio.h> -#include <linux/regulator/consumer.h> -#include <video/omapdss.h> - -#include "ti_hdmi.h" -#include "dss.h" -#include "dss_features.h" - -#define HDMI_WP 0x0 -#define HDMI_CORE_SYS 0x400 -#define HDMI_CORE_AV 0x900 -#define HDMI_PLLCTRL 0x200 -#define HDMI_PHY 0x300 - -/* HDMI EDID Length move this */ -#define HDMI_EDID_MAX_LENGTH 256 -#define EDID_TIMING_DESCRIPTOR_SIZE 0x12 -#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36 -#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80 -#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4 -#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4 - -#define HDMI_DEFAULT_REGN 16 -#define HDMI_DEFAULT_REGM2 1 - -static struct { - struct mutex lock; - struct platform_device *pdev; - - struct hdmi_ip_data ip_data; - - struct clk *sys_clk; - struct regulator *vdda_hdmi_dac_reg; - - bool core_enabled; - - struct omap_dss_device output; -} hdmi; - -/* - * Logic for the below structure : - * user enters the CEA or VESA timings by specifying the HDMI/DVI code. - * There is a correspondence between CEA/VESA timing and code, please - * refer to section 6.3 in HDMI 1.3 specification for timing code. - * - * In the below structure, cea_vesa_timings corresponds to all OMAP4 - * supported CEA and VESA timing values.code_cea corresponds to the CEA - * code, It is used to get the timing from cea_vesa_timing array.Similarly - * with code_vesa. Code_index is used for back mapping, that is once EDID - * is read from the TV, EDID is parsed to find the timing values and then - * map it to corresponding CEA or VESA index. - */ - -static const struct hdmi_config cea_timings[] = { - { - { 640, 480, 25200, 96, 16, 48, 2, 10, 33, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 1, HDMI_HDMI }, - }, - { - { 720, 480, 27027, 62, 16, 60, 6, 9, 30, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 2, HDMI_HDMI }, - }, - { - { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 4, HDMI_HDMI }, - }, - { - { 1920, 540, 74250, 44, 88, 148, 5, 2, 15, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - true, }, - { 5, HDMI_HDMI }, - }, - { - { 1440, 240, 27027, 124, 38, 114, 3, 4, 15, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - true, }, - { 6, HDMI_HDMI }, - }, - { - { 1920, 1080, 148500, 44, 88, 148, 5, 4, 36, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 16, HDMI_HDMI }, - }, - { - { 720, 576, 27000, 64, 12, 68, 5, 5, 39, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 17, HDMI_HDMI }, - }, - { - { 1280, 720, 74250, 40, 440, 220, 5, 5, 20, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 19, HDMI_HDMI }, - }, - { - { 1920, 540, 74250, 44, 528, 148, 5, 2, 15, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - true, }, - { 20, HDMI_HDMI }, - }, - { - { 1440, 288, 27000, 126, 24, 138, 3, 2, 19, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - true, }, - { 21, HDMI_HDMI }, - }, - { - { 1440, 576, 54000, 128, 24, 136, 5, 5, 39, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 29, HDMI_HDMI }, - }, - { - { 1920, 1080, 148500, 44, 528, 148, 5, 4, 36, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 31, HDMI_HDMI }, - }, - { - { 1920, 1080, 74250, 44, 638, 148, 5, 4, 36, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 32, HDMI_HDMI }, - }, - { - { 2880, 480, 108108, 248, 64, 240, 6, 9, 30, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 35, HDMI_HDMI }, - }, - { - { 2880, 576, 108000, 256, 48, 272, 5, 5, 39, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 37, HDMI_HDMI }, - }, -}; - -static const struct hdmi_config vesa_timings[] = { -/* VESA From Here */ - { - { 640, 480, 25175, 96, 16, 48, 2, 11, 31, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 4, HDMI_DVI }, - }, - { - { 800, 600, 40000, 128, 40, 88, 4, 1, 23, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 9, HDMI_DVI }, - }, - { - { 848, 480, 33750, 112, 16, 112, 8, 6, 23, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0xE, HDMI_DVI }, - }, - { - { 1280, 768, 79500, 128, 64, 192, 7, 3, 20, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 0x17, HDMI_DVI }, - }, - { - { 1280, 800, 83500, 128, 72, 200, 6, 3, 22, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 0x1C, HDMI_DVI }, - }, - { - { 1360, 768, 85500, 112, 64, 256, 6, 3, 18, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x27, HDMI_DVI }, - }, - { - { 1280, 960, 108000, 112, 96, 312, 3, 1, 36, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x20, HDMI_DVI }, - }, - { - { 1280, 1024, 108000, 112, 48, 248, 3, 1, 38, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x23, HDMI_DVI }, - }, - { - { 1024, 768, 65000, 136, 24, 160, 6, 3, 29, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 0x10, HDMI_DVI }, - }, - { - { 1400, 1050, 121750, 144, 88, 232, 4, 3, 32, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 0x2A, HDMI_DVI }, - }, - { - { 1440, 900, 106500, 152, 80, 232, 6, 3, 25, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 0x2F, HDMI_DVI }, - }, - { - { 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, - false, }, - { 0x3A, HDMI_DVI }, - }, - { - { 1366, 768, 85500, 143, 70, 213, 3, 3, 24, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x51, HDMI_DVI }, - }, - { - { 1920, 1080, 148500, 44, 148, 80, 5, 4, 36, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x52, HDMI_DVI }, - }, - { - { 1280, 768, 68250, 32, 48, 80, 7, 3, 12, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x16, HDMI_DVI }, - }, - { - { 1400, 1050, 101000, 32, 48, 80, 4, 3, 23, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x29, HDMI_DVI }, - }, - { - { 1680, 1050, 119000, 32, 48, 80, 6, 3, 21, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x39, HDMI_DVI }, - }, - { - { 1280, 800, 79500, 32, 48, 80, 6, 3, 14, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x1B, HDMI_DVI }, - }, - { - { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, - OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x55, HDMI_DVI }, - }, - { - { 1920, 1200, 154000, 32, 48, 80, 6, 3, 26, - OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, - false, }, - { 0x44, HDMI_DVI }, - }, -}; - -static int hdmi_runtime_get(void) -{ - int r; - - DSSDBG("hdmi_runtime_get\n"); - - r = pm_runtime_get_sync(&hdmi.pdev->dev); - WARN_ON(r < 0); - if (r < 0) - return r; - - return 0; -} - -static void hdmi_runtime_put(void) -{ - int r; - - DSSDBG("hdmi_runtime_put\n"); - - r = pm_runtime_put_sync(&hdmi.pdev->dev); - WARN_ON(r < 0 && r != -ENOSYS); -} - -static int hdmi_init_regulator(void) -{ - struct regulator *reg; - - if (hdmi.vdda_hdmi_dac_reg != NULL) - return 0; - - reg = devm_regulator_get(&hdmi.pdev->dev, "vdda_hdmi_dac"); - - /* DT HACK: try VDAC to make omapdss work for o4 sdp/panda */ - if (IS_ERR(reg)) - reg = devm_regulator_get(&hdmi.pdev->dev, "VDAC"); - - if (IS_ERR(reg)) { - DSSERR("can't get VDDA_HDMI_DAC regulator\n"); - return PTR_ERR(reg); - } - - hdmi.vdda_hdmi_dac_reg = reg; - - return 0; -} - -static const struct hdmi_config *hdmi_find_timing( - const struct hdmi_config *timings_arr, - int len) -{ - int i; - - for (i = 0; i < len; i++) { - if (timings_arr[i].cm.code == hdmi.ip_data.cfg.cm.code) - return &timings_arr[i]; - } - return NULL; -} - -static const struct hdmi_config *hdmi_get_timings(void) -{ - const struct hdmi_config *arr; - int len; - - if (hdmi.ip_data.cfg.cm.mode == HDMI_DVI) { - arr = vesa_timings; - len = ARRAY_SIZE(vesa_timings); - } else { - arr = cea_timings; - len = ARRAY_SIZE(cea_timings); - } - - return hdmi_find_timing(arr, len); -} - -static bool hdmi_timings_compare(struct omap_video_timings *timing1, - const struct omap_video_timings *timing2) -{ - int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; - - if ((DIV_ROUND_CLOSEST(timing2->pixel_clock, 1000) == - DIV_ROUND_CLOSEST(timing1->pixel_clock, 1000)) && - (timing2->x_res == timing1->x_res) && - (timing2->y_res == timing1->y_res)) { - - timing2_hsync = timing2->hfp + timing2->hsw + timing2->hbp; - timing1_hsync = timing1->hfp + timing1->hsw + timing1->hbp; - timing2_vsync = timing2->vfp + timing2->vsw + timing2->vbp; - timing1_vsync = timing2->vfp + timing2->vsw + timing2->vbp; - - DSSDBG("timing1_hsync = %d timing1_vsync = %d"\ - "timing2_hsync = %d timing2_vsync = %d\n", - timing1_hsync, timing1_vsync, - timing2_hsync, timing2_vsync); - - if ((timing1_hsync == timing2_hsync) && - (timing1_vsync == timing2_vsync)) { - return true; - } - } - return false; -} - -static struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing) -{ - int i; - struct hdmi_cm cm = {-1}; - DSSDBG("hdmi_get_code\n"); - - for (i = 0; i < ARRAY_SIZE(cea_timings); i++) { - if (hdmi_timings_compare(timing, &cea_timings[i].timings)) { - cm = cea_timings[i].cm; - goto end; - } - } - for (i = 0; i < ARRAY_SIZE(vesa_timings); i++) { - if (hdmi_timings_compare(timing, &vesa_timings[i].timings)) { - cm = vesa_timings[i].cm; - goto end; - } - } - -end: return cm; - -} - -static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, - struct hdmi_pll_info *pi) -{ - unsigned long clkin, refclk; - u32 mf; - - clkin = clk_get_rate(hdmi.sys_clk) / 10000; - /* - * Input clock is predivided by N + 1 - * out put of which is reference clk - */ - - pi->regn = HDMI_DEFAULT_REGN; - - refclk = clkin / pi->regn; - - pi->regm2 = HDMI_DEFAULT_REGM2; - - /* - * multiplier is pixel_clk/ref_clk - * Multiplying by 100 to avoid fractional part removal - */ - pi->regm = phy * pi->regm2 / refclk; - - /* - * fractional multiplier is remainder of the difference between - * multiplier and actual phy(required pixel clock thus should be - * multiplied by 2^18(262144) divided by the reference clock - */ - mf = (phy - pi->regm / pi->regm2 * refclk) * 262144; - pi->regmf = pi->regm2 * mf / refclk; - - /* - * Dcofreq should be set to 1 if required pixel clock - * is greater than 1000MHz - */ - pi->dcofreq = phy > 1000 * 100; - pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10; - - /* Set the reference clock to sysclk reference */ - pi->refsel = HDMI_REFSEL_SYSCLK; - - DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); - DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd); -} - -static int hdmi_power_on_core(struct omap_dss_device *dssdev) -{ - int r; - - r = regulator_enable(hdmi.vdda_hdmi_dac_reg); - if (r) - return r; - - r = hdmi_runtime_get(); - if (r) - goto err_runtime_get; - - /* Make selection of HDMI in DSS */ - dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); - - hdmi.core_enabled = true; - - return 0; - -err_runtime_get: - regulator_disable(hdmi.vdda_hdmi_dac_reg); - - return r; -} - -static void hdmi_power_off_core(struct omap_dss_device *dssdev) -{ - hdmi.core_enabled = false; - - hdmi_runtime_put(); - regulator_disable(hdmi.vdda_hdmi_dac_reg); -} - -static int hdmi_power_on_full(struct omap_dss_device *dssdev) -{ - int r; - struct omap_video_timings *p; - struct omap_overlay_manager *mgr = hdmi.output.manager; - unsigned long phy; - - r = hdmi_power_on_core(dssdev); - if (r) - return r; - - dss_mgr_disable(mgr); - - p = &hdmi.ip_data.cfg.timings; - - DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); - - phy = p->pixel_clock; - - hdmi_compute_pll(dssdev, phy, &hdmi.ip_data.pll_data); - - hdmi.ip_data.ops->video_disable(&hdmi.ip_data); - - /* config the PLL and PHY hdmi_set_pll_pwrfirst */ - r = hdmi.ip_data.ops->pll_enable(&hdmi.ip_data); - if (r) { - DSSDBG("Failed to lock PLL\n"); - goto err_pll_enable; - } - - r = hdmi.ip_data.ops->phy_enable(&hdmi.ip_data); - if (r) { - DSSDBG("Failed to start PHY\n"); - goto err_phy_enable; - } - - hdmi.ip_data.ops->video_configure(&hdmi.ip_data); - - /* bypass TV gamma table */ - dispc_enable_gamma_table(0); - - /* tv size */ - dss_mgr_set_timings(mgr, p); - - r = hdmi.ip_data.ops->video_enable(&hdmi.ip_data); - if (r) - goto err_vid_enable; - - r = dss_mgr_enable(mgr); - if (r) - goto err_mgr_enable; - - return 0; - -err_mgr_enable: - hdmi.ip_data.ops->video_disable(&hdmi.ip_data); -err_vid_enable: - hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); -err_phy_enable: - hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); -err_pll_enable: - hdmi_power_off_core(dssdev); - return -EIO; -} - -static void hdmi_power_off_full(struct omap_dss_device *dssdev) -{ - struct omap_overlay_manager *mgr = hdmi.output.manager; - - dss_mgr_disable(mgr); - - hdmi.ip_data.ops->video_disable(&hdmi.ip_data); - hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); - hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); - - hdmi_power_off_core(dssdev); -} - -static int hdmi_display_check_timing(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - struct hdmi_cm cm; - - cm = hdmi_get_code(timings); - if (cm.code == -1) { - return -EINVAL; - } - - return 0; - -} - -static void hdmi_display_set_timing(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - struct hdmi_cm cm; - const struct hdmi_config *t; - - mutex_lock(&hdmi.lock); - - cm = hdmi_get_code(timings); - hdmi.ip_data.cfg.cm = cm; - - t = hdmi_get_timings(); - if (t != NULL) { - hdmi.ip_data.cfg = *t; - - dispc_set_tv_pclk(t->timings.pixel_clock * 1000); - } - - mutex_unlock(&hdmi.lock); -} - -static void hdmi_display_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - const struct hdmi_config *cfg; - - cfg = hdmi_get_timings(); - if (cfg == NULL) - cfg = &vesa_timings[0]; - - memcpy(timings, &cfg->timings, sizeof(cfg->timings)); -} - -static void hdmi_dump_regs(struct seq_file *s) -{ - mutex_lock(&hdmi.lock); - - if (hdmi_runtime_get()) { - mutex_unlock(&hdmi.lock); - return; - } - - hdmi.ip_data.ops->dump_wrapper(&hdmi.ip_data, s); - hdmi.ip_data.ops->dump_pll(&hdmi.ip_data, s); - hdmi.ip_data.ops->dump_phy(&hdmi.ip_data, s); - hdmi.ip_data.ops->dump_core(&hdmi.ip_data, s); - - hdmi_runtime_put(); - mutex_unlock(&hdmi.lock); -} - -static int read_edid(u8 *buf, int len) -{ - int r; - - mutex_lock(&hdmi.lock); - - r = hdmi_runtime_get(); - BUG_ON(r); - - r = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, buf, len); - - hdmi_runtime_put(); - mutex_unlock(&hdmi.lock); - - return r; -} - -static int hdmi_display_enable(struct omap_dss_device *dssdev) -{ - struct omap_dss_device *out = &hdmi.output; - int r = 0; - - DSSDBG("ENTER hdmi_display_enable\n"); - - mutex_lock(&hdmi.lock); - - if (out == NULL || out->manager == NULL) { - DSSERR("failed to enable display: no output/manager\n"); - r = -ENODEV; - goto err0; - } - - r = hdmi_power_on_full(dssdev); - if (r) { - DSSERR("failed to power on device\n"); - goto err0; - } - - mutex_unlock(&hdmi.lock); - return 0; - -err0: - mutex_unlock(&hdmi.lock); - return r; -} - -static void hdmi_display_disable(struct omap_dss_device *dssdev) -{ - DSSDBG("Enter hdmi_display_disable\n"); - - mutex_lock(&hdmi.lock); - - hdmi_power_off_full(dssdev); - - mutex_unlock(&hdmi.lock); -} - -static int hdmi_core_enable(struct omap_dss_device *dssdev) -{ - int r = 0; - - DSSDBG("ENTER omapdss_hdmi_core_enable\n"); - - mutex_lock(&hdmi.lock); - - r = hdmi_power_on_core(dssdev); - if (r) { - DSSERR("failed to power on device\n"); - goto err0; - } - - mutex_unlock(&hdmi.lock); - return 0; - -err0: - mutex_unlock(&hdmi.lock); - return r; -} - -static void hdmi_core_disable(struct omap_dss_device *dssdev) -{ - DSSDBG("Enter omapdss_hdmi_core_disable\n"); - - mutex_lock(&hdmi.lock); - - hdmi_power_off_core(dssdev); - - mutex_unlock(&hdmi.lock); -} - -static int hdmi_get_clocks(struct platform_device *pdev) -{ - struct clk *clk; - - clk = devm_clk_get(&pdev->dev, "sys_clk"); - if (IS_ERR(clk)) { - DSSERR("can't get sys_clk\n"); - return PTR_ERR(clk); - } - - hdmi.sys_clk = clk; - - return 0; -} - -#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) -int hdmi_compute_acr(u32 sample_freq, u32 *n, u32 *cts) -{ - u32 deep_color; - bool deep_color_correct = false; - u32 pclk = hdmi.ip_data.cfg.timings.pixel_clock; - - if (n == NULL || cts == NULL) - return -EINVAL; - - /* TODO: When implemented, query deep color mode here. */ - deep_color = 100; - - /* - * When using deep color, the default N value (as in the HDMI - * specification) yields to an non-integer CTS. Hence, we - * modify it while keeping the restrictions described in - * section 7.2.1 of the HDMI 1.4a specification. - */ - switch (sample_freq) { - case 32000: - case 48000: - case 96000: - case 192000: - if (deep_color == 125) - if (pclk == 27027 || pclk == 74250) - deep_color_correct = true; - if (deep_color == 150) - if (pclk == 27027) - deep_color_correct = true; - break; - case 44100: - case 88200: - case 176400: - if (deep_color == 125) - if (pclk == 27027) - deep_color_correct = true; - break; - default: - return -EINVAL; - } - - if (deep_color_correct) { - switch (sample_freq) { - case 32000: - *n = 8192; - break; - case 44100: - *n = 12544; - break; - case 48000: - *n = 8192; - break; - case 88200: - *n = 25088; - break; - case 96000: - *n = 16384; - break; - case 176400: - *n = 50176; - break; - case 192000: - *n = 32768; - break; - default: - return -EINVAL; - } - } else { - switch (sample_freq) { - case 32000: - *n = 4096; - break; - case 44100: - *n = 6272; - break; - case 48000: - *n = 6144; - break; - case 88200: - *n = 12544; - break; - case 96000: - *n = 12288; - break; - case 176400: - *n = 25088; - break; - case 192000: - *n = 24576; - break; - default: - return -EINVAL; - } - } - /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ - *cts = pclk * (*n / 128) * deep_color / (sample_freq / 10); - - return 0; -} - -static bool hdmi_mode_has_audio(void) -{ - if (hdmi.ip_data.cfg.cm.mode == HDMI_HDMI) - return true; - else - return false; -} - -#endif - -static int hdmi_connect(struct omap_dss_device *dssdev, - struct omap_dss_device *dst) -{ - struct omap_overlay_manager *mgr; - int r; - - dss_init_hdmi_ip_ops(&hdmi.ip_data, omapdss_get_version()); - - r = hdmi_init_regulator(); - if (r) - return r; - - mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); - if (!mgr) - return -ENODEV; - - r = dss_mgr_connect(mgr, dssdev); - if (r) - return r; - - r = omapdss_output_set_device(dssdev, dst); - if (r) { - DSSERR("failed to connect output to new device: %s\n", - dst->name); - dss_mgr_disconnect(mgr, dssdev); - return r; - } - - return 0; -} - -static void hdmi_disconnect(struct omap_dss_device *dssdev, - struct omap_dss_device *dst) -{ - WARN_ON(dst != dssdev->dst); - - if (dst != dssdev->dst) - return; - - omapdss_output_unset_device(dssdev); - - if (dssdev->manager) - dss_mgr_disconnect(dssdev->manager, dssdev); -} - -static int hdmi_read_edid(struct omap_dss_device *dssdev, - u8 *edid, int len) -{ - bool need_enable; - int r; - - need_enable = hdmi.core_enabled == false; - - if (need_enable) { - r = hdmi_core_enable(dssdev); - if (r) - return r; - } - - r = read_edid(edid, len); - - if (need_enable) - hdmi_core_disable(dssdev); - - return r; -} - -#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) -static int hdmi_audio_enable(struct omap_dss_device *dssdev) -{ - int r; - - mutex_lock(&hdmi.lock); - - if (!hdmi_mode_has_audio()) { - r = -EPERM; - goto err; - } - - - r = hdmi.ip_data.ops->audio_enable(&hdmi.ip_data); - if (r) - goto err; - - mutex_unlock(&hdmi.lock); - return 0; - -err: - mutex_unlock(&hdmi.lock); - return r; -} - -static void hdmi_audio_disable(struct omap_dss_device *dssdev) -{ - hdmi.ip_data.ops->audio_disable(&hdmi.ip_data); -} - -static int hdmi_audio_start(struct omap_dss_device *dssdev) -{ - return hdmi.ip_data.ops->audio_start(&hdmi.ip_data); -} - -static void hdmi_audio_stop(struct omap_dss_device *dssdev) -{ - hdmi.ip_data.ops->audio_stop(&hdmi.ip_data); -} - -static bool hdmi_audio_supported(struct omap_dss_device *dssdev) -{ - bool r; - - mutex_lock(&hdmi.lock); - - r = hdmi_mode_has_audio(); - - mutex_unlock(&hdmi.lock); - return r; -} - -static int hdmi_audio_config(struct omap_dss_device *dssdev, - struct omap_dss_audio *audio) -{ - int r; - - mutex_lock(&hdmi.lock); - - if (!hdmi_mode_has_audio()) { - r = -EPERM; - goto err; - } - - r = hdmi.ip_data.ops->audio_config(&hdmi.ip_data, audio); - if (r) - goto err; - - mutex_unlock(&hdmi.lock); - return 0; - -err: - mutex_unlock(&hdmi.lock); - return r; -} -#else -static int hdmi_audio_enable(struct omap_dss_device *dssdev) -{ - return -EPERM; -} - -static void hdmi_audio_disable(struct omap_dss_device *dssdev) -{ -} - -static int hdmi_audio_start(struct omap_dss_device *dssdev) -{ - return -EPERM; -} - -static void hdmi_audio_stop(struct omap_dss_device *dssdev) -{ -} - -static bool hdmi_audio_supported(struct omap_dss_device *dssdev) -{ - return false; -} - -static int hdmi_audio_config(struct omap_dss_device *dssdev, - struct omap_dss_audio *audio) -{ - return -EPERM; -} -#endif - -static const struct omapdss_hdmi_ops hdmi_ops = { - .connect = hdmi_connect, - .disconnect = hdmi_disconnect, - - .enable = hdmi_display_enable, - .disable = hdmi_display_disable, - - .check_timings = hdmi_display_check_timing, - .set_timings = hdmi_display_set_timing, - .get_timings = hdmi_display_get_timings, - - .read_edid = hdmi_read_edid, - - .audio_enable = hdmi_audio_enable, - .audio_disable = hdmi_audio_disable, - .audio_start = hdmi_audio_start, - .audio_stop = hdmi_audio_stop, - .audio_supported = hdmi_audio_supported, - .audio_config = hdmi_audio_config, -}; - -static void hdmi_init_output(struct platform_device *pdev) -{ - struct omap_dss_device *out = &hdmi.output; - - out->dev = &pdev->dev; - out->id = OMAP_DSS_OUTPUT_HDMI; - out->output_type = OMAP_DISPLAY_TYPE_HDMI; - out->name = "hdmi.0"; - out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; - out->ops.hdmi = &hdmi_ops; - out->owner = THIS_MODULE; - - omapdss_register_output(out); -} - -static void __exit hdmi_uninit_output(struct platform_device *pdev) -{ - struct omap_dss_device *out = &hdmi.output; - - omapdss_unregister_output(out); -} - -/* HDMI HW IP initialisation */ -static int omapdss_hdmihw_probe(struct platform_device *pdev) -{ - struct resource *res; - int r; - - hdmi.pdev = pdev; - - mutex_init(&hdmi.lock); - mutex_init(&hdmi.ip_data.lock); - - res = platform_get_resource(hdmi.pdev, IORESOURCE_MEM, 0); - - /* Base address taken from platform */ - hdmi.ip_data.base_wp = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(hdmi.ip_data.base_wp)) - return PTR_ERR(hdmi.ip_data.base_wp); - - hdmi.ip_data.irq = platform_get_irq(pdev, 0); - if (hdmi.ip_data.irq < 0) { - DSSERR("platform_get_irq failed\n"); - return -ENODEV; - } - - r = hdmi_get_clocks(pdev); - if (r) { - DSSERR("can't get clocks\n"); - return r; - } - - pm_runtime_enable(&pdev->dev); - - hdmi.ip_data.core_sys_offset = HDMI_CORE_SYS; - hdmi.ip_data.core_av_offset = HDMI_CORE_AV; - hdmi.ip_data.pll_offset = HDMI_PLLCTRL; - hdmi.ip_data.phy_offset = HDMI_PHY; - - hdmi_init_output(pdev); - - dss_debugfs_create_file("hdmi", hdmi_dump_regs); - - return 0; -} - -static int __exit omapdss_hdmihw_remove(struct platform_device *pdev) -{ - hdmi_uninit_output(pdev); - - pm_runtime_disable(&pdev->dev); - - return 0; -} - -static int hdmi_runtime_suspend(struct device *dev) -{ - clk_disable_unprepare(hdmi.sys_clk); - - dispc_runtime_put(); - - return 0; -} - -static int hdmi_runtime_resume(struct device *dev) -{ - int r; - - r = dispc_runtime_get(); - if (r < 0) - return r; - - clk_prepare_enable(hdmi.sys_clk); - - return 0; -} - -static const struct dev_pm_ops hdmi_pm_ops = { - .runtime_suspend = hdmi_runtime_suspend, - .runtime_resume = hdmi_runtime_resume, -}; - -static struct platform_driver omapdss_hdmihw_driver = { - .probe = omapdss_hdmihw_probe, - .remove = __exit_p(omapdss_hdmihw_remove), - .driver = { - .name = "omapdss_hdmi", - .owner = THIS_MODULE, - .pm = &hdmi_pm_ops, - }, -}; - -int __init hdmi_init_platform_driver(void) -{ - return platform_driver_register(&omapdss_hdmihw_driver); -} - -void __exit hdmi_uninit_platform_driver(void) -{ - platform_driver_unregister(&omapdss_hdmihw_driver); -} diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h new file mode 100644 index 000000000000..b0493768a5d7 --- /dev/null +++ b/drivers/video/omap2/dss/hdmi.h @@ -0,0 +1,444 @@ +/* + * HDMI driver definition for TI OMAP4 Processor. + * + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _HDMI_H +#define _HDMI_H + +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <video/omapdss.h> + +#include "dss.h" + +/* HDMI Wrapper */ + +#define HDMI_WP_REVISION 0x0 +#define HDMI_WP_SYSCONFIG 0x10 +#define HDMI_WP_IRQSTATUS_RAW 0x24 +#define HDMI_WP_IRQSTATUS 0x28 +#define HDMI_WP_IRQENABLE_SET 0x2C +#define HDMI_WP_IRQENABLE_CLR 0x30 +#define HDMI_WP_IRQWAKEEN 0x34 +#define HDMI_WP_PWR_CTRL 0x40 +#define HDMI_WP_DEBOUNCE 0x44 +#define HDMI_WP_VIDEO_CFG 0x50 +#define HDMI_WP_VIDEO_SIZE 0x60 +#define HDMI_WP_VIDEO_TIMING_H 0x68 +#define HDMI_WP_VIDEO_TIMING_V 0x6C +#define HDMI_WP_WP_CLK 0x70 +#define HDMI_WP_AUDIO_CFG 0x80 +#define HDMI_WP_AUDIO_CFG2 0x84 +#define HDMI_WP_AUDIO_CTRL 0x88 +#define HDMI_WP_AUDIO_DATA 0x8C + +/* HDMI WP IRQ flags */ + +#define HDMI_IRQ_OCP_TIMEOUT (1 << 4) +#define HDMI_IRQ_AUDIO_FIFO_UNDERFLOW (1 << 8) +#define HDMI_IRQ_AUDIO_FIFO_OVERFLOW (1 << 9) +#define HDMI_IRQ_AUDIO_FIFO_SAMPLE_REQ (1 << 10) +#define HDMI_IRQ_VIDEO_VSYNC (1 << 16) +#define HDMI_IRQ_VIDEO_FRAME_DONE (1 << 17) +#define HDMI_IRQ_PHY_LINE5V_ASSERT (1 << 24) +#define HDMI_IRQ_LINK_CONNECT (1 << 25) +#define HDMI_IRQ_LINK_DISCONNECT (1 << 26) +#define HDMI_IRQ_PLL_LOCK (1 << 29) +#define HDMI_IRQ_PLL_UNLOCK (1 << 30) +#define HDMI_IRQ_PLL_RECAL (1 << 31) + +/* HDMI PLL */ + +#define PLLCTRL_PLL_CONTROL 0x0 +#define PLLCTRL_PLL_STATUS 0x4 +#define PLLCTRL_PLL_GO 0x8 +#define PLLCTRL_CFG1 0xC +#define PLLCTRL_CFG2 0x10 +#define PLLCTRL_CFG3 0x14 +#define PLLCTRL_SSC_CFG1 0x18 +#define PLLCTRL_SSC_CFG2 0x1C +#define PLLCTRL_CFG4 0x20 + +/* HDMI PHY */ + +#define HDMI_TXPHY_TX_CTRL 0x0 +#define HDMI_TXPHY_DIGITAL_CTRL 0x4 +#define HDMI_TXPHY_POWER_CTRL 0x8 +#define HDMI_TXPHY_PAD_CFG_CTRL 0xC + +enum hdmi_pll_pwr { + HDMI_PLLPWRCMD_ALLOFF = 0, + HDMI_PLLPWRCMD_PLLONLY = 1, + HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2, + HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3 +}; + +enum hdmi_phy_pwr { + HDMI_PHYPWRCMD_OFF = 0, + HDMI_PHYPWRCMD_LDOON = 1, + HDMI_PHYPWRCMD_TXON = 2 +}; + +enum hdmi_core_hdmi_dvi { + HDMI_DVI = 0, + HDMI_HDMI = 1 +}; + +enum hdmi_clk_refsel { + HDMI_REFSEL_PCLK = 0, + HDMI_REFSEL_REF1 = 1, + HDMI_REFSEL_REF2 = 2, + HDMI_REFSEL_SYSCLK = 3 +}; + +enum hdmi_packing_mode { + HDMI_PACK_10b_RGB_YUV444 = 0, + HDMI_PACK_24b_RGB_YUV444_YUV422 = 1, + HDMI_PACK_20b_YUV422 = 2, + HDMI_PACK_ALREADYPACKED = 7 +}; + +enum hdmi_stereo_channels { + HDMI_AUDIO_STEREO_NOCHANNELS = 0, + HDMI_AUDIO_STEREO_ONECHANNEL = 1, + HDMI_AUDIO_STEREO_TWOCHANNELS = 2, + HDMI_AUDIO_STEREO_THREECHANNELS = 3, + HDMI_AUDIO_STEREO_FOURCHANNELS = 4 +}; + +enum hdmi_audio_type { + HDMI_AUDIO_TYPE_LPCM = 0, + HDMI_AUDIO_TYPE_IEC = 1 +}; + +enum hdmi_audio_justify { + HDMI_AUDIO_JUSTIFY_LEFT = 0, + HDMI_AUDIO_JUSTIFY_RIGHT = 1 +}; + +enum hdmi_audio_sample_order { + HDMI_AUDIO_SAMPLE_RIGHT_FIRST = 0, + HDMI_AUDIO_SAMPLE_LEFT_FIRST = 1 +}; + +enum hdmi_audio_samples_perword { + HDMI_AUDIO_ONEWORD_ONESAMPLE = 0, + HDMI_AUDIO_ONEWORD_TWOSAMPLES = 1 +}; + +enum hdmi_audio_sample_size { + HDMI_AUDIO_SAMPLE_16BITS = 0, + HDMI_AUDIO_SAMPLE_24BITS = 1 +}; + +enum hdmi_audio_transf_mode { + HDMI_AUDIO_TRANSF_DMA = 0, + HDMI_AUDIO_TRANSF_IRQ = 1 +}; + +enum hdmi_audio_blk_strt_end_sig { + HDMI_AUDIO_BLOCK_SIG_STARTEND_ON = 0, + HDMI_AUDIO_BLOCK_SIG_STARTEND_OFF = 1 +}; + +enum hdmi_core_audio_layout { + HDMI_AUDIO_LAYOUT_2CH = 0, + HDMI_AUDIO_LAYOUT_8CH = 1 +}; + +enum hdmi_core_cts_mode { + HDMI_AUDIO_CTS_MODE_HW = 0, + HDMI_AUDIO_CTS_MODE_SW = 1 +}; + +enum hdmi_audio_mclk_mode { + HDMI_AUDIO_MCLK_128FS = 0, + HDMI_AUDIO_MCLK_256FS = 1, + HDMI_AUDIO_MCLK_384FS = 2, + HDMI_AUDIO_MCLK_512FS = 3, + HDMI_AUDIO_MCLK_768FS = 4, + HDMI_AUDIO_MCLK_1024FS = 5, + HDMI_AUDIO_MCLK_1152FS = 6, + HDMI_AUDIO_MCLK_192FS = 7 +}; + +/* INFOFRAME_AVI_ and INFOFRAME_AUDIO_ definitions */ +enum hdmi_core_infoframe { + HDMI_INFOFRAME_AVI_DB1Y_RGB = 0, + HDMI_INFOFRAME_AVI_DB1Y_YUV422 = 1, + HDMI_INFOFRAME_AVI_DB1Y_YUV444 = 2, + HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF = 0, + HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_ON = 1, + HDMI_INFOFRAME_AVI_DB1B_NO = 0, + HDMI_INFOFRAME_AVI_DB1B_VERT = 1, + HDMI_INFOFRAME_AVI_DB1B_HORI = 2, + HDMI_INFOFRAME_AVI_DB1B_VERTHORI = 3, + HDMI_INFOFRAME_AVI_DB1S_0 = 0, + HDMI_INFOFRAME_AVI_DB1S_1 = 1, + HDMI_INFOFRAME_AVI_DB1S_2 = 2, + HDMI_INFOFRAME_AVI_DB2C_NO = 0, + HDMI_INFOFRAME_AVI_DB2C_ITU601 = 1, + HDMI_INFOFRAME_AVI_DB2C_ITU709 = 2, + HDMI_INFOFRAME_AVI_DB2C_EC_EXTENDED = 3, + HDMI_INFOFRAME_AVI_DB2M_NO = 0, + HDMI_INFOFRAME_AVI_DB2M_43 = 1, + HDMI_INFOFRAME_AVI_DB2M_169 = 2, + HDMI_INFOFRAME_AVI_DB2R_SAME = 8, + HDMI_INFOFRAME_AVI_DB2R_43 = 9, + HDMI_INFOFRAME_AVI_DB2R_169 = 10, + HDMI_INFOFRAME_AVI_DB2R_149 = 11, + HDMI_INFOFRAME_AVI_DB3ITC_NO = 0, + HDMI_INFOFRAME_AVI_DB3ITC_YES = 1, + HDMI_INFOFRAME_AVI_DB3EC_XVYUV601 = 0, + HDMI_INFOFRAME_AVI_DB3EC_XVYUV709 = 1, + HDMI_INFOFRAME_AVI_DB3Q_DEFAULT = 0, + HDMI_INFOFRAME_AVI_DB3Q_LR = 1, + HDMI_INFOFRAME_AVI_DB3Q_FR = 2, + HDMI_INFOFRAME_AVI_DB3SC_NO = 0, + HDMI_INFOFRAME_AVI_DB3SC_HORI = 1, + HDMI_INFOFRAME_AVI_DB3SC_VERT = 2, + HDMI_INFOFRAME_AVI_DB3SC_HORIVERT = 3, + HDMI_INFOFRAME_AVI_DB5PR_NO = 0, + HDMI_INFOFRAME_AVI_DB5PR_2 = 1, + HDMI_INFOFRAME_AVI_DB5PR_3 = 2, + HDMI_INFOFRAME_AVI_DB5PR_4 = 3, + HDMI_INFOFRAME_AVI_DB5PR_5 = 4, + HDMI_INFOFRAME_AVI_DB5PR_6 = 5, + HDMI_INFOFRAME_AVI_DB5PR_7 = 6, + HDMI_INFOFRAME_AVI_DB5PR_8 = 7, + HDMI_INFOFRAME_AVI_DB5PR_9 = 8, + HDMI_INFOFRAME_AVI_DB5PR_10 = 9, +}; + +struct hdmi_cm { + int code; + int mode; +}; + +struct hdmi_video_format { + enum hdmi_packing_mode packing_mode; + u32 y_res; /* Line per panel */ + u32 x_res; /* pixel per line */ +}; + +struct hdmi_config { + struct omap_video_timings timings; + struct hdmi_cm cm; +}; + +/* HDMI PLL structure */ +struct hdmi_pll_info { + u16 regn; + u16 regm; + u32 regmf; + u16 regm2; + u16 regsd; + u16 dcofreq; + enum hdmi_clk_refsel refsel; +}; + +struct hdmi_audio_format { + enum hdmi_stereo_channels stereo_channels; + u8 active_chnnls_msk; + enum hdmi_audio_type type; + enum hdmi_audio_justify justification; + enum hdmi_audio_sample_order sample_order; + enum hdmi_audio_samples_perword samples_per_word; + enum hdmi_audio_sample_size sample_size; + enum hdmi_audio_blk_strt_end_sig en_sig_blk_strt_end; +}; + +struct hdmi_audio_dma { + u8 transfer_size; + u8 block_size; + enum hdmi_audio_transf_mode mode; + u16 fifo_threshold; +}; + +struct hdmi_core_audio_i2s_config { + u8 in_length_bits; + u8 justification; + u8 sck_edge_mode; + u8 vbit; + u8 direction; + u8 shift; + u8 active_sds; +}; + +struct hdmi_core_audio_config { + struct hdmi_core_audio_i2s_config i2s_cfg; + struct snd_aes_iec958 *iec60958_cfg; + bool fs_override; + u32 n; + u32 cts; + u32 aud_par_busclk; + enum hdmi_core_audio_layout layout; + enum hdmi_core_cts_mode cts_mode; + bool use_mclk; + enum hdmi_audio_mclk_mode mclk_mode; + bool en_acr_pkt; + bool en_dsd_audio; + bool en_parallel_aud_input; + bool en_spdif; +}; + +/* + * Refer to section 8.2 in HDMI 1.3 specification for + * details about infoframe databytes + */ +struct hdmi_core_infoframe_avi { + /* Y0, Y1 rgb,yCbCr */ + u8 db1_format; + /* A0 Active information Present */ + u8 db1_active_info; + /* B0, B1 Bar info data valid */ + u8 db1_bar_info_dv; + /* S0, S1 scan information */ + u8 db1_scan_info; + /* C0, C1 colorimetry */ + u8 db2_colorimetry; + /* M0, M1 Aspect ratio (4:3, 16:9) */ + u8 db2_aspect_ratio; + /* R0...R3 Active format aspect ratio */ + u8 db2_active_fmt_ar; + /* ITC IT content. */ + u8 db3_itc; + /* EC0, EC1, EC2 Extended colorimetry */ + u8 db3_ec; + /* Q1, Q0 Quantization range */ + u8 db3_q_range; + /* SC1, SC0 Non-uniform picture scaling */ + u8 db3_nup_scaling; + /* VIC0..6 Video format identification */ + u8 db4_videocode; + /* PR0..PR3 Pixel repetition factor */ + u8 db5_pixel_repeat; + /* Line number end of top bar */ + u16 db6_7_line_eoftop; + /* Line number start of bottom bar */ + u16 db8_9_line_sofbottom; + /* Pixel number end of left bar */ + u16 db10_11_pixel_eofleft; + /* Pixel number start of right bar */ + u16 db12_13_pixel_sofright; +}; + +struct hdmi_wp_data { + void __iomem *base; +}; + +struct hdmi_pll_data { + void __iomem *base; + + struct hdmi_pll_info info; +}; + +struct hdmi_phy_data { + void __iomem *base; + + int irq; +}; + +struct hdmi_core_data { + void __iomem *base; + + struct hdmi_core_infoframe_avi avi_cfg; +}; + +static inline void hdmi_write_reg(void __iomem *base_addr, const u16 idx, + u32 val) +{ + __raw_writel(val, base_addr + idx); +} + +static inline u32 hdmi_read_reg(void __iomem *base_addr, const u16 idx) +{ + return __raw_readl(base_addr + idx); +} + +#define REG_FLD_MOD(base, idx, val, start, end) \ + hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\ + val, start, end)) +#define REG_GET(base, idx, start, end) \ + FLD_GET(hdmi_read_reg(base, idx), start, end) + +static inline int hdmi_wait_for_bit_change(void __iomem *base_addr, + const u16 idx, int b2, int b1, u32 val) +{ + u32 t = 0; + while (val != REG_GET(base_addr, idx, b2, b1)) { + udelay(1); + if (t++ > 10000) + return !val; + } + return val; +} + +/* HDMI wrapper funcs */ +int hdmi_wp_video_start(struct hdmi_wp_data *wp); +void hdmi_wp_video_stop(struct hdmi_wp_data *wp); +void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s); +u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp); +void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus); +void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask); +void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask); +int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val); +int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val); +void hdmi_wp_video_config_format(struct hdmi_wp_data *wp, + struct hdmi_video_format *video_fmt); +void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp, + struct omap_video_timings *timings); +void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp, + struct omap_video_timings *timings); +void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, + struct omap_video_timings *timings, struct hdmi_config *param); +int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp); + +/* HDMI PLL funcs */ +int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp); +void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp); +void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s); +void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin, int phy); +int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll); + +/* HDMI PHY funcs */ +int hdmi_phy_enable(struct hdmi_phy_data *phy, struct hdmi_wp_data *wp, + struct hdmi_config *cfg); +void hdmi_phy_disable(struct hdmi_phy_data *phy, struct hdmi_wp_data *wp); +void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s); +int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy); + +/* HDMI common funcs */ +const struct hdmi_config *hdmi_default_timing(void); +const struct hdmi_config *hdmi_get_timings(int mode, int code); +struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing); + +#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) +int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts); +int hdmi_wp_audio_enable(struct hdmi_wp_data *wp, bool enable); +int hdmi_wp_audio_core_req_enable(struct hdmi_wp_data *wp, bool enable); +void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp, + struct hdmi_audio_format *aud_fmt); +void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp, + struct hdmi_audio_dma *aud_dma); +static inline bool hdmi_mode_has_audio(int mode) +{ + return mode == HDMI_HDMI ? true : false; +} +#endif +#endif diff --git a/drivers/video/omap2/dss/hdmi4.c b/drivers/video/omap2/dss/hdmi4.c new file mode 100644 index 000000000000..e14009614338 --- /dev/null +++ b/drivers/video/omap2/dss/hdmi4.c @@ -0,0 +1,696 @@ +/* + * HDMI interface DSS driver for TI's OMAP4 family of SoCs. + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * Authors: Yong Zhi + * Mythri pk <mythripk@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#define DSS_SUBSYS_NAME "HDMI" + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/mutex.h> +#include <linux/delay.h> +#include <linux/string.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/clk.h> +#include <linux/gpio.h> +#include <linux/regulator/consumer.h> +#include <video/omapdss.h> + +#include "hdmi4_core.h" +#include "dss.h" +#include "dss_features.h" + +static struct { + struct mutex lock; + struct platform_device *pdev; + + struct hdmi_wp_data wp; + struct hdmi_pll_data pll; + struct hdmi_phy_data phy; + struct hdmi_core_data core; + + struct hdmi_config cfg; + + struct clk *sys_clk; + struct regulator *vdda_hdmi_dac_reg; + + bool core_enabled; + + struct omap_dss_device output; +} hdmi; + +static int hdmi_runtime_get(void) +{ + int r; + + DSSDBG("hdmi_runtime_get\n"); + + r = pm_runtime_get_sync(&hdmi.pdev->dev); + WARN_ON(r < 0); + if (r < 0) + return r; + + return 0; +} + +static void hdmi_runtime_put(void) +{ + int r; + + DSSDBG("hdmi_runtime_put\n"); + + r = pm_runtime_put_sync(&hdmi.pdev->dev); + WARN_ON(r < 0 && r != -ENOSYS); +} + +static int hdmi_init_regulator(void) +{ + struct regulator *reg; + + if (hdmi.vdda_hdmi_dac_reg != NULL) + return 0; + + reg = devm_regulator_get(&hdmi.pdev->dev, "vdda_hdmi_dac"); + + /* DT HACK: try VDAC to make omapdss work for o4 sdp/panda */ + if (IS_ERR(reg)) + reg = devm_regulator_get(&hdmi.pdev->dev, "VDAC"); + + if (IS_ERR(reg)) { + DSSERR("can't get VDDA_HDMI_DAC regulator\n"); + return PTR_ERR(reg); + } + + hdmi.vdda_hdmi_dac_reg = reg; + + return 0; +} + +static int hdmi_power_on_core(struct omap_dss_device *dssdev) +{ + int r; + + r = regulator_enable(hdmi.vdda_hdmi_dac_reg); + if (r) + return r; + + r = hdmi_runtime_get(); + if (r) + goto err_runtime_get; + + /* Make selection of HDMI in DSS */ + dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); + + hdmi.core_enabled = true; + + return 0; + +err_runtime_get: + regulator_disable(hdmi.vdda_hdmi_dac_reg); + + return r; +} + +static void hdmi_power_off_core(struct omap_dss_device *dssdev) +{ + hdmi.core_enabled = false; + + hdmi_runtime_put(); + regulator_disable(hdmi.vdda_hdmi_dac_reg); +} + +static int hdmi_power_on_full(struct omap_dss_device *dssdev) +{ + int r; + struct omap_video_timings *p; + struct omap_overlay_manager *mgr = hdmi.output.manager; + unsigned long phy; + + r = hdmi_power_on_core(dssdev); + if (r) + return r; + + dss_mgr_disable(mgr); + + p = &hdmi.cfg.timings; + + DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); + + phy = p->pixel_clock; + + hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy); + + hdmi_wp_video_stop(&hdmi.wp); + + /* config the PLL and PHY hdmi_set_pll_pwrfirst */ + r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp); + if (r) { + DSSDBG("Failed to lock PLL\n"); + goto err_pll_enable; + } + + r = hdmi_phy_enable(&hdmi.phy, &hdmi.wp, &hdmi.cfg); + if (r) { + DSSDBG("Failed to start PHY\n"); + goto err_phy_enable; + } + + hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg); + + /* bypass TV gamma table */ + dispc_enable_gamma_table(0); + + /* tv size */ + dss_mgr_set_timings(mgr, p); + + r = hdmi_wp_video_start(&hdmi.wp); + if (r) + goto err_vid_enable; + + r = dss_mgr_enable(mgr); + if (r) + goto err_mgr_enable; + + return 0; + +err_mgr_enable: + hdmi_wp_video_stop(&hdmi.wp); +err_vid_enable: + hdmi_phy_disable(&hdmi.phy, &hdmi.wp); +err_phy_enable: + hdmi_pll_disable(&hdmi.pll, &hdmi.wp); +err_pll_enable: + hdmi_power_off_core(dssdev); + return -EIO; +} + +static void hdmi_power_off_full(struct omap_dss_device *dssdev) +{ + struct omap_overlay_manager *mgr = hdmi.output.manager; + + dss_mgr_disable(mgr); + + hdmi_wp_video_stop(&hdmi.wp); + hdmi_phy_disable(&hdmi.phy, &hdmi.wp); + hdmi_pll_disable(&hdmi.pll, &hdmi.wp); + + hdmi_power_off_core(dssdev); +} + +static int hdmi_display_check_timing(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct hdmi_cm cm; + + cm = hdmi_get_code(timings); + if (cm.code == -1) + return -EINVAL; + + return 0; + +} + +static void hdmi_display_set_timing(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct hdmi_cm cm; + const struct hdmi_config *t; + + mutex_lock(&hdmi.lock); + + cm = hdmi_get_code(timings); + hdmi.cfg.cm = cm; + + t = hdmi_get_timings(cm.mode, cm.code); + if (t != NULL) { + hdmi.cfg = *t; + + dispc_set_tv_pclk(t->timings.pixel_clock * 1000); + } + + mutex_unlock(&hdmi.lock); +} + +static void hdmi_display_get_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + const struct hdmi_config *cfg; + struct hdmi_cm cm = hdmi.cfg.cm; + + cfg = hdmi_get_timings(cm.mode, cm.code); + if (cfg == NULL) + cfg = hdmi_default_timing(); + + memcpy(timings, &cfg->timings, sizeof(cfg->timings)); +} + +static void hdmi_dump_regs(struct seq_file *s) +{ + mutex_lock(&hdmi.lock); + + if (hdmi_runtime_get()) { + mutex_unlock(&hdmi.lock); + return; + } + + hdmi_wp_dump(&hdmi.wp, s); + hdmi_pll_dump(&hdmi.pll, s); + hdmi_phy_dump(&hdmi.phy, s); + hdmi4_core_dump(&hdmi.core, s); + + hdmi_runtime_put(); + mutex_unlock(&hdmi.lock); +} + +static int read_edid(u8 *buf, int len) +{ + int r; + + mutex_lock(&hdmi.lock); + + r = hdmi_runtime_get(); + BUG_ON(r); + + r = hdmi4_read_edid(&hdmi.core, buf, len); + + hdmi_runtime_put(); + mutex_unlock(&hdmi.lock); + + return r; +} + +static int hdmi_display_enable(struct omap_dss_device *dssdev) +{ + struct omap_dss_device *out = &hdmi.output; + int r = 0; + + DSSDBG("ENTER hdmi_display_enable\n"); + + mutex_lock(&hdmi.lock); + + if (out == NULL || out->manager == NULL) { + DSSERR("failed to enable display: no output/manager\n"); + r = -ENODEV; + goto err0; + } + + r = hdmi_power_on_full(dssdev); + if (r) { + DSSERR("failed to power on device\n"); + goto err0; + } + + mutex_unlock(&hdmi.lock); + return 0; + +err0: + mutex_unlock(&hdmi.lock); + return r; +} + +static void hdmi_display_disable(struct omap_dss_device *dssdev) +{ + DSSDBG("Enter hdmi_display_disable\n"); + + mutex_lock(&hdmi.lock); + + hdmi_power_off_full(dssdev); + + mutex_unlock(&hdmi.lock); +} + +static int hdmi_core_enable(struct omap_dss_device *dssdev) +{ + int r = 0; + + DSSDBG("ENTER omapdss_hdmi_core_enable\n"); + + mutex_lock(&hdmi.lock); + + r = hdmi_power_on_core(dssdev); + if (r) { + DSSERR("failed to power on device\n"); + goto err0; + } + + mutex_unlock(&hdmi.lock); + return 0; + +err0: + mutex_unlock(&hdmi.lock); + return r; +} + +static void hdmi_core_disable(struct omap_dss_device *dssdev) +{ + DSSDBG("Enter omapdss_hdmi_core_disable\n"); + + mutex_lock(&hdmi.lock); + + hdmi_power_off_core(dssdev); + + mutex_unlock(&hdmi.lock); +} + +static int hdmi_get_clocks(struct platform_device *pdev) +{ + struct clk *clk; + + clk = devm_clk_get(&pdev->dev, "sys_clk"); + if (IS_ERR(clk)) { + DSSERR("can't get sys_clk\n"); + return PTR_ERR(clk); + } + + hdmi.sys_clk = clk; + + return 0; +} + +static int hdmi_connect(struct omap_dss_device *dssdev, + struct omap_dss_device *dst) +{ + struct omap_overlay_manager *mgr; + int r; + + r = hdmi_init_regulator(); + if (r) + return r; + + mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); + if (!mgr) + return -ENODEV; + + r = dss_mgr_connect(mgr, dssdev); + if (r) + return r; + + r = omapdss_output_set_device(dssdev, dst); + if (r) { + DSSERR("failed to connect output to new device: %s\n", + dst->name); + dss_mgr_disconnect(mgr, dssdev); + return r; + } + + return 0; +} + +static void hdmi_disconnect(struct omap_dss_device *dssdev, + struct omap_dss_device *dst) +{ + WARN_ON(dst != dssdev->dst); + + if (dst != dssdev->dst) + return; + + omapdss_output_unset_device(dssdev); + + if (dssdev->manager) + dss_mgr_disconnect(dssdev->manager, dssdev); +} + +static int hdmi_read_edid(struct omap_dss_device *dssdev, + u8 *edid, int len) +{ + bool need_enable; + int r; + + need_enable = hdmi.core_enabled == false; + + if (need_enable) { + r = hdmi_core_enable(dssdev); + if (r) + return r; + } + + r = read_edid(edid, len); + + if (need_enable) + hdmi_core_disable(dssdev); + + return r; +} + +#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) +static int hdmi_audio_enable(struct omap_dss_device *dssdev) +{ + int r; + + mutex_lock(&hdmi.lock); + + if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) { + r = -EPERM; + goto err; + } + + r = hdmi_wp_audio_enable(&hdmi.wp, true); + if (r) + goto err; + + mutex_unlock(&hdmi.lock); + return 0; + +err: + mutex_unlock(&hdmi.lock); + return r; +} + +static void hdmi_audio_disable(struct omap_dss_device *dssdev) +{ + hdmi_wp_audio_enable(&hdmi.wp, false); +} + +static int hdmi_audio_start(struct omap_dss_device *dssdev) +{ + return hdmi4_audio_start(&hdmi.core, &hdmi.wp); +} + +static void hdmi_audio_stop(struct omap_dss_device *dssdev) +{ + hdmi4_audio_stop(&hdmi.core, &hdmi.wp); +} + +static bool hdmi_audio_supported(struct omap_dss_device *dssdev) +{ + bool r; + + mutex_lock(&hdmi.lock); + + r = hdmi_mode_has_audio(hdmi.cfg.cm.mode); + + mutex_unlock(&hdmi.lock); + return r; +} + +static int hdmi_audio_config(struct omap_dss_device *dssdev, + struct omap_dss_audio *audio) +{ + int r; + u32 pclk = hdmi.cfg.timings.pixel_clock; + + mutex_lock(&hdmi.lock); + + if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) { + r = -EPERM; + goto err; + } + + r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, audio, pclk); + if (r) + goto err; + + mutex_unlock(&hdmi.lock); + return 0; + +err: + mutex_unlock(&hdmi.lock); + return r; +} +#else +static int hdmi_audio_enable(struct omap_dss_device *dssdev) +{ + return -EPERM; +} + +static void hdmi_audio_disable(struct omap_dss_device *dssdev) +{ +} + +static int hdmi_audio_start(struct omap_dss_device *dssdev) +{ + return -EPERM; +} + +static void hdmi_audio_stop(struct omap_dss_device *dssdev) +{ +} + +static bool hdmi_audio_supported(struct omap_dss_device *dssdev) +{ + return false; +} + +static int hdmi_audio_config(struct omap_dss_device *dssdev, + struct omap_dss_audio *audio) +{ + return -EPERM; +} +#endif + +static const struct omapdss_hdmi_ops hdmi_ops = { + .connect = hdmi_connect, + .disconnect = hdmi_disconnect, + + .enable = hdmi_display_enable, + .disable = hdmi_display_disable, + + .check_timings = hdmi_display_check_timing, + .set_timings = hdmi_display_set_timing, + .get_timings = hdmi_display_get_timings, + + .read_edid = hdmi_read_edid, + + .audio_enable = hdmi_audio_enable, + .audio_disable = hdmi_audio_disable, + .audio_start = hdmi_audio_start, + .audio_stop = hdmi_audio_stop, + .audio_supported = hdmi_audio_supported, + .audio_config = hdmi_audio_config, +}; + +static void hdmi_init_output(struct platform_device *pdev) +{ + struct omap_dss_device *out = &hdmi.output; + + out->dev = &pdev->dev; + out->id = OMAP_DSS_OUTPUT_HDMI; + out->output_type = OMAP_DISPLAY_TYPE_HDMI; + out->name = "hdmi.0"; + out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; + out->ops.hdmi = &hdmi_ops; + out->owner = THIS_MODULE; + + omapdss_register_output(out); +} + +static void __exit hdmi_uninit_output(struct platform_device *pdev) +{ + struct omap_dss_device *out = &hdmi.output; + + omapdss_unregister_output(out); +} + +/* HDMI HW IP initialisation */ +static int omapdss_hdmihw_probe(struct platform_device *pdev) +{ + int r; + + hdmi.pdev = pdev; + + mutex_init(&hdmi.lock); + + r = hdmi_wp_init(pdev, &hdmi.wp); + if (r) + return r; + + r = hdmi_pll_init(pdev, &hdmi.pll); + if (r) + return r; + + r = hdmi_phy_init(pdev, &hdmi.phy); + if (r) + return r; + + r = hdmi4_core_init(pdev, &hdmi.core); + if (r) + return r; + + r = hdmi_get_clocks(pdev); + if (r) { + DSSERR("can't get clocks\n"); + return r; + } + + pm_runtime_enable(&pdev->dev); + + hdmi_init_output(pdev); + + dss_debugfs_create_file("hdmi", hdmi_dump_regs); + + return 0; +} + +static int __exit omapdss_hdmihw_remove(struct platform_device *pdev) +{ + hdmi_uninit_output(pdev); + + pm_runtime_disable(&pdev->dev); + + return 0; +} + +static int hdmi_runtime_suspend(struct device *dev) +{ + clk_disable_unprepare(hdmi.sys_clk); + + dispc_runtime_put(); + + return 0; +} + +static int hdmi_runtime_resume(struct device *dev) +{ + int r; + + r = dispc_runtime_get(); + if (r < 0) + return r; + + clk_prepare_enable(hdmi.sys_clk); + + return 0; +} + +static const struct dev_pm_ops hdmi_pm_ops = { + .runtime_suspend = hdmi_runtime_suspend, + .runtime_resume = hdmi_runtime_resume, +}; + +static struct platform_driver omapdss_hdmihw_driver = { + .probe = omapdss_hdmihw_probe, + .remove = __exit_p(omapdss_hdmihw_remove), + .driver = { + .name = "omapdss_hdmi", + .owner = THIS_MODULE, + .pm = &hdmi_pm_ops, + }, +}; + +int __init hdmi4_init_platform_driver(void) +{ + return platform_driver_register(&omapdss_hdmihw_driver); +} + +void __exit hdmi4_uninit_platform_driver(void) +{ + platform_driver_unregister(&omapdss_hdmihw_driver); +} diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/hdmi4_core.c index 3dfe00956a4f..5dd5e5489b41 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c +++ b/drivers/video/omap2/dss/hdmi4_core.c @@ -26,6 +26,7 @@ #include <linux/interrupt.h> #include <linux/mutex.h> #include <linux/delay.h> +#include <linux/platform_device.h> #include <linux/string.h> #include <linux/seq_file.h> #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) @@ -33,304 +34,19 @@ #include <sound/asoundef.h> #endif -#include "ti_hdmi_4xxx_ip.h" -#include "dss.h" +#include "hdmi4_core.h" #include "dss_features.h" -#define HDMI_IRQ_LINK_CONNECT (1 << 25) -#define HDMI_IRQ_LINK_DISCONNECT (1 << 26) +#define HDMI_CORE_AV 0x500 -static inline void hdmi_write_reg(void __iomem *base_addr, - const u16 idx, u32 val) +static inline void __iomem *hdmi_av_base(struct hdmi_core_data *core) { - __raw_writel(val, base_addr + idx); + return core->base + HDMI_CORE_AV; } -static inline u32 hdmi_read_reg(void __iomem *base_addr, - const u16 idx) +static int hdmi_core_ddc_init(struct hdmi_core_data *core) { - return __raw_readl(base_addr + idx); -} - -static inline void __iomem *hdmi_wp_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp; -} - -static inline void __iomem *hdmi_phy_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->phy_offset; -} - -static inline void __iomem *hdmi_pll_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->pll_offset; -} - -static inline void __iomem *hdmi_av_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->core_av_offset; -} - -static inline void __iomem *hdmi_core_sys_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->core_sys_offset; -} - -static inline int hdmi_wait_for_bit_change(void __iomem *base_addr, - const u16 idx, - int b2, int b1, u32 val) -{ - u32 t = 0; - while (val != REG_GET(base_addr, idx, b2, b1)) { - udelay(1); - if (t++ > 10000) - return !val; - } - return val; -} - -static int hdmi_pll_init(struct hdmi_ip_data *ip_data) -{ - u32 r; - void __iomem *pll_base = hdmi_pll_base(ip_data); - struct hdmi_pll_info *fmt = &ip_data->pll_data; - - /* PLL start always use manual mode */ - REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0); - - r = hdmi_read_reg(pll_base, PLLCTRL_CFG1); - r = FLD_MOD(r, fmt->regm, 20, 9); /* CFG1_PLL_REGM */ - r = FLD_MOD(r, fmt->regn - 1, 8, 1); /* CFG1_PLL_REGN */ - - hdmi_write_reg(pll_base, PLLCTRL_CFG1, r); - - r = hdmi_read_reg(pll_base, PLLCTRL_CFG2); - - r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */ - r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */ - r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */ - r = FLD_MOD(r, fmt->refsel, 22, 21); /* REFSEL */ - - if (fmt->dcofreq) { - /* divider programming for frequency beyond 1000Mhz */ - REG_FLD_MOD(pll_base, PLLCTRL_CFG3, fmt->regsd, 17, 10); - r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */ - } else { - r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */ - } - - hdmi_write_reg(pll_base, PLLCTRL_CFG2, r); - - r = hdmi_read_reg(pll_base, PLLCTRL_CFG4); - r = FLD_MOD(r, fmt->regm2, 24, 18); - r = FLD_MOD(r, fmt->regmf, 17, 0); - - hdmi_write_reg(pll_base, PLLCTRL_CFG4, r); - - /* go now */ - REG_FLD_MOD(pll_base, PLLCTRL_PLL_GO, 0x1, 0, 0); - - /* wait for bit change */ - if (hdmi_wait_for_bit_change(pll_base, PLLCTRL_PLL_GO, - 0, 0, 1) != 1) { - pr_err("PLL GO bit not set\n"); - return -ETIMEDOUT; - } - - /* Wait till the lock bit is set in PLL status */ - if (hdmi_wait_for_bit_change(pll_base, - PLLCTRL_PLL_STATUS, 1, 1, 1) != 1) { - pr_err("cannot lock PLL\n"); - pr_err("CFG1 0x%x\n", - hdmi_read_reg(pll_base, PLLCTRL_CFG1)); - pr_err("CFG2 0x%x\n", - hdmi_read_reg(pll_base, PLLCTRL_CFG2)); - pr_err("CFG4 0x%x\n", - hdmi_read_reg(pll_base, PLLCTRL_CFG4)); - return -ETIMEDOUT; - } - - pr_debug("PLL locked!\n"); - - return 0; -} - -/* PHY_PWR_CMD */ -static int hdmi_set_phy_pwr(struct hdmi_ip_data *ip_data, enum hdmi_phy_pwr val) -{ - /* Return if already the state */ - if (REG_GET(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, 5, 4) == val) - return 0; - - /* Command for power control of HDMI PHY */ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, val, 7, 6); - - /* Status of the power control of HDMI PHY */ - if (hdmi_wait_for_bit_change(hdmi_wp_base(ip_data), - HDMI_WP_PWR_CTRL, 5, 4, val) != val) { - pr_err("Failed to set PHY power mode to %d\n", val); - return -ETIMEDOUT; - } - - return 0; -} - -/* PLL_PWR_CMD */ -static int hdmi_set_pll_pwr(struct hdmi_ip_data *ip_data, enum hdmi_pll_pwr val) -{ - /* Command for power control of HDMI PLL */ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, val, 3, 2); - - /* wait till PHY_PWR_STATUS is set */ - if (hdmi_wait_for_bit_change(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, - 1, 0, val) != val) { - pr_err("Failed to set PLL_PWR_STATUS\n"); - return -ETIMEDOUT; - } - - return 0; -} - -static int hdmi_pll_reset(struct hdmi_ip_data *ip_data) -{ - /* SYSRESET controlled by power FSM */ - REG_FLD_MOD(hdmi_pll_base(ip_data), PLLCTRL_PLL_CONTROL, 0x0, 3, 3); - - /* READ 0x0 reset is in progress */ - if (hdmi_wait_for_bit_change(hdmi_pll_base(ip_data), - PLLCTRL_PLL_STATUS, 0, 0, 1) != 1) { - pr_err("Failed to sysreset PLL\n"); - return -ETIMEDOUT; - } - - return 0; -} - -int ti_hdmi_4xxx_pll_enable(struct hdmi_ip_data *ip_data) -{ - u16 r = 0; - - r = hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF); - if (r) - return r; - - r = hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); - if (r) - return r; - - r = hdmi_pll_reset(ip_data); - if (r) - return r; - - r = hdmi_pll_init(ip_data); - if (r) - return r; - - return 0; -} - -void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data) -{ - hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF); -} - -static irqreturn_t hdmi_irq_handler(int irq, void *data) -{ - struct hdmi_ip_data *ip_data = data; - void __iomem *wp_base = hdmi_wp_base(ip_data); - u32 irqstatus; - - irqstatus = hdmi_read_reg(wp_base, HDMI_WP_IRQSTATUS); - hdmi_write_reg(wp_base, HDMI_WP_IRQSTATUS, irqstatus); - /* flush posted write */ - hdmi_read_reg(wp_base, HDMI_WP_IRQSTATUS); - - if ((irqstatus & HDMI_IRQ_LINK_CONNECT) && - irqstatus & HDMI_IRQ_LINK_DISCONNECT) { - /* - * If we get both connect and disconnect interrupts at the same - * time, turn off the PHY, clear interrupts, and restart, which - * raises connect interrupt if a cable is connected, or nothing - * if cable is not connected. - */ - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); - - hdmi_write_reg(wp_base, HDMI_WP_IRQSTATUS, - HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); - /* flush posted write */ - hdmi_read_reg(wp_base, HDMI_WP_IRQSTATUS); - - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON); - } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) { - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_TXON); - } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) { - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON); - } - - return IRQ_HANDLED; -} - -int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data) -{ - u16 r = 0; - void __iomem *phy_base = hdmi_phy_base(ip_data); - - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_IRQENABLE_CLR, - 0xffffffff); - - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_IRQSTATUS, - HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); - - r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON); - if (r) - return r; - - /* - * Read address 0 in order to get the SCP reset done completed - * Dummy access performed to make sure reset is done - */ - hdmi_read_reg(phy_base, HDMI_TXPHY_TX_CTRL); - - /* - * Write to phy address 0 to configure the clock - * use HFBITCLK write HDMI_TXPHY_TX_CONTROL_FREQOUT field - */ - REG_FLD_MOD(phy_base, HDMI_TXPHY_TX_CTRL, 0x1, 31, 30); - - /* Write to phy address 1 to start HDMI line (TXVALID and TMDSCLKEN) */ - hdmi_write_reg(phy_base, HDMI_TXPHY_DIGITAL_CTRL, 0xF0000000); - - /* Setup max LDO voltage */ - REG_FLD_MOD(phy_base, HDMI_TXPHY_POWER_CTRL, 0xB, 3, 0); - - /* Write to phy address 3 to change the polarity control */ - REG_FLD_MOD(phy_base, HDMI_TXPHY_PAD_CFG_CTRL, 0x1, 27, 27); - - r = request_threaded_irq(ip_data->irq, NULL, hdmi_irq_handler, - IRQF_ONESHOT, "OMAP HDMI", ip_data); - if (r) { - DSSERR("HDMI IRQ request failed\n"); - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); - return r; - } - - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_IRQENABLE_SET, - HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); - - return 0; -} - -void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data) -{ - free_irq(ip_data->irq, ip_data); - - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); -} - -static int hdmi_core_ddc_init(struct hdmi_ip_data *ip_data) -{ - void __iomem *base = hdmi_core_sys_base(ip_data); + void __iomem *base = core->base; /* Turn on CLK for DDC */ REG_FLD_MOD(base, HDMI_CORE_AV_DPD, 0x7, 2, 0); @@ -370,10 +86,10 @@ static int hdmi_core_ddc_init(struct hdmi_ip_data *ip_data) return 0; } -static int hdmi_core_ddc_edid(struct hdmi_ip_data *ip_data, +static int hdmi_core_ddc_edid(struct hdmi_core_data *core, u8 *pedid, int ext) { - void __iomem *base = hdmi_core_sys_base(ip_data); + void __iomem *base = core->base; u32 i; char checksum; u32 offset = 0; @@ -452,26 +168,25 @@ static int hdmi_core_ddc_edid(struct hdmi_ip_data *ip_data, return 0; } -int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data, - u8 *edid, int len) +int hdmi4_read_edid(struct hdmi_core_data *core, u8 *edid, int len) { int r, l; if (len < 128) return -EINVAL; - r = hdmi_core_ddc_init(ip_data); + r = hdmi_core_ddc_init(core); if (r) return r; - r = hdmi_core_ddc_edid(ip_data, edid, 0); + r = hdmi_core_ddc_edid(core, edid, 0); if (r) return r; l = 128; if (len >= 128 * 2 && edid[0x7e] > 0) { - r = hdmi_core_ddc_edid(ip_data, edid + 0x80, 1); + r = hdmi_core_ddc_edid(core, edid + 0x80, 1); if (r) return r; l += 128; @@ -508,7 +223,7 @@ static void hdmi_core_init(struct hdmi_core_video_config *video_cfg, avi_cfg->db3_nup_scaling = 0; avi_cfg->db4_videocode = 0; avi_cfg->db5_pixel_repeat = 0; - avi_cfg->db6_7_line_eoftop = 0 ; + avi_cfg->db6_7_line_eoftop = 0; avi_cfg->db8_9_line_sofbottom = 0; avi_cfg->db10_11_pixel_eofleft = 0; avi_cfg->db12_13_pixel_sofright = 0; @@ -524,38 +239,39 @@ static void hdmi_core_init(struct hdmi_core_video_config *video_cfg, repeat_cfg->generic_pkt_repeat = 0; } -static void hdmi_core_powerdown_disable(struct hdmi_ip_data *ip_data) +static void hdmi_core_powerdown_disable(struct hdmi_core_data *core) { pr_debug("Enter hdmi_core_powerdown_disable\n"); - REG_FLD_MOD(hdmi_core_sys_base(ip_data), HDMI_CORE_CTRL1, 0x0, 0, 0); + REG_FLD_MOD(core->base, HDMI_CORE_SYS_SYS_CTRL1, 0x0, 0, 0); } -static void hdmi_core_swreset_release(struct hdmi_ip_data *ip_data) +static void hdmi_core_swreset_release(struct hdmi_core_data *core) { pr_debug("Enter hdmi_core_swreset_release\n"); - REG_FLD_MOD(hdmi_core_sys_base(ip_data), HDMI_CORE_SYS_SRST, 0x0, 0, 0); + REG_FLD_MOD(core->base, HDMI_CORE_SYS_SRST, 0x0, 0, 0); } -static void hdmi_core_swreset_assert(struct hdmi_ip_data *ip_data) +static void hdmi_core_swreset_assert(struct hdmi_core_data *core) { pr_debug("Enter hdmi_core_swreset_assert\n"); - REG_FLD_MOD(hdmi_core_sys_base(ip_data), HDMI_CORE_SYS_SRST, 0x1, 0, 0); + REG_FLD_MOD(core->base, HDMI_CORE_SYS_SRST, 0x1, 0, 0); } /* HDMI_CORE_VIDEO_CONFIG */ -static void hdmi_core_video_config(struct hdmi_ip_data *ip_data, +static void hdmi_core_video_config(struct hdmi_core_data *core, struct hdmi_core_video_config *cfg) { u32 r = 0; - void __iomem *core_sys_base = hdmi_core_sys_base(ip_data); + void __iomem *core_sys_base = core->base; + void __iomem *core_av_base = hdmi_av_base(core); /* sys_ctrl1 default configuration not tunable */ - r = hdmi_read_reg(core_sys_base, HDMI_CORE_CTRL1); - r = FLD_MOD(r, HDMI_CORE_CTRL1_VEN_FOLLOWVSYNC, 5, 5); - r = FLD_MOD(r, HDMI_CORE_CTRL1_HEN_FOLLOWHSYNC, 4, 4); - r = FLD_MOD(r, HDMI_CORE_CTRL1_BSEL_24BITBUS, 2, 2); - r = FLD_MOD(r, HDMI_CORE_CTRL1_EDGE_RISINGEDGE, 1, 1); - hdmi_write_reg(core_sys_base, HDMI_CORE_CTRL1, r); + r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1); + r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_VEN_FOLLOWVSYNC, 5, 5); + r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_HEN_FOLLOWHSYNC, 4, 4); + r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_BSEL_24BITBUS, 2, 2); + r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_EDGE_RISINGEDGE, 1, 1); + hdmi_write_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1, r); REG_FLD_MOD(core_sys_base, HDMI_CORE_SYS_VID_ACEN, cfg->ip_bus_width, 7, 6); @@ -574,23 +290,23 @@ static void hdmi_core_video_config(struct hdmi_ip_data *ip_data, hdmi_write_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE, r); /* HDMI_Ctrl */ - r = hdmi_read_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_HDMI_CTRL); + r = hdmi_read_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL); r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); r = FLD_MOD(r, cfg->pkt_mode, 5, 3); r = FLD_MOD(r, cfg->hdmi_dvi, 0, 0); - hdmi_write_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_HDMI_CTRL, r); + hdmi_write_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL, r); /* TMDS_CTRL */ REG_FLD_MOD(core_sys_base, HDMI_CORE_SYS_TMDS_CTRL, cfg->tclk_sel_clkmult, 6, 5); } -static void hdmi_core_aux_infoframe_avi_config(struct hdmi_ip_data *ip_data) +static void hdmi_core_aux_infoframe_avi_config(struct hdmi_core_data *core) { u32 val; char sum = 0, checksum = 0; - void __iomem *av_base = hdmi_av_base(ip_data); - struct hdmi_core_infoframe_avi info_avi = ip_data->avi_cfg; + void __iomem *av_base = hdmi_av_base(core); + struct hdmi_core_infoframe_avi info_avi = core->avi_cfg; sum += 0x82 + 0x002 + 0x00D; hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_TYPE, 0x082); @@ -661,160 +377,64 @@ static void hdmi_core_aux_infoframe_avi_config(struct hdmi_ip_data *ip_data) hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_CHSUM, checksum); } -static void hdmi_core_av_packet_config(struct hdmi_ip_data *ip_data, +static void hdmi_core_av_packet_config(struct hdmi_core_data *core, struct hdmi_core_packet_enable_repeat repeat_cfg) { /* enable/repeat the infoframe */ - hdmi_write_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_PB_CTRL1, + hdmi_write_reg(hdmi_av_base(core), HDMI_CORE_AV_PB_CTRL1, (repeat_cfg.audio_pkt << 5) | (repeat_cfg.audio_pkt_repeat << 4) | (repeat_cfg.avi_infoframe << 1) | (repeat_cfg.avi_infoframe_repeat)); /* enable/repeat the packet */ - hdmi_write_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_PB_CTRL2, + hdmi_write_reg(hdmi_av_base(core), HDMI_CORE_AV_PB_CTRL2, (repeat_cfg.gen_cntrl_pkt << 3) | (repeat_cfg.gen_cntrl_pkt_repeat << 2) | (repeat_cfg.generic_pkt << 1) | (repeat_cfg.generic_pkt_repeat)); } -static void hdmi_wp_init(struct omap_video_timings *timings, - struct hdmi_video_format *video_fmt) -{ - pr_debug("Enter hdmi_wp_init\n"); - - timings->hbp = 0; - timings->hfp = 0; - timings->hsw = 0; - timings->vbp = 0; - timings->vfp = 0; - timings->vsw = 0; - - video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444; - video_fmt->y_res = 0; - video_fmt->x_res = 0; - -} - -int ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data) -{ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, true, 31, 31); - return 0; -} - -void ti_hdmi_4xxx_wp_video_stop(struct hdmi_ip_data *ip_data) -{ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, false, 31, 31); -} - -static void hdmi_wp_video_init_format(struct hdmi_video_format *video_fmt, - struct omap_video_timings *timings, struct hdmi_config *param) -{ - pr_debug("Enter hdmi_wp_video_init_format\n"); - - video_fmt->y_res = param->timings.y_res; - video_fmt->x_res = param->timings.x_res; - - timings->hbp = param->timings.hbp; - timings->hfp = param->timings.hfp; - timings->hsw = param->timings.hsw; - timings->vbp = param->timings.vbp; - timings->vfp = param->timings.vfp; - timings->vsw = param->timings.vsw; -} - -static void hdmi_wp_video_config_format(struct hdmi_ip_data *ip_data, - struct hdmi_video_format *video_fmt) -{ - u32 l = 0; - - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, - video_fmt->packing_mode, 10, 8); - - l |= FLD_VAL(video_fmt->y_res, 31, 16); - l |= FLD_VAL(video_fmt->x_res, 15, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_SIZE, l); -} - -static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data) -{ - u32 r; - bool vsync_pol, hsync_pol; - pr_debug("Enter hdmi_wp_video_config_interface\n"); - - vsync_pol = ip_data->cfg.timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; - hsync_pol = ip_data->cfg.timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG); - r = FLD_MOD(r, vsync_pol, 7, 7); - r = FLD_MOD(r, hsync_pol, 6, 6); - r = FLD_MOD(r, ip_data->cfg.timings.interlace, 3, 3); - r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, r); -} - -static void hdmi_wp_video_config_timing(struct hdmi_ip_data *ip_data, - struct omap_video_timings *timings) -{ - u32 timing_h = 0; - u32 timing_v = 0; - - pr_debug("Enter hdmi_wp_video_config_timing\n"); - - timing_h |= FLD_VAL(timings->hbp, 31, 20); - timing_h |= FLD_VAL(timings->hfp, 19, 8); - timing_h |= FLD_VAL(timings->hsw, 7, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_H, timing_h); - - timing_v |= FLD_VAL(timings->vbp, 31, 20); - timing_v |= FLD_VAL(timings->vfp, 19, 8); - timing_v |= FLD_VAL(timings->vsw, 7, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_V, timing_v); -} - -void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data) +void hdmi4_configure(struct hdmi_core_data *core, + struct hdmi_wp_data *wp, struct hdmi_config *cfg) { /* HDMI */ struct omap_video_timings video_timing; struct hdmi_video_format video_format; /* HDMI core */ - struct hdmi_core_infoframe_avi *avi_cfg = &ip_data->avi_cfg; + struct hdmi_core_infoframe_avi *avi_cfg = &core->avi_cfg; struct hdmi_core_video_config v_core_cfg; struct hdmi_core_packet_enable_repeat repeat_cfg; - struct hdmi_config *cfg = &ip_data->cfg; - - hdmi_wp_init(&video_timing, &video_format); hdmi_core_init(&v_core_cfg, avi_cfg, &repeat_cfg); - hdmi_wp_video_init_format(&video_format, &video_timing, cfg); + hdmi_wp_init_vid_fmt_timings(&video_format, &video_timing, cfg); - hdmi_wp_video_config_timing(ip_data, &video_timing); + hdmi_wp_video_config_timing(wp, &video_timing); /* video config */ video_format.packing_mode = HDMI_PACK_24b_RGB_YUV444_YUV422; - hdmi_wp_video_config_format(ip_data, &video_format); + hdmi_wp_video_config_format(wp, &video_format); - hdmi_wp_video_config_interface(ip_data); + hdmi_wp_video_config_interface(wp, &video_timing); /* * configure core video part * set software reset in the core */ - hdmi_core_swreset_assert(ip_data); + hdmi_core_swreset_assert(core); /* power down off */ - hdmi_core_powerdown_disable(ip_data); + hdmi_core_powerdown_disable(core); v_core_cfg.pkt_mode = HDMI_PACKETMODE24BITPERPIXEL; v_core_cfg.hdmi_dvi = cfg->cm.mode; - hdmi_core_video_config(ip_data, &v_core_cfg); + hdmi_core_video_config(core, &v_core_cfg); /* release software reset in the core */ - hdmi_core_swreset_release(ip_data); + hdmi_core_swreset_release(core); /* * configure packet @@ -839,7 +459,7 @@ void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data) avi_cfg->db10_11_pixel_eofleft = 0; avi_cfg->db12_13_pixel_sofright = 0; - hdmi_core_aux_infoframe_avi_config(ip_data); + hdmi_core_aux_infoframe_avi_config(core); /* enable/repeat the infoframe */ repeat_cfg.avi_infoframe = HDMI_PACKETENABLE; @@ -847,65 +467,30 @@ void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data) /* wakeup */ repeat_cfg.audio_pkt = HDMI_PACKETENABLE; repeat_cfg.audio_pkt_repeat = HDMI_PACKETREPEATON; - hdmi_core_av_packet_config(ip_data, repeat_cfg); -} - -void ti_hdmi_4xxx_wp_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_wp_base(ip_data), r)) - - DUMPREG(HDMI_WP_REVISION); - DUMPREG(HDMI_WP_SYSCONFIG); - DUMPREG(HDMI_WP_IRQSTATUS_RAW); - DUMPREG(HDMI_WP_IRQSTATUS); - DUMPREG(HDMI_WP_PWR_CTRL); - DUMPREG(HDMI_WP_IRQENABLE_SET); - DUMPREG(HDMI_WP_VIDEO_CFG); - DUMPREG(HDMI_WP_VIDEO_SIZE); - DUMPREG(HDMI_WP_VIDEO_TIMING_H); - DUMPREG(HDMI_WP_VIDEO_TIMING_V); - DUMPREG(HDMI_WP_WP_CLK); - DUMPREG(HDMI_WP_AUDIO_CFG); - DUMPREG(HDMI_WP_AUDIO_CFG2); - DUMPREG(HDMI_WP_AUDIO_CTRL); - DUMPREG(HDMI_WP_AUDIO_DATA); -} - -void ti_hdmi_4xxx_pll_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ -#define DUMPPLL(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_pll_base(ip_data), r)) - - DUMPPLL(PLLCTRL_PLL_CONTROL); - DUMPPLL(PLLCTRL_PLL_STATUS); - DUMPPLL(PLLCTRL_PLL_GO); - DUMPPLL(PLLCTRL_CFG1); - DUMPPLL(PLLCTRL_CFG2); - DUMPPLL(PLLCTRL_CFG3); - DUMPPLL(PLLCTRL_CFG4); + hdmi_core_av_packet_config(core, repeat_cfg); } -void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) +void hdmi4_core_dump(struct hdmi_core_data *core, struct seq_file *s) { int i; #define CORE_REG(i, name) name(i) #define DUMPCORE(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_core_sys_base(ip_data), r)) + hdmi_read_reg(core->base, r)) #define DUMPCOREAV(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_av_base(ip_data), r)) + hdmi_read_reg(hdmi_av_base(core), r)) #define DUMPCOREAV2(i, r) seq_printf(s, "%s[%d]%*s %08x\n", #r, i, \ (i < 10) ? 32 - (int)strlen(#r) : 31 - (int)strlen(#r), " ", \ - hdmi_read_reg(hdmi_av_base(ip_data), CORE_REG(i, r))) + hdmi_read_reg(hdmi_av_base(core), CORE_REG(i, r))) DUMPCORE(HDMI_CORE_SYS_VND_IDL); DUMPCORE(HDMI_CORE_SYS_DEV_IDL); DUMPCORE(HDMI_CORE_SYS_DEV_IDH); DUMPCORE(HDMI_CORE_SYS_DEV_REV); DUMPCORE(HDMI_CORE_SYS_SRST); - DUMPCORE(HDMI_CORE_CTRL1); + DUMPCORE(HDMI_CORE_SYS_SYS_CTRL1); DUMPCORE(HDMI_CORE_SYS_SYS_STAT); + DUMPCORE(HDMI_CORE_SYS_SYS_CTRL3); DUMPCORE(HDMI_CORE_SYS_DE_DLY); DUMPCORE(HDMI_CORE_SYS_DE_CTRL); DUMPCORE(HDMI_CORE_SYS_DE_TOP); @@ -913,14 +498,58 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) DUMPCORE(HDMI_CORE_SYS_DE_CNTH); DUMPCORE(HDMI_CORE_SYS_DE_LINL); DUMPCORE(HDMI_CORE_SYS_DE_LINH_1); + DUMPCORE(HDMI_CORE_SYS_HRES_L); + DUMPCORE(HDMI_CORE_SYS_HRES_H); + DUMPCORE(HDMI_CORE_SYS_VRES_L); + DUMPCORE(HDMI_CORE_SYS_VRES_H); + DUMPCORE(HDMI_CORE_SYS_IADJUST); + DUMPCORE(HDMI_CORE_SYS_POLDETECT); + DUMPCORE(HDMI_CORE_SYS_HWIDTH1); + DUMPCORE(HDMI_CORE_SYS_HWIDTH2); + DUMPCORE(HDMI_CORE_SYS_VWIDTH); + DUMPCORE(HDMI_CORE_SYS_VID_CTRL); DUMPCORE(HDMI_CORE_SYS_VID_ACEN); DUMPCORE(HDMI_CORE_SYS_VID_MODE); + DUMPCORE(HDMI_CORE_SYS_VID_BLANK1); + DUMPCORE(HDMI_CORE_SYS_VID_BLANK3); + DUMPCORE(HDMI_CORE_SYS_VID_BLANK1); + DUMPCORE(HDMI_CORE_SYS_DC_HEADER); + DUMPCORE(HDMI_CORE_SYS_VID_DITHER); + DUMPCORE(HDMI_CORE_SYS_RGB2XVYCC_CT); + DUMPCORE(HDMI_CORE_SYS_R2Y_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_R2Y_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_G2Y_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_G2Y_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_B2Y_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_B2Y_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_R2CB_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_R2CB_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_G2CB_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_G2CB_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_B2CB_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_B2CB_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_R2CR_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_R2CR_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_G2CR_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_G2CR_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_B2CR_COEFF_LOW); + DUMPCORE(HDMI_CORE_SYS_B2CR_COEFF_UP); + DUMPCORE(HDMI_CORE_SYS_RGB_OFFSET_LOW); + DUMPCORE(HDMI_CORE_SYS_RGB_OFFSET_UP); + DUMPCORE(HDMI_CORE_SYS_Y_OFFSET_LOW); + DUMPCORE(HDMI_CORE_SYS_Y_OFFSET_UP); + DUMPCORE(HDMI_CORE_SYS_CBCR_OFFSET_LOW); + DUMPCORE(HDMI_CORE_SYS_CBCR_OFFSET_UP); DUMPCORE(HDMI_CORE_SYS_INTR_STATE); DUMPCORE(HDMI_CORE_SYS_INTR1); DUMPCORE(HDMI_CORE_SYS_INTR2); DUMPCORE(HDMI_CORE_SYS_INTR3); DUMPCORE(HDMI_CORE_SYS_INTR4); - DUMPCORE(HDMI_CORE_SYS_UMASK1); + DUMPCORE(HDMI_CORE_SYS_INTR_UNMASK1); + DUMPCORE(HDMI_CORE_SYS_INTR_UNMASK2); + DUMPCORE(HDMI_CORE_SYS_INTR_UNMASK3); + DUMPCORE(HDMI_CORE_SYS_INTR_UNMASK4); + DUMPCORE(HDMI_CORE_SYS_INTR_CTRL); DUMPCORE(HDMI_CORE_SYS_TMDS_CTRL); DUMPCORE(HDMI_CORE_DDC_ADDR); @@ -1009,60 +638,12 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) DUMPCOREAV(HDMI_CORE_AV_CEC_ADDR_ID); } -void ti_hdmi_4xxx_phy_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ -#define DUMPPHY(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_phy_base(ip_data), r)) - - DUMPPHY(HDMI_TXPHY_TX_CTRL); - DUMPPHY(HDMI_TXPHY_DIGITAL_CTRL); - DUMPPHY(HDMI_TXPHY_POWER_CTRL); - DUMPPHY(HDMI_TXPHY_PAD_CFG_CTRL); -} - #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) -static void ti_hdmi_4xxx_wp_audio_config_format(struct hdmi_ip_data *ip_data, - struct hdmi_audio_format *aud_fmt) -{ - u32 r; - - DSSDBG("Enter hdmi_wp_audio_config_format\n"); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG); - r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); - r = FLD_MOD(r, aud_fmt->active_chnnls_msk, 23, 16); - r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); - r = FLD_MOD(r, aud_fmt->type, 4, 4); - r = FLD_MOD(r, aud_fmt->justification, 3, 3); - r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); - r = FLD_MOD(r, aud_fmt->samples_per_word, 1, 1); - r = FLD_MOD(r, aud_fmt->sample_size, 0, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG, r); -} - -static void ti_hdmi_4xxx_wp_audio_config_dma(struct hdmi_ip_data *ip_data, - struct hdmi_audio_dma *aud_dma) -{ - u32 r; - - DSSDBG("Enter hdmi_wp_audio_config_dma\n"); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG2); - r = FLD_MOD(r, aud_dma->transfer_size, 15, 8); - r = FLD_MOD(r, aud_dma->block_size, 7, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG2, r); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CTRL); - r = FLD_MOD(r, aud_dma->mode, 9, 9); - r = FLD_MOD(r, aud_dma->fifo_threshold, 8, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CTRL, r); -} - -static void ti_hdmi_4xxx_core_audio_config(struct hdmi_ip_data *ip_data, +static void hdmi_core_audio_config(struct hdmi_core_data *core, struct hdmi_core_audio_config *cfg) { u32 r; - void __iomem *av_base = hdmi_av_base(ip_data); + void __iomem *av_base = hdmi_av_base(core); /* * Parameters for generation of Audio Clock Recovery packets @@ -1157,11 +738,11 @@ static void ti_hdmi_4xxx_core_audio_config(struct hdmi_ip_data *ip_data, REG_FLD_MOD(av_base, HDMI_CORE_AV_SWAP_I2S, 1, 5, 5); } -static void ti_hdmi_4xxx_core_audio_infoframe_cfg(struct hdmi_ip_data *ip_data, +static void hdmi_core_audio_infoframe_cfg(struct hdmi_core_data *core, struct snd_cea_861_aud_if *info_aud) { u8 sum = 0, checksum = 0; - void __iomem *av_base = hdmi_av_base(ip_data); + void __iomem *av_base = hdmi_av_base(core); /* * Set audio info frame type, version and length as @@ -1207,20 +788,20 @@ static void ti_hdmi_4xxx_core_audio_infoframe_cfg(struct hdmi_ip_data *ip_data, */ } -int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data, - struct omap_dss_audio *audio) +int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp, + struct omap_dss_audio *audio, u32 pclk) { struct hdmi_audio_format audio_format; struct hdmi_audio_dma audio_dma; - struct hdmi_core_audio_config core; + struct hdmi_core_audio_config acore; int err, n, cts, channel_count; unsigned int fs_nr; bool word_length_16b = false; - if (!audio || !audio->iec || !audio->cea || !ip_data) + if (!audio || !audio->iec || !audio->cea || !core) return -EINVAL; - core.iec60958_cfg = audio->iec; + acore.iec60958_cfg = audio->iec; /* * In the IEC-60958 status word, check if the audio sample word length * is 16-bit as several optimizations can be performed in such case. @@ -1231,22 +812,22 @@ int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data, /* I2S configuration. See Phillips' specification */ if (word_length_16b) - core.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_LEFT; + acore.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_LEFT; else - core.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_RIGHT; + acore.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_RIGHT; /* * The I2S input word length is twice the lenght given in the IEC-60958 * status word. If the word size is greater than * 20 bits, increment by one. */ - core.i2s_cfg.in_length_bits = audio->iec->status[4] + acore.i2s_cfg.in_length_bits = audio->iec->status[4] & IEC958_AES4_CON_WORDLEN; if (audio->iec->status[4] & IEC958_AES4_CON_MAX_WORDLEN_24) - core.i2s_cfg.in_length_bits++; - core.i2s_cfg.sck_edge_mode = HDMI_AUDIO_I2S_SCK_EDGE_RISING; - core.i2s_cfg.vbit = HDMI_AUDIO_I2S_VBIT_FOR_PCM; - core.i2s_cfg.direction = HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST; - core.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT; + acore.i2s_cfg.in_length_bits++; + acore.i2s_cfg.sck_edge_mode = HDMI_AUDIO_I2S_SCK_EDGE_RISING; + acore.i2s_cfg.vbit = HDMI_AUDIO_I2S_VBIT_FOR_PCM; + acore.i2s_cfg.direction = HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST; + acore.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT; /* convert sample frequency to a number */ switch (audio->iec->status[3] & IEC958_AES3_CON_FS) { @@ -1275,23 +856,23 @@ int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data, return -EINVAL; } - err = hdmi_compute_acr(fs_nr, &n, &cts); + err = hdmi_compute_acr(pclk, fs_nr, &n, &cts); /* Audio clock regeneration settings */ - core.n = n; - core.cts = cts; + acore.n = n; + acore.cts = cts; if (dss_has_feature(FEAT_HDMI_CTS_SWMODE)) { - core.aud_par_busclk = 0; - core.cts_mode = HDMI_AUDIO_CTS_MODE_SW; - core.use_mclk = dss_has_feature(FEAT_HDMI_AUDIO_USE_MCLK); + acore.aud_par_busclk = 0; + acore.cts_mode = HDMI_AUDIO_CTS_MODE_SW; + acore.use_mclk = dss_has_feature(FEAT_HDMI_AUDIO_USE_MCLK); } else { - core.aud_par_busclk = (((128 * 31) - 1) << 8); - core.cts_mode = HDMI_AUDIO_CTS_MODE_HW; - core.use_mclk = true; + acore.aud_par_busclk = (((128 * 31) - 1) << 8); + acore.cts_mode = HDMI_AUDIO_CTS_MODE_HW; + acore.use_mclk = true; } - if (core.use_mclk) - core.mclk_mode = HDMI_AUDIO_MCLK_128FS; + if (acore.use_mclk) + acore.mclk_mode = HDMI_AUDIO_MCLK_128FS; /* Audio channels settings */ channel_count = (audio->cea->db1_ct_cc & @@ -1329,25 +910,25 @@ int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data, */ if (channel_count == 2) { audio_format.stereo_channels = HDMI_AUDIO_STEREO_ONECHANNEL; - core.i2s_cfg.active_sds = HDMI_AUDIO_I2S_SD0_EN; - core.layout = HDMI_AUDIO_LAYOUT_2CH; + acore.i2s_cfg.active_sds = HDMI_AUDIO_I2S_SD0_EN; + acore.layout = HDMI_AUDIO_LAYOUT_2CH; } else { audio_format.stereo_channels = HDMI_AUDIO_STEREO_FOURCHANNELS; - core.i2s_cfg.active_sds = HDMI_AUDIO_I2S_SD0_EN | + acore.i2s_cfg.active_sds = HDMI_AUDIO_I2S_SD0_EN | HDMI_AUDIO_I2S_SD1_EN | HDMI_AUDIO_I2S_SD2_EN | HDMI_AUDIO_I2S_SD3_EN; - core.layout = HDMI_AUDIO_LAYOUT_8CH; + acore.layout = HDMI_AUDIO_LAYOUT_8CH; } - core.en_spdif = false; + acore.en_spdif = false; /* use sample frequency from channel status word */ - core.fs_override = true; + acore.fs_override = true; /* enable ACR packets */ - core.en_acr_pkt = true; + acore.en_acr_pkt = true; /* disable direct streaming digital audio */ - core.en_dsd_audio = false; + acore.en_dsd_audio = false; /* use parallel audio interface */ - core.en_parallel_aud_input = true; + acore.en_parallel_aud_input = true; /* DMA settings */ if (word_length_16b) @@ -1374,49 +955,37 @@ int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data, audio_format.en_sig_blk_strt_end = HDMI_AUDIO_BLOCK_SIG_STARTEND_ON; /* configure DMA and audio FIFO format*/ - ti_hdmi_4xxx_wp_audio_config_dma(ip_data, &audio_dma); - ti_hdmi_4xxx_wp_audio_config_format(ip_data, &audio_format); + hdmi_wp_audio_config_dma(wp, &audio_dma); + hdmi_wp_audio_config_format(wp, &audio_format); /* configure the core*/ - ti_hdmi_4xxx_core_audio_config(ip_data, &core); + hdmi_core_audio_config(core, &acore); /* configure CEA 861 audio infoframe*/ - ti_hdmi_4xxx_core_audio_infoframe_cfg(ip_data, audio->cea); + hdmi_core_audio_infoframe_cfg(core, audio->cea); return 0; } -int ti_hdmi_4xxx_wp_audio_enable(struct hdmi_ip_data *ip_data) +int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp) { - REG_FLD_MOD(hdmi_wp_base(ip_data), - HDMI_WP_AUDIO_CTRL, true, 31, 31); - return 0; -} + REG_FLD_MOD(hdmi_av_base(core), + HDMI_CORE_AV_AUD_MODE, true, 0, 0); -void ti_hdmi_4xxx_wp_audio_disable(struct hdmi_ip_data *ip_data) -{ - REG_FLD_MOD(hdmi_wp_base(ip_data), - HDMI_WP_AUDIO_CTRL, false, 31, 31); -} + hdmi_wp_audio_core_req_enable(wp, true); -int ti_hdmi_4xxx_audio_start(struct hdmi_ip_data *ip_data) -{ - REG_FLD_MOD(hdmi_av_base(ip_data), - HDMI_CORE_AV_AUD_MODE, true, 0, 0); - REG_FLD_MOD(hdmi_wp_base(ip_data), - HDMI_WP_AUDIO_CTRL, true, 30, 30); return 0; } -void ti_hdmi_4xxx_audio_stop(struct hdmi_ip_data *ip_data) +void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp) { - REG_FLD_MOD(hdmi_av_base(ip_data), + REG_FLD_MOD(hdmi_av_base(core), HDMI_CORE_AV_AUD_MODE, false, 0, 0); - REG_FLD_MOD(hdmi_wp_base(ip_data), - HDMI_WP_AUDIO_CTRL, false, 30, 30); + + hdmi_wp_audio_core_req_enable(wp, false); } -int ti_hdmi_4xxx_audio_get_dma_port(u32 *offset, u32 *size) +int hdmi4_audio_get_dma_port(u32 *offset, u32 *size) { if (!offset || !size) return -EINVAL; @@ -1424,4 +993,42 @@ int ti_hdmi_4xxx_audio_get_dma_port(u32 *offset, u32 *size) *size = 4; return 0; } + #endif + +#define CORE_OFFSET 0x400 +#define CORE_SIZE 0xc00 + +int hdmi4_core_init(struct platform_device *pdev, struct hdmi_core_data *core) +{ + struct resource *res; + struct resource temp_res; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi_core"); + if (!res) { + DSSDBG("can't get CORE mem resource by name\n"); + /* + * if hwmod/DT doesn't have the memory resource information + * split into HDMI sub blocks by name, we try again by getting + * the platform's first resource. this code will be removed when + * the driver can get the mem resources by name + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + DSSERR("can't get CORE mem resource\n"); + return -EINVAL; + } + + temp_res.start = res->start + CORE_OFFSET; + temp_res.end = temp_res.start + CORE_SIZE - 1; + res = &temp_res; + } + + core->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!core->base) { + DSSERR("can't ioremap CORE\n"); + return -ENOMEM; + } + + return 0; +} diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h b/drivers/video/omap2/dss/hdmi4_core.h index 6ef2f929a76d..bb646896fa82 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h +++ b/drivers/video/omap2/dss/hdmi4_core.h @@ -1,7 +1,5 @@ /* - * ti_hdmi_4xxx_ip.h - * - * HDMI header definition for DM81xx, DM38xx, TI OMAP4 etc processors. + * HDMI header definition for OMAP4 HDMI core IP * * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ * @@ -18,41 +16,22 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ -#ifndef _HDMI_TI_4xxx_H_ -#define _HDMI_TI_4xxx_H_ - -#include <linux/string.h> -#include <video/omapdss.h> -#include "ti_hdmi.h" - -/* HDMI Wrapper */ +#ifndef _HDMI4_CORE_H_ +#define _HDMI4_CORE_H_ -#define HDMI_WP_REVISION 0x0 -#define HDMI_WP_SYSCONFIG 0x10 -#define HDMI_WP_IRQSTATUS_RAW 0x24 -#define HDMI_WP_IRQSTATUS 0x28 -#define HDMI_WP_PWR_CTRL 0x40 -#define HDMI_WP_IRQENABLE_SET 0x2C -#define HDMI_WP_IRQENABLE_CLR 0x30 -#define HDMI_WP_VIDEO_CFG 0x50 -#define HDMI_WP_VIDEO_SIZE 0x60 -#define HDMI_WP_VIDEO_TIMING_H 0x68 -#define HDMI_WP_VIDEO_TIMING_V 0x6C -#define HDMI_WP_WP_CLK 0x70 -#define HDMI_WP_AUDIO_CFG 0x80 -#define HDMI_WP_AUDIO_CFG2 0x84 -#define HDMI_WP_AUDIO_CTRL 0x88 -#define HDMI_WP_AUDIO_DATA 0x8C +#include "hdmi.h" -/* HDMI IP Core System */ +/* OMAP4 HDMI IP Core System */ #define HDMI_CORE_SYS_VND_IDL 0x0 #define HDMI_CORE_SYS_DEV_IDL 0x8 #define HDMI_CORE_SYS_DEV_IDH 0xC #define HDMI_CORE_SYS_DEV_REV 0x10 #define HDMI_CORE_SYS_SRST 0x14 -#define HDMI_CORE_CTRL1 0x20 +#define HDMI_CORE_SYS_SYS_CTRL1 0x20 #define HDMI_CORE_SYS_SYS_STAT 0x24 +#define HDMI_CORE_SYS_SYS_CTRL3 0x28 +#define HDMI_CORE_SYS_DCTL 0x34 #define HDMI_CORE_SYS_DE_DLY 0xC8 #define HDMI_CORE_SYS_DE_CTRL 0xCC #define HDMI_CORE_SYS_DE_TOP 0xD0 @@ -60,20 +39,65 @@ #define HDMI_CORE_SYS_DE_CNTH 0xDC #define HDMI_CORE_SYS_DE_LINL 0xE0 #define HDMI_CORE_SYS_DE_LINH_1 0xE4 +#define HDMI_CORE_SYS_HRES_L 0xE8 +#define HDMI_CORE_SYS_HRES_H 0xEC +#define HDMI_CORE_SYS_VRES_L 0xF0 +#define HDMI_CORE_SYS_VRES_H 0xF4 +#define HDMI_CORE_SYS_IADJUST 0xF8 +#define HDMI_CORE_SYS_POLDETECT 0xFC +#define HDMI_CORE_SYS_HWIDTH1 0x110 +#define HDMI_CORE_SYS_HWIDTH2 0x114 +#define HDMI_CORE_SYS_VWIDTH 0x11C +#define HDMI_CORE_SYS_VID_CTRL 0x120 #define HDMI_CORE_SYS_VID_ACEN 0x124 #define HDMI_CORE_SYS_VID_MODE 0x128 +#define HDMI_CORE_SYS_VID_BLANK1 0x12C +#define HDMI_CORE_SYS_VID_BLANK2 0x130 +#define HDMI_CORE_SYS_VID_BLANK3 0x134 +#define HDMI_CORE_SYS_DC_HEADER 0x138 +#define HDMI_CORE_SYS_VID_DITHER 0x13C +#define HDMI_CORE_SYS_RGB2XVYCC_CT 0x140 +#define HDMI_CORE_SYS_R2Y_COEFF_LOW 0x144 +#define HDMI_CORE_SYS_R2Y_COEFF_UP 0x148 +#define HDMI_CORE_SYS_G2Y_COEFF_LOW 0x14C +#define HDMI_CORE_SYS_G2Y_COEFF_UP 0x150 +#define HDMI_CORE_SYS_B2Y_COEFF_LOW 0x154 +#define HDMI_CORE_SYS_B2Y_COEFF_UP 0x158 +#define HDMI_CORE_SYS_R2CB_COEFF_LOW 0x15C +#define HDMI_CORE_SYS_R2CB_COEFF_UP 0x160 +#define HDMI_CORE_SYS_G2CB_COEFF_LOW 0x164 +#define HDMI_CORE_SYS_G2CB_COEFF_UP 0x168 +#define HDMI_CORE_SYS_B2CB_COEFF_LOW 0x16C +#define HDMI_CORE_SYS_B2CB_COEFF_UP 0x170 +#define HDMI_CORE_SYS_R2CR_COEFF_LOW 0x174 +#define HDMI_CORE_SYS_R2CR_COEFF_UP 0x178 +#define HDMI_CORE_SYS_G2CR_COEFF_LOW 0x17C +#define HDMI_CORE_SYS_G2CR_COEFF_UP 0x180 +#define HDMI_CORE_SYS_B2CR_COEFF_LOW 0x184 +#define HDMI_CORE_SYS_B2CR_COEFF_UP 0x188 +#define HDMI_CORE_SYS_RGB_OFFSET_LOW 0x18C +#define HDMI_CORE_SYS_RGB_OFFSET_UP 0x190 +#define HDMI_CORE_SYS_Y_OFFSET_LOW 0x194 +#define HDMI_CORE_SYS_Y_OFFSET_UP 0x198 +#define HDMI_CORE_SYS_CBCR_OFFSET_LOW 0x19C +#define HDMI_CORE_SYS_CBCR_OFFSET_UP 0x1A0 #define HDMI_CORE_SYS_INTR_STATE 0x1C0 #define HDMI_CORE_SYS_INTR1 0x1C4 #define HDMI_CORE_SYS_INTR2 0x1C8 #define HDMI_CORE_SYS_INTR3 0x1CC #define HDMI_CORE_SYS_INTR4 0x1D0 -#define HDMI_CORE_SYS_UMASK1 0x1D4 +#define HDMI_CORE_SYS_INTR_UNMASK1 0x1D4 +#define HDMI_CORE_SYS_INTR_UNMASK2 0x1D8 +#define HDMI_CORE_SYS_INTR_UNMASK3 0x1DC +#define HDMI_CORE_SYS_INTR_UNMASK4 0x1E0 +#define HDMI_CORE_SYS_INTR_CTRL 0x1E4 #define HDMI_CORE_SYS_TMDS_CTRL 0x208 -#define HDMI_CORE_CTRL1_VEN_FOLLOWVSYNC 0x1 -#define HDMI_CORE_CTRL1_HEN_FOLLOWHSYNC 0x1 -#define HDMI_CORE_CTRL1_BSEL_24BITBUS 0x1 -#define HDMI_CORE_CTRL1_EDGE_RISINGEDGE 0x1 +/* value definitions for HDMI_CORE_SYS_SYS_CTRL1 fields */ +#define HDMI_CORE_SYS_SYS_CTRL1_VEN_FOLLOWVSYNC 0x1 +#define HDMI_CORE_SYS_SYS_CTRL1_HEN_FOLLOWHSYNC 0x1 +#define HDMI_CORE_SYS_SYS_CTRL1_BSEL_24BITBUS 0x1 +#define HDMI_CORE_SYS_SYS_CTRL1_EDGE_RISINGEDGE 0x1 /* HDMI DDC E-DID */ #define HDMI_CORE_DDC_ADDR 0x3B4 @@ -158,35 +182,6 @@ #define HDMI_CORE_AV_GEN_DBYTE_NELEMS 31 #define HDMI_CORE_AV_GEN2_DBYTE_NELEMS 31 -/* PLL */ - -#define PLLCTRL_PLL_CONTROL 0x0 -#define PLLCTRL_PLL_STATUS 0x4 -#define PLLCTRL_PLL_GO 0x8 -#define PLLCTRL_CFG1 0xC -#define PLLCTRL_CFG2 0x10 -#define PLLCTRL_CFG3 0x14 -#define PLLCTRL_CFG4 0x20 - -/* HDMI PHY */ - -#define HDMI_TXPHY_TX_CTRL 0x0 -#define HDMI_TXPHY_DIGITAL_CTRL 0x4 -#define HDMI_TXPHY_POWER_CTRL 0x8 -#define HDMI_TXPHY_PAD_CFG_CTRL 0xC - -#define REG_FLD_MOD(base, idx, val, start, end) \ - hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\ - val, start, end)) -#define REG_GET(base, idx, start, end) \ - FLD_GET(hdmi_read_reg(base, idx), start, end) - -enum hdmi_phy_pwr { - HDMI_PHYPWRCMD_OFF = 0, - HDMI_PHYPWRCMD_LDOON = 1, - HDMI_PHYPWRCMD_TXON = 2 -}; - enum hdmi_core_inputbus_width { HDMI_INPUT_8BIT = 0, HDMI_INPUT_10BIT = 1, @@ -229,114 +224,6 @@ enum hdmi_core_packet_ctrl { HDMI_PACKETREPEATOFF = 0 }; -/* INFOFRAME_AVI_ and INFOFRAME_AUDIO_ definitions */ -enum hdmi_core_infoframe { - HDMI_INFOFRAME_AVI_DB1Y_RGB = 0, - HDMI_INFOFRAME_AVI_DB1Y_YUV422 = 1, - HDMI_INFOFRAME_AVI_DB1Y_YUV444 = 2, - HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF = 0, - HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_ON = 1, - HDMI_INFOFRAME_AVI_DB1B_NO = 0, - HDMI_INFOFRAME_AVI_DB1B_VERT = 1, - HDMI_INFOFRAME_AVI_DB1B_HORI = 2, - HDMI_INFOFRAME_AVI_DB1B_VERTHORI = 3, - HDMI_INFOFRAME_AVI_DB1S_0 = 0, - HDMI_INFOFRAME_AVI_DB1S_1 = 1, - HDMI_INFOFRAME_AVI_DB1S_2 = 2, - HDMI_INFOFRAME_AVI_DB2C_NO = 0, - HDMI_INFOFRAME_AVI_DB2C_ITU601 = 1, - HDMI_INFOFRAME_AVI_DB2C_ITU709 = 2, - HDMI_INFOFRAME_AVI_DB2C_EC_EXTENDED = 3, - HDMI_INFOFRAME_AVI_DB2M_NO = 0, - HDMI_INFOFRAME_AVI_DB2M_43 = 1, - HDMI_INFOFRAME_AVI_DB2M_169 = 2, - HDMI_INFOFRAME_AVI_DB2R_SAME = 8, - HDMI_INFOFRAME_AVI_DB2R_43 = 9, - HDMI_INFOFRAME_AVI_DB2R_169 = 10, - HDMI_INFOFRAME_AVI_DB2R_149 = 11, - HDMI_INFOFRAME_AVI_DB3ITC_NO = 0, - HDMI_INFOFRAME_AVI_DB3ITC_YES = 1, - HDMI_INFOFRAME_AVI_DB3EC_XVYUV601 = 0, - HDMI_INFOFRAME_AVI_DB3EC_XVYUV709 = 1, - HDMI_INFOFRAME_AVI_DB3Q_DEFAULT = 0, - HDMI_INFOFRAME_AVI_DB3Q_LR = 1, - HDMI_INFOFRAME_AVI_DB3Q_FR = 2, - HDMI_INFOFRAME_AVI_DB3SC_NO = 0, - HDMI_INFOFRAME_AVI_DB3SC_HORI = 1, - HDMI_INFOFRAME_AVI_DB3SC_VERT = 2, - HDMI_INFOFRAME_AVI_DB3SC_HORIVERT = 3, - HDMI_INFOFRAME_AVI_DB5PR_NO = 0, - HDMI_INFOFRAME_AVI_DB5PR_2 = 1, - HDMI_INFOFRAME_AVI_DB5PR_3 = 2, - HDMI_INFOFRAME_AVI_DB5PR_4 = 3, - HDMI_INFOFRAME_AVI_DB5PR_5 = 4, - HDMI_INFOFRAME_AVI_DB5PR_6 = 5, - HDMI_INFOFRAME_AVI_DB5PR_7 = 6, - HDMI_INFOFRAME_AVI_DB5PR_8 = 7, - HDMI_INFOFRAME_AVI_DB5PR_9 = 8, - HDMI_INFOFRAME_AVI_DB5PR_10 = 9, -}; - -enum hdmi_packing_mode { - HDMI_PACK_10b_RGB_YUV444 = 0, - HDMI_PACK_24b_RGB_YUV444_YUV422 = 1, - HDMI_PACK_20b_YUV422 = 2, - HDMI_PACK_ALREADYPACKED = 7 -}; - -enum hdmi_core_audio_layout { - HDMI_AUDIO_LAYOUT_2CH = 0, - HDMI_AUDIO_LAYOUT_8CH = 1 -}; - -enum hdmi_core_cts_mode { - HDMI_AUDIO_CTS_MODE_HW = 0, - HDMI_AUDIO_CTS_MODE_SW = 1 -}; - -enum hdmi_stereo_channels { - HDMI_AUDIO_STEREO_NOCHANNELS = 0, - HDMI_AUDIO_STEREO_ONECHANNEL = 1, - HDMI_AUDIO_STEREO_TWOCHANNELS = 2, - HDMI_AUDIO_STEREO_THREECHANNELS = 3, - HDMI_AUDIO_STEREO_FOURCHANNELS = 4 -}; - -enum hdmi_audio_type { - HDMI_AUDIO_TYPE_LPCM = 0, - HDMI_AUDIO_TYPE_IEC = 1 -}; - -enum hdmi_audio_justify { - HDMI_AUDIO_JUSTIFY_LEFT = 0, - HDMI_AUDIO_JUSTIFY_RIGHT = 1 -}; - -enum hdmi_audio_sample_order { - HDMI_AUDIO_SAMPLE_RIGHT_FIRST = 0, - HDMI_AUDIO_SAMPLE_LEFT_FIRST = 1 -}; - -enum hdmi_audio_samples_perword { - HDMI_AUDIO_ONEWORD_ONESAMPLE = 0, - HDMI_AUDIO_ONEWORD_TWOSAMPLES = 1 -}; - -enum hdmi_audio_sample_size { - HDMI_AUDIO_SAMPLE_16BITS = 0, - HDMI_AUDIO_SAMPLE_24BITS = 1 -}; - -enum hdmi_audio_transf_mode { - HDMI_AUDIO_TRANSF_DMA = 0, - HDMI_AUDIO_TRANSF_IRQ = 1 -}; - -enum hdmi_audio_blk_strt_end_sig { - HDMI_AUDIO_BLOCK_SIG_STARTEND_ON = 0, - HDMI_AUDIO_BLOCK_SIG_STARTEND_OFF = 1 -}; - enum hdmi_audio_i2s_config { HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST = 0, HDMI_AUDIO_I2S_LSB_SHIFTED_FIRST = 1, @@ -352,17 +239,6 @@ enum hdmi_audio_i2s_config { HDMI_AUDIO_I2S_SD3_EN = 1 << 3, }; -enum hdmi_audio_mclk_mode { - HDMI_AUDIO_MCLK_128FS = 0, - HDMI_AUDIO_MCLK_256FS = 1, - HDMI_AUDIO_MCLK_384FS = 2, - HDMI_AUDIO_MCLK_512FS = 3, - HDMI_AUDIO_MCLK_768FS = 4, - HDMI_AUDIO_MCLK_1024FS = 5, - HDMI_AUDIO_MCLK_1152FS = 6, - HDMI_AUDIO_MCLK_192FS = 7 -}; - struct hdmi_core_video_config { enum hdmi_core_inputbus_width ip_bus_width; enum hdmi_core_dither_trunc op_dither_truc; @@ -383,55 +259,18 @@ struct hdmi_core_packet_enable_repeat { u32 generic_pkt_repeat; }; -struct hdmi_video_format { - enum hdmi_packing_mode packing_mode; - u32 y_res; /* Line per panel */ - u32 x_res; /* pixel per line */ -}; - -struct hdmi_audio_format { - enum hdmi_stereo_channels stereo_channels; - u8 active_chnnls_msk; - enum hdmi_audio_type type; - enum hdmi_audio_justify justification; - enum hdmi_audio_sample_order sample_order; - enum hdmi_audio_samples_perword samples_per_word; - enum hdmi_audio_sample_size sample_size; - enum hdmi_audio_blk_strt_end_sig en_sig_blk_strt_end; -}; - -struct hdmi_audio_dma { - u8 transfer_size; - u8 block_size; - enum hdmi_audio_transf_mode mode; - u16 fifo_threshold; -}; - -struct hdmi_core_audio_i2s_config { - u8 in_length_bits; - u8 justification; - u8 sck_edge_mode; - u8 vbit; - u8 direction; - u8 shift; - u8 active_sds; -}; - -struct hdmi_core_audio_config { - struct hdmi_core_audio_i2s_config i2s_cfg; - struct snd_aes_iec958 *iec60958_cfg; - bool fs_override; - u32 n; - u32 cts; - u32 aud_par_busclk; - enum hdmi_core_audio_layout layout; - enum hdmi_core_cts_mode cts_mode; - bool use_mclk; - enum hdmi_audio_mclk_mode mclk_mode; - bool en_acr_pkt; - bool en_dsd_audio; - bool en_parallel_aud_input; - bool en_spdif; -}; +int hdmi4_read_edid(struct hdmi_core_data *core, u8 *edid, int len); +void hdmi4_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp, + struct hdmi_config *cfg); +void hdmi4_core_dump(struct hdmi_core_data *core, struct seq_file *s); +int hdmi4_core_init(struct platform_device *pdev, struct hdmi_core_data *core); + +#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) +int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp); +void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp); +int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp, + struct omap_dss_audio *audio, u32 pclk); +int hdmi4_audio_get_dma_port(u32 *offset, u32 *size); +#endif #endif diff --git a/drivers/video/omap2/dss/hdmi_common.c b/drivers/video/omap2/dss/hdmi_common.c new file mode 100644 index 000000000000..5586aaad9d63 --- /dev/null +++ b/drivers/video/omap2/dss/hdmi_common.c @@ -0,0 +1,423 @@ + +/* + * Logic for the below structure : + * user enters the CEA or VESA timings by specifying the HDMI/DVI code. + * There is a correspondence between CEA/VESA timing and code, please + * refer to section 6.3 in HDMI 1.3 specification for timing code. + * + * In the below structure, cea_vesa_timings corresponds to all OMAP4 + * supported CEA and VESA timing values.code_cea corresponds to the CEA + * code, It is used to get the timing from cea_vesa_timing array.Similarly + * with code_vesa. Code_index is used for back mapping, that is once EDID + * is read from the TV, EDID is parsed to find the timing values and then + * map it to corresponding CEA or VESA index. + */ + +#include <linux/kernel.h> +#include <linux/err.h> +#include <video/omapdss.h> + +#include "hdmi.h" + +static const struct hdmi_config cea_timings[] = { + { + { 640, 480, 25200, 96, 16, 48, 2, 10, 33, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 1, HDMI_HDMI }, + }, + { + { 720, 480, 27027, 62, 16, 60, 6, 9, 30, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 2, HDMI_HDMI }, + }, + { + { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 4, HDMI_HDMI }, + }, + { + { 1920, 540, 74250, 44, 88, 148, 5, 2, 15, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + true, }, + { 5, HDMI_HDMI }, + }, + { + { 1440, 240, 27027, 124, 38, 114, 3, 4, 15, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + true, }, + { 6, HDMI_HDMI }, + }, + { + { 1920, 1080, 148500, 44, 88, 148, 5, 4, 36, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 16, HDMI_HDMI }, + }, + { + { 720, 576, 27000, 64, 12, 68, 5, 5, 39, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 17, HDMI_HDMI }, + }, + { + { 1280, 720, 74250, 40, 440, 220, 5, 5, 20, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 19, HDMI_HDMI }, + }, + { + { 1920, 540, 74250, 44, 528, 148, 5, 2, 15, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + true, }, + { 20, HDMI_HDMI }, + }, + { + { 1440, 288, 27000, 126, 24, 138, 3, 2, 19, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + true, }, + { 21, HDMI_HDMI }, + }, + { + { 1440, 576, 54000, 128, 24, 136, 5, 5, 39, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 29, HDMI_HDMI }, + }, + { + { 1920, 1080, 148500, 44, 528, 148, 5, 4, 36, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 31, HDMI_HDMI }, + }, + { + { 1920, 1080, 74250, 44, 638, 148, 5, 4, 36, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 32, HDMI_HDMI }, + }, + { + { 2880, 480, 108108, 248, 64, 240, 6, 9, 30, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 35, HDMI_HDMI }, + }, + { + { 2880, 576, 108000, 256, 48, 272, 5, 5, 39, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 37, HDMI_HDMI }, + }, +}; + +static const struct hdmi_config vesa_timings[] = { +/* VESA From Here */ + { + { 640, 480, 25175, 96, 16, 48, 2, 11, 31, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 4, HDMI_DVI }, + }, + { + { 800, 600, 40000, 128, 40, 88, 4, 1, 23, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 9, HDMI_DVI }, + }, + { + { 848, 480, 33750, 112, 16, 112, 8, 6, 23, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0xE, HDMI_DVI }, + }, + { + { 1280, 768, 79500, 128, 64, 192, 7, 3, 20, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 0x17, HDMI_DVI }, + }, + { + { 1280, 800, 83500, 128, 72, 200, 6, 3, 22, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 0x1C, HDMI_DVI }, + }, + { + { 1360, 768, 85500, 112, 64, 256, 6, 3, 18, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x27, HDMI_DVI }, + }, + { + { 1280, 960, 108000, 112, 96, 312, 3, 1, 36, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x20, HDMI_DVI }, + }, + { + { 1280, 1024, 108000, 112, 48, 248, 3, 1, 38, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x23, HDMI_DVI }, + }, + { + { 1024, 768, 65000, 136, 24, 160, 6, 3, 29, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 0x10, HDMI_DVI }, + }, + { + { 1400, 1050, 121750, 144, 88, 232, 4, 3, 32, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 0x2A, HDMI_DVI }, + }, + { + { 1440, 900, 106500, 152, 80, 232, 6, 3, 25, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 0x2F, HDMI_DVI }, + }, + { + { 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, + false, }, + { 0x3A, HDMI_DVI }, + }, + { + { 1366, 768, 85500, 143, 70, 213, 3, 3, 24, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x51, HDMI_DVI }, + }, + { + { 1920, 1080, 148500, 44, 148, 80, 5, 4, 36, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x52, HDMI_DVI }, + }, + { + { 1280, 768, 68250, 32, 48, 80, 7, 3, 12, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x16, HDMI_DVI }, + }, + { + { 1400, 1050, 101000, 32, 48, 80, 4, 3, 23, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x29, HDMI_DVI }, + }, + { + { 1680, 1050, 119000, 32, 48, 80, 6, 3, 21, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x39, HDMI_DVI }, + }, + { + { 1280, 800, 79500, 32, 48, 80, 6, 3, 14, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x1B, HDMI_DVI }, + }, + { + { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, + OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x55, HDMI_DVI }, + }, + { + { 1920, 1200, 154000, 32, 48, 80, 6, 3, 26, + OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, + false, }, + { 0x44, HDMI_DVI }, + }, +}; + +const struct hdmi_config *hdmi_default_timing(void) +{ + return &vesa_timings[0]; +} + +static const struct hdmi_config *hdmi_find_timing(int code, + const struct hdmi_config *timings_arr, int len) +{ + int i; + + for (i = 0; i < len; i++) { + if (timings_arr[i].cm.code == code) + return &timings_arr[i]; + } + + return NULL; +} + +const struct hdmi_config *hdmi_get_timings(int mode, int code) +{ + const struct hdmi_config *arr; + int len; + + if (mode == HDMI_DVI) { + arr = vesa_timings; + len = ARRAY_SIZE(vesa_timings); + } else { + arr = cea_timings; + len = ARRAY_SIZE(cea_timings); + } + + return hdmi_find_timing(code, arr, len); +} + +static bool hdmi_timings_compare(struct omap_video_timings *timing1, + const struct omap_video_timings *timing2) +{ + int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; + + if ((DIV_ROUND_CLOSEST(timing2->pixel_clock, 1000) == + DIV_ROUND_CLOSEST(timing1->pixel_clock, 1000)) && + (timing2->x_res == timing1->x_res) && + (timing2->y_res == timing1->y_res)) { + + timing2_hsync = timing2->hfp + timing2->hsw + timing2->hbp; + timing1_hsync = timing1->hfp + timing1->hsw + timing1->hbp; + timing2_vsync = timing2->vfp + timing2->vsw + timing2->vbp; + timing1_vsync = timing1->vfp + timing1->vsw + timing1->vbp; + + DSSDBG("timing1_hsync = %d timing1_vsync = %d"\ + "timing2_hsync = %d timing2_vsync = %d\n", + timing1_hsync, timing1_vsync, + timing2_hsync, timing2_vsync); + + if ((timing1_hsync == timing2_hsync) && + (timing1_vsync == timing2_vsync)) { + return true; + } + } + return false; +} + +struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing) +{ + int i; + struct hdmi_cm cm = {-1}; + DSSDBG("hdmi_get_code\n"); + + for (i = 0; i < ARRAY_SIZE(cea_timings); i++) { + if (hdmi_timings_compare(timing, &cea_timings[i].timings)) { + cm = cea_timings[i].cm; + goto end; + } + } + for (i = 0; i < ARRAY_SIZE(vesa_timings); i++) { + if (hdmi_timings_compare(timing, &vesa_timings[i].timings)) { + cm = vesa_timings[i].cm; + goto end; + } + } + +end: + return cm; +} + +#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) +int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) +{ + u32 deep_color; + bool deep_color_correct = false; + + if (n == NULL || cts == NULL) + return -EINVAL; + + /* TODO: When implemented, query deep color mode here. */ + deep_color = 100; + + /* + * When using deep color, the default N value (as in the HDMI + * specification) yields to an non-integer CTS. Hence, we + * modify it while keeping the restrictions described in + * section 7.2.1 of the HDMI 1.4a specification. + */ + switch (sample_freq) { + case 32000: + case 48000: + case 96000: + case 192000: + if (deep_color == 125) + if (pclk == 27027 || pclk == 74250) + deep_color_correct = true; + if (deep_color == 150) + if (pclk == 27027) + deep_color_correct = true; + break; + case 44100: + case 88200: + case 176400: + if (deep_color == 125) + if (pclk == 27027) + deep_color_correct = true; + break; + default: + return -EINVAL; + } + + if (deep_color_correct) { + switch (sample_freq) { + case 32000: + *n = 8192; + break; + case 44100: + *n = 12544; + break; + case 48000: + *n = 8192; + break; + case 88200: + *n = 25088; + break; + case 96000: + *n = 16384; + break; + case 176400: + *n = 50176; + break; + case 192000: + *n = 32768; + break; + default: + return -EINVAL; + } + } else { + switch (sample_freq) { + case 32000: + *n = 4096; + break; + case 44100: + *n = 6272; + break; + case 48000: + *n = 6144; + break; + case 88200: + *n = 12544; + break; + case 96000: + *n = 12288; + break; + case 176400: + *n = 25088; + break; + case 192000: + *n = 24576; + break; + default: + return -EINVAL; + } + } + /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ + *cts = pclk * (*n / 128) * deep_color / (sample_freq / 10); + + return 0; +} +#endif diff --git a/drivers/video/omap2/dss/hdmi_phy.c b/drivers/video/omap2/dss/hdmi_phy.c new file mode 100644 index 000000000000..45acb997ac00 --- /dev/null +++ b/drivers/video/omap2/dss/hdmi_phy.c @@ -0,0 +1,160 @@ +/* + * HDMI PHY + * + * Copyright (C) 2013 Texas Instruments Incorporated + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <video/omapdss.h> + +#include "dss.h" +#include "hdmi.h" + +void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s) +{ +#define DUMPPHY(r) seq_printf(s, "%-35s %08x\n", #r,\ + hdmi_read_reg(phy->base, r)) + + DUMPPHY(HDMI_TXPHY_TX_CTRL); + DUMPPHY(HDMI_TXPHY_DIGITAL_CTRL); + DUMPPHY(HDMI_TXPHY_POWER_CTRL); + DUMPPHY(HDMI_TXPHY_PAD_CFG_CTRL); +} + +static irqreturn_t hdmi_irq_handler(int irq, void *data) +{ + struct hdmi_wp_data *wp = data; + u32 irqstatus; + + irqstatus = hdmi_wp_get_irqstatus(wp); + hdmi_wp_set_irqstatus(wp, irqstatus); + + if ((irqstatus & HDMI_IRQ_LINK_CONNECT) && + irqstatus & HDMI_IRQ_LINK_DISCONNECT) { + /* + * If we get both connect and disconnect interrupts at the same + * time, turn off the PHY, clear interrupts, and restart, which + * raises connect interrupt if a cable is connected, or nothing + * if cable is not connected. + */ + hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); + + hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | + HDMI_IRQ_LINK_DISCONNECT); + + hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); + } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) { + hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); + } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) { + hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); + } + + return IRQ_HANDLED; +} + +int hdmi_phy_enable(struct hdmi_phy_data *phy, struct hdmi_wp_data *wp, + struct hdmi_config *cfg) +{ + u16 r = 0; + u32 irqstatus; + + hdmi_wp_clear_irqenable(wp, 0xffffffff); + + irqstatus = hdmi_wp_get_irqstatus(wp); + hdmi_wp_set_irqstatus(wp, irqstatus); + + r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); + if (r) + return r; + + /* + * Read address 0 in order to get the SCP reset done completed + * Dummy access performed to make sure reset is done + */ + hdmi_read_reg(phy->base, HDMI_TXPHY_TX_CTRL); + + /* + * Write to phy address 0 to configure the clock + * use HFBITCLK write HDMI_TXPHY_TX_CONTROL_FREQOUT field + */ + REG_FLD_MOD(phy->base, HDMI_TXPHY_TX_CTRL, 0x1, 31, 30); + + /* Write to phy address 1 to start HDMI line (TXVALID and TMDSCLKEN) */ + hdmi_write_reg(phy->base, HDMI_TXPHY_DIGITAL_CTRL, 0xF0000000); + + /* Setup max LDO voltage */ + REG_FLD_MOD(phy->base, HDMI_TXPHY_POWER_CTRL, 0xB, 3, 0); + + /* Write to phy address 3 to change the polarity control */ + REG_FLD_MOD(phy->base, HDMI_TXPHY_PAD_CFG_CTRL, 0x1, 27, 27); + + r = request_threaded_irq(phy->irq, NULL, hdmi_irq_handler, + IRQF_ONESHOT, "OMAP HDMI", wp); + if (r) { + DSSERR("HDMI IRQ request failed\n"); + hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); + return r; + } + + hdmi_wp_set_irqenable(wp, + HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); + + return 0; +} + +void hdmi_phy_disable(struct hdmi_phy_data *phy, struct hdmi_wp_data *wp) +{ + free_irq(phy->irq, wp); + + hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); +} + +#define PHY_OFFSET 0x300 +#define PHY_SIZE 0x100 + +int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy) +{ + struct resource *res; + struct resource temp_res; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi_txphy"); + if (!res) { + DSSDBG("can't get PHY mem resource by name\n"); + /* + * if hwmod/DT doesn't have the memory resource information + * split into HDMI sub blocks by name, we try again by getting + * the platform's first resource. this code will be removed when + * the driver can get the mem resources by name + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + DSSERR("can't get PHY mem resource\n"); + return -EINVAL; + } + + temp_res.start = res->start + PHY_OFFSET; + temp_res.end = temp_res.start + PHY_SIZE - 1; + res = &temp_res; + } + + phy->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!phy->base) { + DSSERR("can't ioremap TX PHY\n"); + return -ENOMEM; + } + + phy->irq = platform_get_irq(pdev, 0); + if (phy->irq < 0) { + DSSERR("platform_get_irq failed\n"); + return -ENODEV; + } + + return 0; +} diff --git a/drivers/video/omap2/dss/hdmi_pll.c b/drivers/video/omap2/dss/hdmi_pll.c new file mode 100644 index 000000000000..d3e6e78c0082 --- /dev/null +++ b/drivers/video/omap2/dss/hdmi_pll.c @@ -0,0 +1,230 @@ +/* + * HDMI PLL + * + * Copyright (C) 2013 Texas Instruments Incorporated + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <video/omapdss.h> + +#include "dss.h" +#include "hdmi.h" + +#define HDMI_DEFAULT_REGN 16 +#define HDMI_DEFAULT_REGM2 1 + +void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s) +{ +#define DUMPPLL(r) seq_printf(s, "%-35s %08x\n", #r,\ + hdmi_read_reg(pll->base, r)) + + DUMPPLL(PLLCTRL_PLL_CONTROL); + DUMPPLL(PLLCTRL_PLL_STATUS); + DUMPPLL(PLLCTRL_PLL_GO); + DUMPPLL(PLLCTRL_CFG1); + DUMPPLL(PLLCTRL_CFG2); + DUMPPLL(PLLCTRL_CFG3); + DUMPPLL(PLLCTRL_SSC_CFG1); + DUMPPLL(PLLCTRL_SSC_CFG2); + DUMPPLL(PLLCTRL_CFG4); +} + +void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin, int phy) +{ + struct hdmi_pll_info *pi = &pll->info; + unsigned long refclk; + u32 mf; + + /* use our funky units */ + clkin /= 10000; + + /* + * Input clock is predivided by N + 1 + * out put of which is reference clk + */ + + pi->regn = HDMI_DEFAULT_REGN; + + refclk = clkin / pi->regn; + + pi->regm2 = HDMI_DEFAULT_REGM2; + + /* + * multiplier is pixel_clk/ref_clk + * Multiplying by 100 to avoid fractional part removal + */ + pi->regm = phy * pi->regm2 / refclk; + + /* + * fractional multiplier is remainder of the difference between + * multiplier and actual phy(required pixel clock thus should be + * multiplied by 2^18(262144) divided by the reference clock + */ + mf = (phy - pi->regm / pi->regm2 * refclk) * 262144; + pi->regmf = pi->regm2 * mf / refclk; + + /* + * Dcofreq should be set to 1 if required pixel clock + * is greater than 1000MHz + */ + pi->dcofreq = phy > 1000 * 100; + pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10; + + /* Set the reference clock to sysclk reference */ + pi->refsel = HDMI_REFSEL_SYSCLK; + + DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); + DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd); +} + + +static int hdmi_pll_config(struct hdmi_pll_data *pll) +{ + u32 r; + struct hdmi_pll_info *fmt = &pll->info; + + /* PLL start always use manual mode */ + REG_FLD_MOD(pll->base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0); + + r = hdmi_read_reg(pll->base, PLLCTRL_CFG1); + r = FLD_MOD(r, fmt->regm, 20, 9); /* CFG1_PLL_REGM */ + r = FLD_MOD(r, fmt->regn - 1, 8, 1); /* CFG1_PLL_REGN */ + hdmi_write_reg(pll->base, PLLCTRL_CFG1, r); + + r = hdmi_read_reg(pll->base, PLLCTRL_CFG2); + + r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */ + r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */ + r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */ + r = FLD_MOD(r, fmt->refsel, 22, 21); /* REFSEL */ + + if (fmt->dcofreq) { + /* divider programming for frequency beyond 1000Mhz */ + REG_FLD_MOD(pll->base, PLLCTRL_CFG3, fmt->regsd, 17, 10); + r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */ + } else { + r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */ + } + + hdmi_write_reg(pll->base, PLLCTRL_CFG2, r); + + r = hdmi_read_reg(pll->base, PLLCTRL_CFG4); + r = FLD_MOD(r, fmt->regm2, 24, 18); + r = FLD_MOD(r, fmt->regmf, 17, 0); + hdmi_write_reg(pll->base, PLLCTRL_CFG4, r); + + /* go now */ + REG_FLD_MOD(pll->base, PLLCTRL_PLL_GO, 0x1, 0, 0); + + /* wait for bit change */ + if (hdmi_wait_for_bit_change(pll->base, PLLCTRL_PLL_GO, + 0, 0, 1) != 1) { + pr_err("PLL GO bit not set\n"); + return -ETIMEDOUT; + } + + /* Wait till the lock bit is set in PLL status */ + if (hdmi_wait_for_bit_change(pll->base, + PLLCTRL_PLL_STATUS, 1, 1, 1) != 1) { + pr_err("cannot lock PLL\n"); + pr_err("CFG1 0x%x\n", + hdmi_read_reg(pll->base, PLLCTRL_CFG1)); + pr_err("CFG2 0x%x\n", + hdmi_read_reg(pll->base, PLLCTRL_CFG2)); + pr_err("CFG4 0x%x\n", + hdmi_read_reg(pll->base, PLLCTRL_CFG4)); + return -ETIMEDOUT; + } + + pr_debug("PLL locked!\n"); + + return 0; +} + +static int hdmi_pll_reset(struct hdmi_pll_data *pll) +{ + /* SYSRESET controlled by power FSM */ + REG_FLD_MOD(pll->base, PLLCTRL_PLL_CONTROL, 0x0, 3, 3); + + /* READ 0x0 reset is in progress */ + if (hdmi_wait_for_bit_change(pll->base, PLLCTRL_PLL_STATUS, 0, 0, 1) + != 1) { + pr_err("Failed to sysreset PLL\n"); + return -ETIMEDOUT; + } + + return 0; +} + +int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) +{ + u16 r = 0; + + r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); + if (r) + return r; + + r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); + if (r) + return r; + + r = hdmi_pll_reset(pll); + if (r) + return r; + + r = hdmi_pll_config(pll); + if (r) + return r; + + return 0; +} + +void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) +{ + hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); +} + +#define PLL_OFFSET 0x200 +#define PLL_SIZE 0x100 + +int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll) +{ + struct resource *res; + struct resource temp_res; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi_pllctrl"); + if (!res) { + DSSDBG("can't get PLL mem resource by name\n"); + /* + * if hwmod/DT doesn't have the memory resource information + * split into HDMI sub blocks by name, we try again by getting + * the platform's first resource. this code will be removed when + * the driver can get the mem resources by name + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + DSSERR("can't get PLL mem resource\n"); + return -EINVAL; + } + + temp_res.start = res->start + PLL_OFFSET; + temp_res.end = temp_res.start + PLL_SIZE - 1; + res = &temp_res; + } + + pll->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!pll->base) { + DSSERR("can't ioremap PLLCTRL\n"); + return -ENOMEM; + } + + return 0; +} diff --git a/drivers/video/omap2/dss/hdmi_wp.c b/drivers/video/omap2/dss/hdmi_wp.c new file mode 100644 index 000000000000..8151d8969a6e --- /dev/null +++ b/drivers/video/omap2/dss/hdmi_wp.c @@ -0,0 +1,271 @@ +/* + * HDMI wrapper + * + * Copyright (C) 2013 Texas Instruments Incorporated + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <video/omapdss.h> + +#include "dss.h" +#include "hdmi.h" + +void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) +{ +#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) + + DUMPREG(HDMI_WP_REVISION); + DUMPREG(HDMI_WP_SYSCONFIG); + DUMPREG(HDMI_WP_IRQSTATUS_RAW); + DUMPREG(HDMI_WP_IRQSTATUS); + DUMPREG(HDMI_WP_IRQENABLE_SET); + DUMPREG(HDMI_WP_IRQENABLE_CLR); + DUMPREG(HDMI_WP_IRQWAKEEN); + DUMPREG(HDMI_WP_PWR_CTRL); + DUMPREG(HDMI_WP_DEBOUNCE); + DUMPREG(HDMI_WP_VIDEO_CFG); + DUMPREG(HDMI_WP_VIDEO_SIZE); + DUMPREG(HDMI_WP_VIDEO_TIMING_H); + DUMPREG(HDMI_WP_VIDEO_TIMING_V); + DUMPREG(HDMI_WP_WP_CLK); + DUMPREG(HDMI_WP_AUDIO_CFG); + DUMPREG(HDMI_WP_AUDIO_CFG2); + DUMPREG(HDMI_WP_AUDIO_CTRL); + DUMPREG(HDMI_WP_AUDIO_DATA); +} + +u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) +{ + return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); +} + +void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) +{ + hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); + /* flush posted write */ + hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); +} + +void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) +{ + hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); +} + +void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) +{ + hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_CLR, mask); +} + +/* PHY_PWR_CMD */ +int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val) +{ + /* Return if already the state */ + if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val) + return 0; + + /* Command for power control of HDMI PHY */ + REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6); + + /* Status of the power control of HDMI PHY */ + if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val) + != val) { + pr_err("Failed to set PHY power mode to %d\n", val); + return -ETIMEDOUT; + } + + return 0; +} + +/* PLL_PWR_CMD */ +int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val) +{ + /* Command for power control of HDMI PLL */ + REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2); + + /* wait till PHY_PWR_STATUS is set */ + if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val) + != val) { + pr_err("Failed to set PLL_PWR_STATUS\n"); + return -ETIMEDOUT; + } + + return 0; +} + +int hdmi_wp_video_start(struct hdmi_wp_data *wp) +{ + REG_FLD_MOD(wp->base, HDMI_WP_VIDEO_CFG, true, 31, 31); + + return 0; +} + +void hdmi_wp_video_stop(struct hdmi_wp_data *wp) +{ + REG_FLD_MOD(wp->base, HDMI_WP_VIDEO_CFG, false, 31, 31); +} + +void hdmi_wp_video_config_format(struct hdmi_wp_data *wp, + struct hdmi_video_format *video_fmt) +{ + u32 l = 0; + + REG_FLD_MOD(wp->base, HDMI_WP_VIDEO_CFG, video_fmt->packing_mode, + 10, 8); + + l |= FLD_VAL(video_fmt->y_res, 31, 16); + l |= FLD_VAL(video_fmt->x_res, 15, 0); + hdmi_write_reg(wp->base, HDMI_WP_VIDEO_SIZE, l); +} + +void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp, + struct omap_video_timings *timings) +{ + u32 r; + bool vsync_pol, hsync_pol; + pr_debug("Enter hdmi_wp_video_config_interface\n"); + + vsync_pol = timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; + hsync_pol = timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; + + r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); + r = FLD_MOD(r, vsync_pol, 7, 7); + r = FLD_MOD(r, hsync_pol, 6, 6); + r = FLD_MOD(r, timings->interlace, 3, 3); + r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ + hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r); +} + +void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp, + struct omap_video_timings *timings) +{ + u32 timing_h = 0; + u32 timing_v = 0; + + pr_debug("Enter hdmi_wp_video_config_timing\n"); + + timing_h |= FLD_VAL(timings->hbp, 31, 20); + timing_h |= FLD_VAL(timings->hfp, 19, 8); + timing_h |= FLD_VAL(timings->hsw, 7, 0); + hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h); + + timing_v |= FLD_VAL(timings->vbp, 31, 20); + timing_v |= FLD_VAL(timings->vfp, 19, 8); + timing_v |= FLD_VAL(timings->vsw, 7, 0); + hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_V, timing_v); +} + +void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, + struct omap_video_timings *timings, struct hdmi_config *param) +{ + pr_debug("Enter hdmi_wp_video_init_format\n"); + + video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444; + video_fmt->y_res = param->timings.y_res; + video_fmt->x_res = param->timings.x_res; + + timings->hbp = param->timings.hbp; + timings->hfp = param->timings.hfp; + timings->hsw = param->timings.hsw; + timings->vbp = param->timings.vbp; + timings->vfp = param->timings.vfp; + timings->vsw = param->timings.vsw; + timings->vsync_level = param->timings.vsync_level; + timings->hsync_level = param->timings.hsync_level; + timings->interlace = param->timings.interlace; +} + +#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) +void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp, + struct hdmi_audio_format *aud_fmt) +{ + u32 r; + + DSSDBG("Enter hdmi_wp_audio_config_format\n"); + + r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG); + r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); + r = FLD_MOD(r, aud_fmt->active_chnnls_msk, 23, 16); + r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); + r = FLD_MOD(r, aud_fmt->type, 4, 4); + r = FLD_MOD(r, aud_fmt->justification, 3, 3); + r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); + r = FLD_MOD(r, aud_fmt->samples_per_word, 1, 1); + r = FLD_MOD(r, aud_fmt->sample_size, 0, 0); + hdmi_write_reg(wp->base, HDMI_WP_AUDIO_CFG, r); +} + +void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp, + struct hdmi_audio_dma *aud_dma) +{ + u32 r; + + DSSDBG("Enter hdmi_wp_audio_config_dma\n"); + + r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG2); + r = FLD_MOD(r, aud_dma->transfer_size, 15, 8); + r = FLD_MOD(r, aud_dma->block_size, 7, 0); + hdmi_write_reg(wp->base, HDMI_WP_AUDIO_CFG2, r); + + r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CTRL); + r = FLD_MOD(r, aud_dma->mode, 9, 9); + r = FLD_MOD(r, aud_dma->fifo_threshold, 8, 0); + hdmi_write_reg(wp->base, HDMI_WP_AUDIO_CTRL, r); +} + +int hdmi_wp_audio_enable(struct hdmi_wp_data *wp, bool enable) +{ + REG_FLD_MOD(wp->base, HDMI_WP_AUDIO_CTRL, enable, 31, 31); + + return 0; +} + +int hdmi_wp_audio_core_req_enable(struct hdmi_wp_data *wp, bool enable) +{ + REG_FLD_MOD(wp->base, HDMI_WP_AUDIO_CTRL, enable, 30, 30); + + return 0; +} +#endif + +#define WP_SIZE 0x200 + +int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp) +{ + struct resource *res; + struct resource temp_res; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi_wp"); + if (!res) { + DSSDBG("can't get WP mem resource by name\n"); + /* + * if hwmod/DT doesn't have the memory resource information + * split into HDMI sub blocks by name, we try again by getting + * the platform's first resource. this code will be removed when + * the driver can get the mem resources by name + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + DSSERR("can't get WP mem resource\n"); + return -EINVAL; + } + + temp_res.start = res->start; + temp_res.end = temp_res.start + WP_SIZE - 1; + res = &temp_res; + } + + wp->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!wp->base) { + DSSERR("can't ioremap HDMI WP\n"); + return -ENOMEM; + } + + return 0; +} diff --git a/drivers/video/omap2/dss/ti_hdmi.h b/drivers/video/omap2/dss/ti_hdmi.h deleted file mode 100644 index 45215f44617c..000000000000 --- a/drivers/video/omap2/dss/ti_hdmi.h +++ /dev/null @@ -1,187 +0,0 @@ -/* - * ti_hdmi.h - * - * HDMI driver definition for TI OMAP4, DM81xx, DM38xx Processor. - * - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef _TI_HDMI_H -#define _TI_HDMI_H - -struct hdmi_ip_data; - -enum hdmi_pll_pwr { - HDMI_PLLPWRCMD_ALLOFF = 0, - HDMI_PLLPWRCMD_PLLONLY = 1, - HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2, - HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3 -}; - -enum hdmi_core_hdmi_dvi { - HDMI_DVI = 0, - HDMI_HDMI = 1 -}; - -enum hdmi_clk_refsel { - HDMI_REFSEL_PCLK = 0, - HDMI_REFSEL_REF1 = 1, - HDMI_REFSEL_REF2 = 2, - HDMI_REFSEL_SYSCLK = 3 -}; - -struct hdmi_cm { - int code; - int mode; -}; - -struct hdmi_config { - struct omap_video_timings timings; - struct hdmi_cm cm; -}; - -/* HDMI PLL structure */ -struct hdmi_pll_info { - u16 regn; - u16 regm; - u32 regmf; - u16 regm2; - u16 regsd; - u16 dcofreq; - enum hdmi_clk_refsel refsel; -}; - -struct ti_hdmi_ip_ops { - - void (*video_configure)(struct hdmi_ip_data *ip_data); - - int (*phy_enable)(struct hdmi_ip_data *ip_data); - - void (*phy_disable)(struct hdmi_ip_data *ip_data); - - int (*read_edid)(struct hdmi_ip_data *ip_data, u8 *edid, int len); - - int (*pll_enable)(struct hdmi_ip_data *ip_data); - - void (*pll_disable)(struct hdmi_ip_data *ip_data); - - int (*video_enable)(struct hdmi_ip_data *ip_data); - - void (*video_disable)(struct hdmi_ip_data *ip_data); - - void (*dump_wrapper)(struct hdmi_ip_data *ip_data, struct seq_file *s); - - void (*dump_core)(struct hdmi_ip_data *ip_data, struct seq_file *s); - - void (*dump_pll)(struct hdmi_ip_data *ip_data, struct seq_file *s); - - void (*dump_phy)(struct hdmi_ip_data *ip_data, struct seq_file *s); - -#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) - int (*audio_enable)(struct hdmi_ip_data *ip_data); - - void (*audio_disable)(struct hdmi_ip_data *ip_data); - - int (*audio_start)(struct hdmi_ip_data *ip_data); - - void (*audio_stop)(struct hdmi_ip_data *ip_data); - - int (*audio_config)(struct hdmi_ip_data *ip_data, - struct omap_dss_audio *audio); - - int (*audio_get_dma_port)(u32 *offset, u32 *size); -#endif - -}; - -/* - * Refer to section 8.2 in HDMI 1.3 specification for - * details about infoframe databytes - */ -struct hdmi_core_infoframe_avi { - /* Y0, Y1 rgb,yCbCr */ - u8 db1_format; - /* A0 Active information Present */ - u8 db1_active_info; - /* B0, B1 Bar info data valid */ - u8 db1_bar_info_dv; - /* S0, S1 scan information */ - u8 db1_scan_info; - /* C0, C1 colorimetry */ - u8 db2_colorimetry; - /* M0, M1 Aspect ratio (4:3, 16:9) */ - u8 db2_aspect_ratio; - /* R0...R3 Active format aspect ratio */ - u8 db2_active_fmt_ar; - /* ITC IT content. */ - u8 db3_itc; - /* EC0, EC1, EC2 Extended colorimetry */ - u8 db3_ec; - /* Q1, Q0 Quantization range */ - u8 db3_q_range; - /* SC1, SC0 Non-uniform picture scaling */ - u8 db3_nup_scaling; - /* VIC0..6 Video format identification */ - u8 db4_videocode; - /* PR0..PR3 Pixel repetition factor */ - u8 db5_pixel_repeat; - /* Line number end of top bar */ - u16 db6_7_line_eoftop; - /* Line number start of bottom bar */ - u16 db8_9_line_sofbottom; - /* Pixel number end of left bar */ - u16 db10_11_pixel_eofleft; - /* Pixel number start of right bar */ - u16 db12_13_pixel_sofright; -}; - -struct hdmi_ip_data { - void __iomem *base_wp; /* HDMI wrapper */ - unsigned long core_sys_offset; - unsigned long core_av_offset; - unsigned long pll_offset; - unsigned long phy_offset; - int irq; - const struct ti_hdmi_ip_ops *ops; - struct hdmi_config cfg; - struct hdmi_pll_info pll_data; - struct hdmi_core_infoframe_avi avi_cfg; - - /* ti_hdmi_4xxx_ip private data. These should be in a separate struct */ - struct mutex lock; -}; -int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data); -int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data, u8 *edid, int len); -int ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_wp_video_stop(struct hdmi_ip_data *ip_data); -int ti_hdmi_4xxx_pll_enable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_wp_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -void ti_hdmi_4xxx_pll_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -void ti_hdmi_4xxx_phy_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) -int hdmi_compute_acr(u32 sample_freq, u32 *n, u32 *cts); -int ti_hdmi_4xxx_wp_audio_enable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_wp_audio_disable(struct hdmi_ip_data *ip_data); -int ti_hdmi_4xxx_audio_start(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_audio_stop(struct hdmi_ip_data *ip_data); -int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data, - struct omap_dss_audio *audio); -int ti_hdmi_4xxx_audio_get_dma_port(u32 *offset, u32 *size); -#endif -#endif diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c index 4b23af6e5c28..367cea8f43f3 100644 --- a/drivers/video/p9100.c +++ b/drivers/video/p9100.c @@ -339,8 +339,6 @@ static int p9100_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/platinumfb.c b/drivers/video/platinumfb.c index 3d86bac62d3e..4c9299576827 100644 --- a/drivers/video/platinumfb.c +++ b/drivers/video/platinumfb.c @@ -403,7 +403,7 @@ try_again: if (rc < 0) return rc; - printk(KERN_INFO "fb%d: Apple Platinum frame buffer device\n", info->node); + fb_info(info, "Apple Platinum frame buffer device\n"); return 0; } @@ -639,7 +639,6 @@ static int platinumfb_probe(struct platform_device* odev) iounmap(pinfo->frame_buffer); iounmap(pinfo->platinum_regs); iounmap(pinfo->cmap_regs); - dev_set_drvdata(&odev->dev, NULL); framebuffer_release(info); } diff --git a/drivers/video/pm2fb.c b/drivers/video/pm2fb.c index 81354eeab021..3b85b647bc10 100644 --- a/drivers/video/pm2fb.c +++ b/drivers/video/pm2fb.c @@ -1694,8 +1694,8 @@ static int pm2fb_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (retval < 0) goto err_exit_all; - printk(KERN_INFO "fb%d: %s frame buffer device, memory = %dK.\n", - info->node, info->fix.id, pm2fb_fix.smem_len / 1024); + fb_info(info, "%s frame buffer device, memory = %dK\n", + info->fix.id, pm2fb_fix.smem_len / 1024); /* * Our driver data @@ -1744,7 +1744,6 @@ static void pm2fb_remove(struct pci_dev *pdev) iounmap(par->v_regs); release_mem_region(fix->mmio_start, fix->mmio_len); - pci_set_drvdata(pdev, NULL); fb_dealloc_cmap(&info->cmap); kfree(info->pixmap.addr); framebuffer_release(info); diff --git a/drivers/video/pm3fb.c b/drivers/video/pm3fb.c index 7718faa4a73b..4bf3273d0433 100644 --- a/drivers/video/pm3fb.c +++ b/drivers/video/pm3fb.c @@ -1445,8 +1445,7 @@ static int pm3fb_probe(struct pci_dev *dev, const struct pci_device_id *ent) retval = -EINVAL; goto err_exit_all; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, - info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); pci_set_drvdata(dev, info); return 0; @@ -1489,7 +1488,6 @@ static void pm3fb_remove(struct pci_dev *dev) iounmap(par->v_regs); release_mem_region(fix->mmio_start, fix->mmio_len); - pci_set_drvdata(dev, NULL); kfree(info->pixmap.addr); framebuffer_release(info); } diff --git a/drivers/video/pmag-ba-fb.c b/drivers/video/pmag-ba-fb.c index d1e46cedb1f7..914a52ba8477 100644 --- a/drivers/video/pmag-ba-fb.c +++ b/drivers/video/pmag-ba-fb.c @@ -212,8 +212,8 @@ static int pmagbafb_probe(struct device *dev) get_device(dev); - pr_info("fb%d: %s frame buffer device at %s\n", - info->node, info->fix.id, dev_name(dev)); + fb_info(info, "%s frame buffer device at %s\n", + info->fix.id, dev_name(dev)); return 0; diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/pmagb-b-fb.c index 0e1317400328..0822b6f8dddc 100644 --- a/drivers/video/pmagb-b-fb.c +++ b/drivers/video/pmagb-b-fb.c @@ -328,11 +328,10 @@ static int pmagbbfb_probe(struct device *dev) snprintf(freq1, sizeof(freq1), "%u.%03uMHz", par->osc1 / 1000, par->osc1 % 1000); - pr_info("fb%d: %s frame buffer device at %s\n", - info->node, info->fix.id, dev_name(dev)); - pr_info("fb%d: Osc0: %s, Osc1: %s, Osc%u selected\n", - info->node, freq0, par->osc1 ? freq1 : "disabled", - par->osc1 != 0); + fb_info(info, "%s frame buffer device at %s\n", + info->fix.id, dev_name(dev)); + fb_info(info, "Osc0: %s, Osc1: %s, Osc%u selected\n", + freq0, par->osc1 ? freq1 : "disabled", par->osc1 != 0); return 0; diff --git a/drivers/video/pvr2fb.c b/drivers/video/pvr2fb.c index df07860563e6..167cffff3d4e 100644 --- a/drivers/video/pvr2fb.c +++ b/drivers/video/pvr2fb.c @@ -817,24 +817,25 @@ static int pvr2fb_common_init(void) rev = fb_readl(par->mmio_base + 0x04); - printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n", - fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f, - modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10)); - printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", - fb_info->node, fb_info->var.xres, fb_info->var.yres, - fb_info->var.bits_per_pixel, - get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), - (char *)pvr2_get_param(cables, NULL, cable_type, 3), - (char *)pvr2_get_param(outputs, NULL, video_output, 3)); + fb_info(fb_info, "%s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n", + fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f, + modememused >> 10, + (unsigned long)(fb_info->fix.smem_len >> 10)); + fb_info(fb_info, "Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", + fb_info->var.xres, fb_info->var.yres, + fb_info->var.bits_per_pixel, + get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), + (char *)pvr2_get_param(cables, NULL, cable_type, 3), + (char *)pvr2_get_param(outputs, NULL, video_output, 3)); #ifdef CONFIG_SH_STORE_QUEUES - printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node); + fb_notice(fb_info, "registering with SQ API\n"); pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, fb_info->fix.id, PAGE_SHARED); - printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n", - fb_info->node, pvr2fb_map); + fb_notice(fb_info, "Mapped video memory to SQ addr 0x%lx\n", + pvr2fb_map); #endif return 0; diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c index aa9bd1f76d60..c95b9e46d48f 100644 --- a/drivers/video/pxa168fb.c +++ b/drivers/video/pxa168fb.c @@ -364,7 +364,7 @@ static void set_graphics_start(struct fb_info *info, int xoffset, int yoffset) static void set_dumb_panel_control(struct fb_info *info) { struct pxa168fb_info *fbi = info->par; - struct pxa168fb_mach_info *mi = fbi->dev->platform_data; + struct pxa168fb_mach_info *mi = dev_get_platdata(fbi->dev); u32 x; /* @@ -407,7 +407,7 @@ static int pxa168fb_set_par(struct fb_info *info) u32 x; struct pxa168fb_mach_info *mi; - mi = fbi->dev->platform_data; + mi = dev_get_platdata(fbi->dev); /* * Set additional mode info. @@ -609,7 +609,7 @@ static int pxa168fb_probe(struct platform_device *pdev) struct clk *clk; int irq, ret; - mi = pdev->dev.platform_data; + mi = dev_get_platdata(&pdev->dev); if (mi == NULL) { dev_err(&pdev->dev, "no platform data defined\n"); return -EINVAL; diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index eca2de45f7a6..1ecd9cec2921 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -457,7 +457,7 @@ static int pxafb_adjust_timing(struct pxafb_info *fbi, static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct pxafb_info *fbi = (struct pxafb_info *)info; - struct pxafb_mach_info *inf = fbi->dev->platform_data; + struct pxafb_mach_info *inf = dev_get_platdata(fbi->dev); int err; if (inf->fixed_modes) { @@ -1230,7 +1230,7 @@ static unsigned int __smart_timing(unsigned time_ns, unsigned long lcd_clk) static void setup_smart_timing(struct pxafb_info *fbi, struct fb_var_screeninfo *var) { - struct pxafb_mach_info *inf = fbi->dev->platform_data; + struct pxafb_mach_info *inf = dev_get_platdata(fbi->dev); struct pxafb_mode_info *mode = &inf->modes[0]; unsigned long lclk = clk_get_rate(fbi->clk); unsigned t1, t2, t3, t4; @@ -1258,14 +1258,14 @@ static void setup_smart_timing(struct pxafb_info *fbi, static int pxafb_smart_thread(void *arg) { struct pxafb_info *fbi = arg; - struct pxafb_mach_info *inf = fbi->dev->platform_data; + struct pxafb_mach_info *inf = dev_get_platdata(fbi->dev); if (!inf->smart_update) { pr_err("%s: not properly initialized, thread terminated\n", __func__); return -EINVAL; } - inf = fbi->dev->platform_data; + inf = dev_get_platdata(fbi->dev); pr_debug("%s(): task starting\n", __func__); @@ -1793,7 +1793,7 @@ static struct pxafb_info *pxafb_init_fbinfo(struct device *dev) { struct pxafb_info *fbi; void *addr; - struct pxafb_mach_info *inf = dev->platform_data; + struct pxafb_mach_info *inf = dev_get_platdata(dev); /* Alloc the pxafb_info and pseudo_palette in one step */ fbi = kmalloc(sizeof(struct pxafb_info) + sizeof(u32) * 16, GFP_KERNEL); @@ -1855,7 +1855,7 @@ static struct pxafb_info *pxafb_init_fbinfo(struct device *dev) #ifdef CONFIG_FB_PXA_PARAMETERS static int parse_opt_mode(struct device *dev, const char *this_opt) { - struct pxafb_mach_info *inf = dev->platform_data; + struct pxafb_mach_info *inf = dev_get_platdata(dev); const char *name = this_opt+5; unsigned int namelen = strlen(name); @@ -1914,7 +1914,7 @@ done: static int parse_opt(struct device *dev, char *this_opt) { - struct pxafb_mach_info *inf = dev->platform_data; + struct pxafb_mach_info *inf = dev_get_platdata(dev); struct pxafb_mode_info *mode = &inf->modes[0]; char s[64]; @@ -2102,7 +2102,7 @@ static int pxafb_probe(struct platform_device *dev) dev_dbg(&dev->dev, "pxafb_probe\n"); - inf = dev->dev.platform_data; + inf = dev_get_platdata(&dev->dev); ret = -ENOMEM; fbi = NULL; if (!inf) diff --git a/drivers/video/q40fb.c b/drivers/video/q40fb.c index d44c7351de0f..7487f76f6275 100644 --- a/drivers/video/q40fb.c +++ b/drivers/video/q40fb.c @@ -119,8 +119,7 @@ static int q40fb_probe(struct platform_device *dev) return -EINVAL; } - printk(KERN_INFO "fb%d: Q40 frame buffer alive and kicking !\n", - info->node); + fb_info(info, "Q40 frame buffer alive and kicking !\n"); return 0; } diff --git a/drivers/video/riva/fbdev.c b/drivers/video/riva/fbdev.c index 9536715b5a1b..a5514acd2ac6 100644 --- a/drivers/video/riva/fbdev.c +++ b/drivers/video/riva/fbdev.c @@ -1185,11 +1185,6 @@ static int rivafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) if (rivafb_do_maximize(info, var, nom, den) < 0) return -EINVAL; - if (var->xoffset < 0) - var->xoffset = 0; - if (var->yoffset < 0) - var->yoffset = 0; - /* truncate xoffset and yoffset to maximum if too high */ if (var->xoffset > var->xres_virtual - var->xres) var->xoffset = var->xres_virtual - var->xres - 1; diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/s1d13xxxfb.c index 05c2dc3d4bc0..83433cb0dfba 100644 --- a/drivers/video/s1d13xxxfb.c +++ b/drivers/video/s1d13xxxfb.c @@ -777,8 +777,8 @@ static int s1d13xxxfb_probe(struct platform_device *pdev) printk(KERN_INFO "Epson S1D13XXX FB Driver\n"); /* enable platform-dependent hardware glue, if any */ - if (pdev->dev.platform_data) - pdata = pdev->dev.platform_data; + if (dev_get_platdata(&pdev->dev)) + pdata = dev_get_platdata(&pdev->dev); if (pdata && pdata->platform_init_video) pdata->platform_init_video(); @@ -901,8 +901,7 @@ static int s1d13xxxfb_probe(struct platform_device *pdev) goto bail; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; @@ -923,8 +922,8 @@ static int s1d13xxxfb_suspend(struct platform_device *dev, pm_message_t state) lcd_enable(s1dfb, 0); crt_enable(s1dfb, 0); - if (dev->dev.platform_data) - pdata = dev->dev.platform_data; + if (dev_get_platdata(&dev->dev)) + pdata = dev_get_platdata(&dev->dev); #if 0 if (!s1dfb->disp_save) @@ -973,8 +972,8 @@ static int s1d13xxxfb_resume(struct platform_device *dev) while ((s1d13xxxfb_readreg(s1dfb, S1DREG_PS_STATUS) & 0x01)) udelay(10); - if (dev->dev.platform_data) - pdata = dev->dev.platform_data; + if (dev_get_platdata(&dev->dev)) + pdata = dev_get_platdata(&dev->dev); if (s1dfb->regs_save) { /* will write RO regs, *should* get away with it :) */ diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c index 2e7991c7ca08..62acae2694a9 100644 --- a/drivers/video/s3c-fb.c +++ b/drivers/video/s3c-fb.c @@ -1378,7 +1378,7 @@ static int s3c_fb_probe(struct platform_device *pdev) return -EINVAL; } - pd = pdev->dev.platform_data; + pd = dev_get_platdata(&pdev->dev); if (!pd) { dev_err(dev, "no platform data specified\n"); return -EINVAL; diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c index 21a32adbb8ea..81af5a63e9e1 100644 --- a/drivers/video/s3c2410fb.c +++ b/drivers/video/s3c2410fb.c @@ -123,7 +123,7 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct s3c2410fb_info *fbi = info->par; - struct s3c2410fb_mach_info *mach_info = fbi->dev->platform_data; + struct s3c2410fb_mach_info *mach_info = dev_get_platdata(fbi->dev); struct s3c2410fb_display *display = NULL; struct s3c2410fb_display *default_display = mach_info->displays + mach_info->default_display; @@ -686,7 +686,7 @@ static inline void modify_gpio(void __iomem *reg, static int s3c2410fb_init_registers(struct fb_info *info) { struct s3c2410fb_info *fbi = info->par; - struct s3c2410fb_mach_info *mach_info = fbi->dev->platform_data; + struct s3c2410fb_mach_info *mach_info = dev_get_platdata(fbi->dev); unsigned long flags; void __iomem *regs = fbi->io; void __iomem *tpal; @@ -833,7 +833,7 @@ static int s3c24xxfb_probe(struct platform_device *pdev, int size; u32 lcdcon1; - mach_info = pdev->dev.platform_data; + mach_info = dev_get_platdata(&pdev->dev); if (mach_info == NULL) { dev_err(&pdev->dev, "no platform data for lcd, cannot attach\n"); diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index d838ba829459..968b2997175a 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -306,8 +306,8 @@ static void s3fb_settile_fast(struct fb_info *info, struct fb_tilemap *map) if ((map->width != 8) || (map->height != 16) || (map->depth != 1) || (map->length != 256)) { - printk(KERN_ERR "fb%d: unsupported font parameters: width %d, height %d, depth %d, length %d\n", - info->node, map->width, map->height, map->depth, map->length); + fb_err(info, "unsupported font parameters: width %d, height %d, depth %d, length %d\n", + map->width, map->height, map->depth, map->length); return; } @@ -476,7 +476,7 @@ static void s3_set_pixclock(struct fb_info *info, u32 pixclock) rv = svga_compute_pll((par->chip == CHIP_365_TRIO3D) ? &s3_trio3d_pll : &s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node); if (rv < 0) { - printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); + fb_err(info, "cannot set requested pixclock, keeping old value\n"); return; } @@ -569,7 +569,7 @@ static int s3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) rv = -EINVAL; if (rv < 0) { - printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); + fb_err(info, "unsupported mode requested\n"); return rv; } @@ -587,22 +587,21 @@ static int s3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) /* Check whether have enough memory */ mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; if (mem > info->screen_size) { - printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", - info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); + fb_err(info, "not enough framebuffer memory (%d kB requested , %u kB available)\n", + mem >> 10, (unsigned int) (info->screen_size >> 10)); return -EINVAL; } rv = svga_check_timings (&s3_timing_regs, var, info->node); if (rv < 0) { - printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); + fb_err(info, "invalid timings requested\n"); return rv; } rv = svga_compute_pll(&s3_pll, PICOS2KHZ(var->pixclock), &m, &n, &r, info->node); if (rv < 0) { - printk(KERN_ERR "fb%d: invalid pixclock value requested\n", - info->node); + fb_err(info, "invalid pixclock value requested\n"); return rv; } @@ -686,7 +685,7 @@ static int s3fb_set_par(struct fb_info *info) /* Set the offset register */ - pr_debug("fb%d: offset register : %d\n", info->node, offset_value); + fb_dbg(info, "offset register : %d\n", offset_value); svga_wcrt_multi(par->state.vgabase, s3_offset_regs, offset_value); if (par->chip != CHIP_357_VIRGE_GX2 && @@ -769,7 +768,7 @@ static int s3fb_set_par(struct fb_info *info) /* Set mode-specific register values */ switch (mode) { case 0: - pr_debug("fb%d: text mode\n", info->node); + fb_dbg(info, "text mode\n"); svga_set_textmode_vga_regs(par->state.vgabase); /* Set additional registers like in 8-bit mode */ @@ -780,12 +779,12 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); if (fasttext) { - pr_debug("fb%d: high speed text mode set\n", info->node); + fb_dbg(info, "high speed text mode set\n"); svga_wcrt_mask(par->state.vgabase, 0x31, 0x40, 0x40); } break; case 1: - pr_debug("fb%d: 4 bit pseudocolor\n", info->node); + fb_dbg(info, "4 bit pseudocolor\n"); vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); /* Set additional registers like in 8-bit mode */ @@ -796,7 +795,7 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); break; case 2: - pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); + fb_dbg(info, "4 bit pseudocolor, planar\n"); /* Set additional registers like in 8-bit mode */ svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); @@ -806,7 +805,7 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); break; case 3: - pr_debug("fb%d: 8 bit pseudocolor\n", info->node); + fb_dbg(info, "8 bit pseudocolor\n"); svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); if (info->var.pixclock > 20000 || par->chip == CHIP_357_VIRGE_GX2 || @@ -822,7 +821,7 @@ static int s3fb_set_par(struct fb_info *info) } break; case 4: - pr_debug("fb%d: 5/5/5 truecolor\n", info->node); + fb_dbg(info, "5/5/5 truecolor\n"); if (par->chip == CHIP_988_VIRGE_VX) { if (info->var.pixclock > 20000) svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0); @@ -850,7 +849,7 @@ static int s3fb_set_par(struct fb_info *info) } break; case 5: - pr_debug("fb%d: 5/6/5 truecolor\n", info->node); + fb_dbg(info, "5/6/5 truecolor\n"); if (par->chip == CHIP_988_VIRGE_VX) { if (info->var.pixclock > 20000) svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0); @@ -879,16 +878,16 @@ static int s3fb_set_par(struct fb_info *info) break; case 6: /* VIRGE VX case */ - pr_debug("fb%d: 8/8/8 truecolor\n", info->node); + fb_dbg(info, "8/8/8 truecolor\n"); svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0); break; case 7: - pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); + fb_dbg(info, "8/8/8/8 truecolor\n"); svga_wcrt_mask(par->state.vgabase, 0x50, 0x30, 0x30); svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0); break; default: - printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node); + fb_err(info, "unsupported mode - bug\n"); return -EINVAL; } @@ -991,27 +990,27 @@ static int s3fb_blank(int blank_mode, struct fb_info *info) switch (blank_mode) { case FB_BLANK_UNBLANK: - pr_debug("fb%d: unblank\n", info->node); + fb_dbg(info, "unblank\n"); svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); break; case FB_BLANK_NORMAL: - pr_debug("fb%d: blank\n", info->node); + fb_dbg(info, "blank\n"); svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_HSYNC_SUSPEND: - pr_debug("fb%d: hsync\n", info->node); + fb_dbg(info, "hsync\n"); svga_wcrt_mask(par->state.vgabase, 0x56, 0x02, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_VSYNC_SUSPEND: - pr_debug("fb%d: vsync\n", info->node); + fb_dbg(info, "vsync\n"); svga_wcrt_mask(par->state.vgabase, 0x56, 0x04, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_POWERDOWN: - pr_debug("fb%d: sync down\n", info->node); + fb_dbg(info, "sync down\n"); svga_wcrt_mask(par->state.vgabase, 0x56, 0x06, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; @@ -1352,13 +1351,16 @@ static int s3_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) goto err_reg_fb; } - printk(KERN_INFO "fb%d: %s on %s, %d MB RAM, %d MHz MCLK\n", info->node, info->fix.id, - pci_name(dev), info->fix.smem_len >> 20, (par->mclk_freq + 500) / 1000); + fb_info(info, "%s on %s, %d MB RAM, %d MHz MCLK\n", + info->fix.id, pci_name(dev), + info->fix.smem_len >> 20, (par->mclk_freq + 500) / 1000); if (par->chip == CHIP_UNKNOWN) - printk(KERN_INFO "fb%d: unknown chip, CR2D=%x, CR2E=%x, CRT2F=%x, CRT30=%x\n", - info->node, vga_rcrt(par->state.vgabase, 0x2d), vga_rcrt(par->state.vgabase, 0x2e), - vga_rcrt(par->state.vgabase, 0x2f), vga_rcrt(par->state.vgabase, 0x30)); + fb_info(info, "unknown chip, CR2D=%x, CR2E=%x, CRT2F=%x, CRT30=%x\n", + vga_rcrt(par->state.vgabase, 0x2d), + vga_rcrt(par->state.vgabase, 0x2e), + vga_rcrt(par->state.vgabase, 0x2f), + vga_rcrt(par->state.vgabase, 0x30)); /* Record a reference to the driver data */ pci_set_drvdata(dev, info); @@ -1424,7 +1426,6 @@ static void s3_pci_remove(struct pci_dev *dev) pci_release_regions(dev); /* pci_disable_device(dev); */ - pci_set_drvdata(dev, NULL); framebuffer_release(info); } } diff --git a/drivers/video/sa1100fb.c b/drivers/video/sa1100fb.c index de76da0c6429..580c444ec301 100644 --- a/drivers/video/sa1100fb.c +++ b/drivers/video/sa1100fb.c @@ -1116,7 +1116,7 @@ static struct fb_monspecs monspecs = { static struct sa1100fb_info *sa1100fb_init_fbinfo(struct device *dev) { - struct sa1100fb_mach_info *inf = dev->platform_data; + struct sa1100fb_mach_info *inf = dev_get_platdata(dev); struct sa1100fb_info *fbi; unsigned i; @@ -1201,7 +1201,7 @@ static int sa1100fb_probe(struct platform_device *pdev) struct resource *res; int ret, irq; - if (!pdev->dev.platform_data) { + if (!dev_get_platdata(&pdev->dev)) { dev_err(&pdev->dev, "no platform LCD data\n"); return -EINVAL; } diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 741b2395d01e..4dbf45f3b21a 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c @@ -2362,12 +2362,6 @@ static void savagefb_remove(struct pci_dev *dev) kfree(info->pixmap.addr); pci_release_regions(dev); framebuffer_release(info); - - /* - * Ensure that the driver data is no longer - * valid. - */ - pci_set_drvdata(dev, NULL); } } diff --git a/drivers/video/sbuslib.c b/drivers/video/sbuslib.c index 296afae442f4..a350209ffbd3 100644 --- a/drivers/video/sbuslib.c +++ b/drivers/video/sbuslib.c @@ -186,7 +186,7 @@ int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg, } default: return -EINVAL; - }; + } } EXPORT_SYMBOL(sbusfb_ioctl_helper); diff --git a/drivers/video/sgivwfb.c b/drivers/video/sgivwfb.c index a9ac3ce2d0e9..bc74d0408998 100644 --- a/drivers/video/sgivwfb.c +++ b/drivers/video/sgivwfb.c @@ -803,8 +803,8 @@ static int sgivwfb_probe(struct platform_device *dev) platform_set_drvdata(dev, info); - printk(KERN_INFO "fb%d: SGI DBE frame buffer device, using %ldK of video memory at %#lx\n", - info->node, sgivwfb_mem_size >> 10, sgivwfb_mem_phys); + fb_info(info, "SGI DBE frame buffer device, using %ldK of video memory at %#lx\n", + sgivwfb_mem_size >> 10, sgivwfb_mem_phys); return 0; fail_register_framebuffer: diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/sh_mobile_hdmi.c index bfe4728480fd..9a33ee0413fb 100644 --- a/drivers/video/sh_mobile_hdmi.c +++ b/drivers/video/sh_mobile_hdmi.c @@ -498,7 +498,7 @@ static void sh_hdmi_video_config(struct sh_hdmi *hdmi) static void sh_hdmi_audio_config(struct sh_hdmi *hdmi) { u8 data; - struct sh_mobile_hdmi_info *pdata = hdmi->dev->platform_data; + struct sh_mobile_hdmi_info *pdata = dev_get_platdata(hdmi->dev); /* * [7:4] L/R data swap control @@ -815,7 +815,7 @@ static unsigned long sh_hdmi_rate_error(struct sh_hdmi *hdmi, unsigned long *hdmi_rate, unsigned long *parent_rate) { unsigned long target = PICOS2KHZ(mode->pixclock) * 1000, rate_error; - struct sh_mobile_hdmi_info *pdata = hdmi->dev->platform_data; + struct sh_mobile_hdmi_info *pdata = dev_get_platdata(hdmi->dev); *hdmi_rate = clk_round_rate(hdmi->hdmi_clk, target); if ((long)*hdmi_rate < 0) @@ -1271,7 +1271,7 @@ static void sh_hdmi_htop1_init(struct sh_hdmi *hdmi) static int __init sh_hdmi_probe(struct platform_device *pdev) { - struct sh_mobile_hdmi_info *pdata = pdev->dev.platform_data; + struct sh_mobile_hdmi_info *pdata = dev_get_platdata(&pdev->dev); struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct resource *htop1_res; int irq = platform_get_irq(pdev, 0), ret; @@ -1290,7 +1290,7 @@ static int __init sh_hdmi_probe(struct platform_device *pdev) } } - hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL); + hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); if (!hdmi) { dev_err(&pdev->dev, "Cannot allocate device data\n"); return -ENOMEM; @@ -1304,7 +1304,7 @@ static int __init sh_hdmi_probe(struct platform_device *pdev) if (IS_ERR(hdmi->hdmi_clk)) { ret = PTR_ERR(hdmi->hdmi_clk); dev_err(&pdev->dev, "Unable to get clock: %d\n", ret); - goto egetclk; + return ret; } /* select register access functions */ @@ -1326,7 +1326,7 @@ static int __init sh_hdmi_probe(struct platform_device *pdev) goto erate; } - ret = clk_enable(hdmi->hdmi_clk); + ret = clk_prepare_enable(hdmi->hdmi_clk); if (ret < 0) { dev_err(hdmi->dev, "Cannot enable clock: %d\n", ret); goto erate; @@ -1404,11 +1404,9 @@ emap_htop1: emap: release_mem_region(res->start, resource_size(res)); ereqreg: - clk_disable(hdmi->hdmi_clk); + clk_disable_unprepare(hdmi->hdmi_clk); erate: clk_put(hdmi->hdmi_clk); -egetclk: - kfree(hdmi); return ret; } @@ -1427,13 +1425,12 @@ static int __exit sh_hdmi_remove(struct platform_device *pdev) cancel_delayed_work_sync(&hdmi->edid_work); pm_runtime_put(&pdev->dev); pm_runtime_disable(&pdev->dev); - clk_disable(hdmi->hdmi_clk); + clk_disable_unprepare(hdmi->hdmi_clk); clk_put(hdmi->hdmi_clk); if (hdmi->htop1) iounmap(hdmi->htop1); iounmap(hdmi->base); release_mem_region(res->start, resource_size(res)); - kfree(hdmi); return 0; } diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c index 0264704a52be..ab85ad6c25ec 100644 --- a/drivers/video/sh_mobile_lcdcfb.c +++ b/drivers/video/sh_mobile_lcdcfb.c @@ -344,7 +344,7 @@ static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) { if (atomic_inc_and_test(&priv->hw_usecnt)) { if (priv->dot_clk) - clk_enable(priv->dot_clk); + clk_prepare_enable(priv->dot_clk); pm_runtime_get_sync(priv->dev); if (priv->meram_dev && priv->meram_dev->pdev) pm_runtime_get_sync(&priv->meram_dev->pdev->dev); @@ -358,7 +358,7 @@ static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) pm_runtime_put_sync(&priv->meram_dev->pdev->dev); pm_runtime_put(priv->dev); if (priv->dot_clk) - clk_disable(priv->dot_clk); + clk_disable_unprepare(priv->dot_clk); } } @@ -574,8 +574,9 @@ static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch, switch (event) { case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT: /* HDMI plug in */ + console_lock(); if (lock_fb_info(info)) { - console_lock(); + ch->display.width = monspec->max_x * 10; ch->display.height = monspec->max_y * 10; @@ -594,19 +595,20 @@ static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch, fb_set_suspend(info, 0); } - console_unlock(); + unlock_fb_info(info); } + console_unlock(); break; case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT: /* HDMI disconnect */ + console_lock(); if (lock_fb_info(info)) { - console_lock(); fb_set_suspend(info, 1); - console_unlock(); unlock_fb_info(info); } + console_unlock(); break; case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE: diff --git a/drivers/video/simplefb.c b/drivers/video/simplefb.c index 8d7810613058..210f3a02121a 100644 --- a/drivers/video/simplefb.c +++ b/drivers/video/simplefb.c @@ -66,8 +66,15 @@ static int simplefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, return 0; } +static void simplefb_destroy(struct fb_info *info) +{ + if (info->screen_base) + iounmap(info->screen_base); +} + static struct fb_ops simplefb_ops = { .owner = THIS_MODULE, + .fb_destroy = simplefb_destroy, .fb_setcolreg = simplefb_setcolreg, .fb_fillrect = cfb_fillrect, .fb_copyarea = cfb_copyarea, @@ -132,7 +139,7 @@ static int simplefb_parse_dt(struct platform_device *pdev, static int simplefb_parse_pd(struct platform_device *pdev, struct simplefb_params *params) { - struct simplefb_platform_data *pd = pdev->dev.platform_data; + struct simplefb_platform_data *pd = dev_get_platdata(&pdev->dev); int i; params->width = pd->width; @@ -167,7 +174,7 @@ static int simplefb_probe(struct platform_device *pdev) return -ENODEV; ret = -ENODEV; - if (pdev->dev.platform_data) + if (dev_get_platdata(&pdev->dev)) ret = simplefb_parse_pd(pdev, ¶ms); else if (pdev->dev.of_node) ret = simplefb_parse_dt(pdev, ¶ms); @@ -212,17 +219,26 @@ static int simplefb_probe(struct platform_device *pdev) info->fbops = &simplefb_ops; info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE; - info->screen_base = devm_ioremap(&pdev->dev, info->fix.smem_start, - info->fix.smem_len); + info->screen_base = ioremap_wc(info->fix.smem_start, + info->fix.smem_len); if (!info->screen_base) { framebuffer_release(info); return -ENODEV; } info->pseudo_palette = (void *)(info + 1); + dev_info(&pdev->dev, "framebuffer at 0x%lx, 0x%x bytes, mapped to 0x%p\n", + info->fix.smem_start, info->fix.smem_len, + info->screen_base); + dev_info(&pdev->dev, "format=%s, mode=%dx%dx%d, linelength=%d\n", + params.format->name, + info->var.xres, info->var.yres, + info->var.bits_per_pixel, info->fix.line_length); + ret = register_framebuffer(info); if (ret < 0) { dev_err(&pdev->dev, "Unable to register simplefb: %d\n", ret); + iounmap(info->screen_base); framebuffer_release(info); return ret; } diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c index 977e27927a21..22ad028bf123 100644 --- a/drivers/video/sis/sis_main.c +++ b/drivers/video/sis/sis_main.c @@ -5994,7 +5994,6 @@ static int sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if(!ivideo->sisvga_enabled) { if(pci_enable_device(pdev)) { if(ivideo->nbridge) pci_dev_put(ivideo->nbridge); - pci_set_drvdata(pdev, NULL); framebuffer_release(sis_fb_info); return -EIO; } @@ -6211,7 +6210,6 @@ error_3: vfree(ivideo->bios_abase); pci_dev_put(ivideo->lpcdev); if(ivideo->nbridge) pci_dev_put(ivideo->nbridge); - pci_set_drvdata(pdev, NULL); if(!ivideo->sisvga_enabled) pci_disable_device(pdev); framebuffer_release(sis_fb_info); @@ -6480,8 +6478,8 @@ error_3: vfree(ivideo->bios_abase); "disabled"); - printk(KERN_INFO "fb%d: %s frame buffer device version %d.%d.%d\n", - sis_fb_info->node, ivideo->myid, VER_MAJOR, VER_MINOR, VER_LEVEL); + fb_info(sis_fb_info, "%s frame buffer device version %d.%d.%d\n", + ivideo->myid, VER_MAJOR, VER_MINOR, VER_LEVEL); printk(KERN_INFO "sisfb: Copyright (C) 2001-2005 Thomas Winischhofer\n"); @@ -6523,8 +6521,6 @@ static void sisfb_remove(struct pci_dev *pdev) mtrr_del(ivideo->mtrr, ivideo->video_base, ivideo->video_size); #endif - pci_set_drvdata(pdev, NULL); - /* If device was disabled when starting, disable * it when quitting. */ diff --git a/drivers/video/skeletonfb.c b/drivers/video/skeletonfb.c index 2d4694c6b9e0..fefde7c6add7 100644 --- a/drivers/video/skeletonfb.c +++ b/drivers/video/skeletonfb.c @@ -824,8 +824,7 @@ static int xxxfb_probe(struct pci_dev *dev, const struct pci_device_id *ent) fb_dealloc_cmap(&info->cmap); return -EINVAL; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, - info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); pci_set_drvdata(dev, info); /* or platform_set_drvdata(pdev, info) */ return 0; } diff --git a/drivers/video/smscufx.c b/drivers/video/smscufx.c index e188ada2ffd1..d513ed6a49f2 100644 --- a/drivers/video/smscufx.c +++ b/drivers/video/smscufx.c @@ -1147,7 +1147,7 @@ static void ufx_free_framebuffer_work(struct work_struct *work) fb_destroy_modelist(&info->modelist); - dev->info = 0; + dev->info = NULL; /* Assume info structure is freed after this point */ framebuffer_release(info); diff --git a/drivers/video/ssd1307fb.c b/drivers/video/ssd1307fb.c index 44967c8fef2b..f4daa59f0a80 100644 --- a/drivers/video/ssd1307fb.c +++ b/drivers/video/ssd1307fb.c @@ -569,7 +569,7 @@ static struct i2c_driver ssd1307fb_driver = { .id_table = ssd1307fb_i2c_id, .driver = { .name = "ssd1307fb", - .of_match_table = of_match_ptr(ssd1307fb_of_match), + .of_match_table = ssd1307fb_of_match, .owner = THIS_MODULE, }, }; diff --git a/drivers/video/sstfb.c b/drivers/video/sstfb.c index 9c00026e3ae2..f0cb279ef333 100644 --- a/drivers/video/sstfb.c +++ b/drivers/video/sstfb.c @@ -706,10 +706,10 @@ static void sstfb_setvgapass( struct fb_info *info, int enable ) fbiinit0 = sst_read (FBIINIT0); if (par->vgapass) { sst_write(FBIINIT0, fbiinit0 & ~DIS_VGA_PASSTHROUGH); - printk(KERN_INFO "fb%d: Enabling VGA pass-through\n", info->node ); + fb_info(info, "Enabling VGA pass-through\n"); } else { sst_write(FBIINIT0, fbiinit0 | DIS_VGA_PASSTHROUGH); - printk(KERN_INFO "fb%d: Disabling VGA pass-through\n", info->node ); + fb_info(info, "Disabling VGA pass-through\n"); } pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, tmp); } @@ -1437,8 +1437,8 @@ static int sstfb_probe(struct pci_dev *pdev, const struct pci_device_id *id) printk(KERN_WARNING "sstfb: can't create sysfs entry.\n"); - printk(KERN_INFO "fb%d: %s frame buffer device at 0x%p\n", - info->node, fix->id, info->screen_base); + fb_info(info, "%s frame buffer device at 0x%p\n", + fix->id, info->screen_base); return 0; diff --git a/drivers/video/stifb.c b/drivers/video/stifb.c index 019a1feef995..cfe8a2f905c5 100644 --- a/drivers/video/stifb.c +++ b/drivers/video/stifb.c @@ -1283,9 +1283,7 @@ static int __init stifb_init_fb(struct sti_struct *sti, int bpp_pref) sti->info = info; /* save for unregister_framebuffer() */ - printk(KERN_INFO - "fb%d: %s %dx%d-%d frame buffer device, %s, id: %04x, mmio: 0x%04lx\n", - fb->info.node, + fb_info(&fb->info, "%s %dx%d-%d frame buffer device, %s, id: %04x, mmio: 0x%04lx\n", fix->id, var->xres, var->yres, diff --git a/drivers/video/sunxvr1000.c b/drivers/video/sunxvr1000.c index cc6f48bba36b..58241b47a96d 100644 --- a/drivers/video/sunxvr1000.c +++ b/drivers/video/sunxvr1000.c @@ -186,8 +186,6 @@ static int gfb_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 33df9ec91795..9e01322fabe3 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -198,8 +198,8 @@ void svga_settile(struct fb_info *info, struct fb_tilemap *map) if ((map->width != 8) || (map->height != 16) || (map->depth != 1) || (map->length != 256)) { - printk(KERN_ERR "fb%d: unsupported font parameters: width %d, height %d, depth %d, length %d\n", - info->node, map->width, map->height, map->depth, map->length); + fb_err(info, "unsupported font parameters: width %d, height %d, depth %d, length %d\n", + map->width, map->height, map->depth, map->length); return; } diff --git a/drivers/video/sysimgblt.c b/drivers/video/sysimgblt.c index 186c6f607be2..a4d05b1b17d7 100644 --- a/drivers/video/sysimgblt.c +++ b/drivers/video/sysimgblt.c @@ -152,7 +152,7 @@ static void slow_imageblit(const struct fb_image *image, struct fb_info *p, } shift += bpp; shift &= (32 - 1); - if (!l) { l = 8; s++; }; + if (!l) { l = 8; s++; } } /* write trailing bits */ diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c index c000852500aa..7fb2d696fac7 100644 --- a/drivers/video/tcx.c +++ b/drivers/video/tcx.c @@ -232,7 +232,7 @@ tcx_blank(int blank, struct fb_info *info) case FB_BLANK_POWERDOWN: /* Poweroff */ break; - }; + } sbus_writel(val, &thc->thc_misc); @@ -434,7 +434,7 @@ static int tcx_probe(struct platform_device *op) default: j = i; break; - }; + } par->mmap_map[i].poff = op->resource[j].start; } @@ -498,8 +498,6 @@ static int tcx_remove(struct platform_device *op) framebuffer_release(info); - dev_set_drvdata(&op->dev, NULL); - return 0; } diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c index 64bc28ba4037..f761fe375f5b 100644 --- a/drivers/video/tdfxfb.c +++ b/drivers/video/tdfxfb.c @@ -1646,7 +1646,6 @@ static void tdfxfb_remove(struct pci_dev *pdev) pci_resource_len(pdev, 1)); release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); - pci_set_drvdata(pdev, NULL); fb_dealloc_cmap(&info->cmap); framebuffer_release(info); } diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c index c9c8e5a1fdee..f28674fea909 100644 --- a/drivers/video/tgafb.c +++ b/drivers/video/tgafb.c @@ -1671,8 +1671,8 @@ static int tgafb_register(struct device *dev) if (tga_bus_tc) pr_info("tgafb: SFB+ detected, rev=0x%02x\n", par->tga_chip_rev); - pr_info("fb%d: %s frame buffer device at 0x%lx\n", - info->node, info->fix.id, (long)bar0_start); + fb_info(info, "%s frame buffer device at 0x%lx\n", + info->fix.id, (long)bar0_start); return 0; diff --git a/drivers/video/tmiofb.c b/drivers/video/tmiofb.c index deb8733f3c70..7fb4e321a431 100644 --- a/drivers/video/tmiofb.c +++ b/drivers/video/tmiofb.c @@ -250,7 +250,7 @@ static irqreturn_t tmiofb_irq(int irq, void *__info) */ static int tmiofb_hw_stop(struct platform_device *dev) { - struct tmio_fb_data *data = dev->dev.platform_data; + struct tmio_fb_data *data = dev_get_platdata(&dev->dev); struct fb_info *info = platform_get_drvdata(dev); struct tmiofb_par *par = info->par; @@ -311,7 +311,7 @@ static int tmiofb_hw_init(struct platform_device *dev) */ static void tmiofb_hw_mode(struct platform_device *dev) { - struct tmio_fb_data *data = dev->dev.platform_data; + struct tmio_fb_data *data = dev_get_platdata(&dev->dev); struct fb_info *info = platform_get_drvdata(dev); struct fb_videomode *mode = info->mode; struct tmiofb_par *par = info->par; @@ -557,7 +557,7 @@ static int tmiofb_ioctl(struct fb_info *fbi, static struct fb_videomode * tmiofb_find_mode(struct fb_info *info, struct fb_var_screeninfo *var) { - struct tmio_fb_data *data = info->device->platform_data; + struct tmio_fb_data *data = dev_get_platdata(info->device); struct fb_videomode *best = NULL; int i; @@ -577,7 +577,7 @@ static int tmiofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct fb_videomode *mode; - struct tmio_fb_data *data = info->device->platform_data; + struct tmio_fb_data *data = dev_get_platdata(info->device); mode = tmiofb_find_mode(info, var); if (!mode || var->bits_per_pixel > 16) @@ -678,7 +678,7 @@ static struct fb_ops tmiofb_ops = { static int tmiofb_probe(struct platform_device *dev) { const struct mfd_cell *cell = mfd_get_cell(dev); - struct tmio_fb_data *data = dev->dev.platform_data; + struct tmio_fb_data *data = dev_get_platdata(&dev->dev); struct resource *ccr = platform_get_resource(dev, IORESOURCE_MEM, 1); struct resource *lcr = platform_get_resource(dev, IORESOURCE_MEM, 0); struct resource *vram = platform_get_resource(dev, IORESOURCE_MEM, 2); @@ -781,8 +781,7 @@ static int tmiofb_probe(struct platform_device *dev) if (retval < 0) goto err_register_framebuffer; - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index ab57d387d6b5..7ed9a227f5ea 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c @@ -1553,7 +1553,6 @@ static void trident_pci_remove(struct pci_dev *dev) iounmap(info->screen_base); release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); - pci_set_drvdata(dev, NULL); kfree(info->pixmap.addr); fb_dealloc_cmap(&info->cmap); framebuffer_release(info); diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c index d2e5bc3cf969..025f14e30eed 100644 --- a/drivers/video/udlfb.c +++ b/drivers/video/udlfb.c @@ -1166,7 +1166,7 @@ static int dlfb_realloc_framebuffer(struct dlfb_data *dev, struct fb_info *info) int new_len; unsigned char *old_fb = info->screen_base; unsigned char *new_fb; - unsigned char *new_back = 0; + unsigned char *new_back = NULL; pr_warn("Reallocating framebuffer. Addresses will change!\n"); diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c index 7aec6f39fdd5..256fba7f4641 100644 --- a/drivers/video/uvesafb.c +++ b/drivers/video/uvesafb.c @@ -233,8 +233,7 @@ out: static void uvesafb_free(struct uvesafb_ktask *task) { if (task) { - if (task->done) - kfree(task->done); + kfree(task->done); kfree(task); } } @@ -1332,8 +1331,8 @@ setmode: FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; info->fix.line_length = mode->bytes_per_scan_line; -out: if (crtc != NULL) - kfree(crtc); +out: + kfree(crtc); uvesafb_free(task); return err; @@ -1771,13 +1770,11 @@ static int uvesafb_probe(struct platform_device *dev) "using %dk, total %dk\n", info->fix.smem_start, info->screen_base, info->fix.smem_len/1024, par->vbe_ib.total_memory * 64); - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, - info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); err = sysfs_create_group(&dev->dev.kobj, &uvesafb_dev_attgrp); if (err != 0) - printk(KERN_WARNING "fb%d: failed to register attributes\n", - info->node); + fb_warn(info, "failed to register attributes\n"); return 0; @@ -1793,8 +1790,7 @@ out_mode: fb_destroy_modedb(info->monspecs.modedb); fb_dealloc_cmap(&info->cmap); out: - if (par->vbe_modes) - kfree(par->vbe_modes); + kfree(par->vbe_modes); framebuffer_release(info); return err; @@ -1817,12 +1813,9 @@ static int uvesafb_remove(struct platform_device *dev) fb_dealloc_cmap(&info->cmap); if (par) { - if (par->vbe_modes) - kfree(par->vbe_modes); - if (par->vbe_state_orig) - kfree(par->vbe_state_orig); - if (par->vbe_state_saved) - kfree(par->vbe_state_saved); + kfree(par->vbe_modes); + kfree(par->vbe_state_orig); + kfree(par->vbe_state_saved); } framebuffer_release(info); diff --git a/drivers/video/valkyriefb.c b/drivers/video/valkyriefb.c index 3f5a041601da..e287ebc47817 100644 --- a/drivers/video/valkyriefb.c +++ b/drivers/video/valkyriefb.c @@ -392,7 +392,7 @@ int __init valkyriefb_init(void) if ((err = register_framebuffer(&p->info)) != 0) goto out_cmap_free; - printk(KERN_INFO "fb%d: valkyrie frame buffer device\n", p->info.node); + fb_info(&p->info, "valkyrie frame buffer device\n"); return 0; out_cmap_free: diff --git a/drivers/video/vesafb.c b/drivers/video/vesafb.c index bd83233ec227..1c7da3b098d6 100644 --- a/drivers/video/vesafb.c +++ b/drivers/video/vesafb.c @@ -489,8 +489,7 @@ static int vesafb_probe(struct platform_device *dev) fb_dealloc_cmap(&info->cmap); goto err; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; err: if (info->screen_base) diff --git a/drivers/video/vfb.c b/drivers/video/vfb.c index ee5985efa15c..70a897b1e458 100644 --- a/drivers/video/vfb.c +++ b/drivers/video/vfb.c @@ -390,9 +390,8 @@ static int vfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { if (var->vmode & FB_VMODE_YWRAP) { - if (var->yoffset < 0 - || var->yoffset >= info->var.yres_virtual - || var->xoffset) + if (var->yoffset >= info->var.yres_virtual || + var->xoffset) return -EINVAL; } else { if (var->xoffset + info->var.xres > info->var.xres_virtual || @@ -527,9 +526,8 @@ static int vfb_probe(struct platform_device *dev) goto err2; platform_set_drvdata(dev, info); - printk(KERN_INFO - "fb%d: Virtual frame buffer device, using %ldK of video memory\n", - info->node, videomemorysize >> 10); + fb_info(info, "Virtual frame buffer device, using %ldK of video memory\n", + videomemorysize >> 10); return 0; err2: fb_dealloc_cmap(&info->cmap); diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c index 2827333703d9..283d335a759f 100644 --- a/drivers/video/vga16fb.c +++ b/drivers/video/vga16fb.c @@ -1377,8 +1377,7 @@ static int vga16fb_probe(struct platform_device *dev) goto err_check_var; } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); platform_set_drvdata(dev, info); return 0; diff --git a/drivers/video/vt8500lcdfb.c b/drivers/video/vt8500lcdfb.c index 897484903c30..b30e5a439d1f 100644 --- a/drivers/video/vt8500lcdfb.c +++ b/drivers/video/vt8500lcdfb.c @@ -365,7 +365,7 @@ static int vt8500lcd_probe(struct platform_device *pdev) if (!fb_mem_virt) { pr_err("%s: Failed to allocate framebuffer\n", __func__); return -ENOMEM; - }; + } fbi->fb.fix.smem_start = fb_mem_phys; fbi->fb.fix.smem_len = fb_mem_len; diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index e9557fa014ee..8bc6e0958a09 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -266,7 +266,7 @@ static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); if (rv < 0) { - printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); + fb_err(info, "cannot set requested pixclock, keeping old value\n"); return; } @@ -335,7 +335,7 @@ static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf rv = svga_match_format (vt8623fb_formats, var, NULL); if (rv < 0) { - printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); + fb_err(info, "unsupported mode requested\n"); return rv; } @@ -354,21 +354,23 @@ static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; if (mem > info->screen_size) { - printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); + fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n", + mem >> 10, (unsigned int) (info->screen_size >> 10)); return -EINVAL; } /* Text mode is limited to 256 kB of memory */ if ((var->bits_per_pixel == 0) && (mem > (256*1024))) { - printk(KERN_ERR "fb%d: text framebuffer size too large (%d kB requested, 256 kB possible)\n", info->node, mem >> 10); + fb_err(info, "text framebuffer size too large (%d kB requested, 256 kB possible)\n", + mem >> 10); return -EINVAL; } rv = svga_check_timings (&vt8623_timing_regs, var, info->node); if (rv < 0) { - printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); + fb_err(info, "invalid timings requested\n"); return rv; } @@ -474,32 +476,32 @@ static int vt8623fb_set_par(struct fb_info *info) mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); switch (mode) { case 0: - pr_debug("fb%d: text mode\n", info->node); + fb_dbg(info, "text mode\n"); svga_set_textmode_vga_regs(par->state.vgabase); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); break; case 1: - pr_debug("fb%d: 4 bit pseudocolor\n", info->node); + fb_dbg(info, "4 bit pseudocolor\n"); vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); break; case 2: - pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); + fb_dbg(info, "4 bit pseudocolor, planar\n"); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); break; case 3: - pr_debug("fb%d: 8 bit pseudocolor\n", info->node); + fb_dbg(info, "8 bit pseudocolor\n"); svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); break; case 4: - pr_debug("fb%d: 5/6/5 truecolor\n", info->node); + fb_dbg(info, "5/6/5 truecolor\n"); svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); break; case 5: - pr_debug("fb%d: 8/8/8 truecolor\n", info->node); + fb_dbg(info, "8/8/8 truecolor\n"); svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); break; default: @@ -584,27 +586,27 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info) switch (blank_mode) { case FB_BLANK_UNBLANK: - pr_debug("fb%d: unblank\n", info->node); + fb_dbg(info, "unblank\n"); svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); break; case FB_BLANK_NORMAL: - pr_debug("fb%d: blank\n", info->node); + fb_dbg(info, "blank\n"); svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_HSYNC_SUSPEND: - pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); + fb_dbg(info, "DPMS standby (hsync off)\n"); svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_VSYNC_SUSPEND: - pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); + fb_dbg(info, "DPMS suspend (vsync off)\n"); svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_POWERDOWN: - pr_debug("fb%d: DPMS off (no sync)\n", info->node); + fb_dbg(info, "DPMS off (no sync)\n"); svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; @@ -769,12 +771,12 @@ static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) rc = register_framebuffer(info); if (rc < 0) { - dev_err(info->device, "cannot register framebugger\n"); + dev_err(info->device, "cannot register framebuffer\n"); goto err_reg_fb; } - printk(KERN_INFO "fb%d: %s on %s, %d MB RAM\n", info->node, info->fix.id, - pci_name(dev), info->fix.smem_len >> 20); + fb_info(info, "%s on %s, %d MB RAM\n", + info->fix.id, pci_name(dev), info->fix.smem_len >> 20); /* Record a reference to the driver data */ pci_set_drvdata(dev, info); @@ -829,7 +831,6 @@ static void vt8623_pci_remove(struct pci_dev *dev) pci_release_regions(dev); /* pci_disable_device(dev); */ - pci_set_drvdata(dev, NULL); framebuffer_release(info); } } diff --git a/drivers/video/w100fb.c b/drivers/video/w100fb.c index 7a299e951f75..10951c82f6ed 100644 --- a/drivers/video/w100fb.c +++ b/drivers/video/w100fb.c @@ -680,7 +680,7 @@ int w100fb_probe(struct platform_device *pdev) par = info->par; platform_set_drvdata(pdev, info); - inf = pdev->dev.platform_data; + inf = dev_get_platdata(&pdev->dev); par->chip_id = chip_id; par->mach = inf; par->fastpll_mode = 0; @@ -761,10 +761,9 @@ int w100fb_probe(struct platform_device *pdev) err |= device_create_file(&pdev->dev, &dev_attr_flip); if (err != 0) - printk(KERN_WARNING "fb%d: failed to register attributes (%d)\n", - info->node, err); + fb_warn(info, "failed to register attributes (%d)\n", err); - printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id); + fb_info(info, "%s frame buffer device\n", info->fix.id); return 0; out: if (info) { diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c index 3072f30cad19..537d199612af 100644 --- a/drivers/video/wm8505fb.c +++ b/drivers/video/wm8505fb.c @@ -372,14 +372,12 @@ static int wm8505fb_probe(struct platform_device *pdev) } ret = device_create_file(&pdev->dev, &dev_attr_contrast); - if (ret < 0) { - printk(KERN_WARNING "fb%d: failed to register attributes (%d)\n", - fbi->fb.node, ret); - } + if (ret < 0) + fb_warn(&fbi->fb, "failed to register attributes (%d)\n", ret); - printk(KERN_INFO "fb%d: %s frame buffer at 0x%lx-0x%lx\n", - fbi->fb.node, fbi->fb.fix.id, fbi->fb.fix.smem_start, - fbi->fb.fix.smem_start + fbi->fb.fix.smem_len - 1); + fb_info(&fbi->fb, "%s frame buffer at 0x%lx-0x%lx\n", + fbi->fb.fix.id, fbi->fb.fix.smem_start, + fbi->fb.fix.smem_start + fbi->fb.fix.smem_len - 1); return 0; } @@ -411,7 +409,7 @@ static struct platform_driver wm8505fb_driver = { .driver = { .owner = THIS_MODULE, .name = DRIVER_NAME, - .of_match_table = of_match_ptr(wmt_dt_ids), + .of_match_table = wmt_dt_ids, }, }; diff --git a/drivers/video/wmt_ge_rops.c b/drivers/video/wmt_ge_rops.c index 4aaeb18223bc..b0a9f34b2e01 100644 --- a/drivers/video/wmt_ge_rops.c +++ b/drivers/video/wmt_ge_rops.c @@ -169,13 +169,13 @@ static struct platform_driver wmt_ge_rops_driver = { .driver = { .owner = THIS_MODULE, .name = "wmt_ge_rops", - .of_match_table = of_match_ptr(wmt_dt_ids), + .of_match_table = wmt_dt_ids, }, }; module_platform_driver(wmt_ge_rops_driver); -MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com"); +MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>"); MODULE_DESCRIPTION("Accelerators for raster operations using " "WonderMedia Graphics Engine"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 84c664ea8eb9..6ff1a91e9dfd 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c @@ -260,10 +260,9 @@ static int xilinxfb_assign(struct platform_device *pdev, res = platform_get_resource(pdev, IORESOURCE_MEM, 0); drvdata->regs = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(drvdata->regs)) { - rc = PTR_ERR(drvdata->regs); - goto err_region; - } + if (IS_ERR(drvdata->regs)) + return PTR_ERR(drvdata->regs); + drvdata->regs_phys = res->start; } @@ -279,11 +278,7 @@ static int xilinxfb_assign(struct platform_device *pdev, if (!drvdata->fb_virt) { dev_err(dev, "Could not allocate frame buffer memory\n"); - rc = -ENOMEM; - if (drvdata->flags & BUS_ACCESS_FLAG) - goto err_fbmem; - else - goto err_region; + return -ENOMEM; } /* Clear (turn to black) the framebuffer */ @@ -363,14 +358,6 @@ err_cmap: /* Turn off the display */ xilinx_fb_out32(drvdata, REG_CTRL, 0); -err_fbmem: - if (drvdata->flags & BUS_ACCESS_FLAG) - devm_iounmap(dev, drvdata->regs); - -err_region: - kfree(drvdata); - dev_set_drvdata(dev, NULL); - return rc; } @@ -395,17 +382,12 @@ static int xilinxfb_release(struct device *dev) /* Turn off the display */ xilinx_fb_out32(drvdata, REG_CTRL, 0); - /* Release the resources, as allocated based on interface */ - if (drvdata->flags & BUS_ACCESS_FLAG) - devm_iounmap(dev, drvdata->regs); #ifdef CONFIG_PPC_DCR - else + /* Release the resources, as allocated based on interface */ + if (!(drvdata->flags & BUS_ACCESS_FLAG)) dcr_unmap(drvdata->dcr_host, drvdata->dcr_len); #endif - kfree(drvdata); - dev_set_drvdata(dev, NULL); - return 0; } @@ -413,7 +395,7 @@ static int xilinxfb_release(struct device *dev) * OF bus binding */ -static int xilinxfb_of_probe(struct platform_device *op) +static int xilinxfb_of_probe(struct platform_device *pdev) { const u32 *prop; u32 tft_access = 0; @@ -425,17 +407,15 @@ static int xilinxfb_of_probe(struct platform_device *op) pdata = xilinx_fb_default_pdata; /* Allocate the driver data region */ - drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) { - dev_err(&op->dev, "Couldn't allocate device private record\n"); + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) return -ENOMEM; - } /* * To check whether the core is connected directly to DCR or BUS * interface and initialize the tft_access accordingly. */ - of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if", + of_property_read_u32(pdev->dev.of_node, "xlnx,dcr-splb-slave-if", &tft_access); /* @@ -448,40 +428,39 @@ static int xilinxfb_of_probe(struct platform_device *op) #ifdef CONFIG_PPC_DCR else { int start; - start = dcr_resource_start(op->dev.of_node, 0); - drvdata->dcr_len = dcr_resource_len(op->dev.of_node, 0); - drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len); + start = dcr_resource_start(pdev->dev.of_node, 0); + drvdata->dcr_len = dcr_resource_len(pdev->dev.of_node, 0); + drvdata->dcr_host = dcr_map(pdev->dev.of_node, start, drvdata->dcr_len); if (!DCR_MAP_OK(drvdata->dcr_host)) { - dev_err(&op->dev, "invalid DCR address\n"); - kfree(drvdata); + dev_err(&pdev->dev, "invalid DCR address\n"); return -ENODEV; } } #endif - prop = of_get_property(op->dev.of_node, "phys-size", &size); + prop = of_get_property(pdev->dev.of_node, "phys-size", &size); if ((prop) && (size >= sizeof(u32)*2)) { pdata.screen_width_mm = prop[0]; pdata.screen_height_mm = prop[1]; } - prop = of_get_property(op->dev.of_node, "resolution", &size); + prop = of_get_property(pdev->dev.of_node, "resolution", &size); if ((prop) && (size >= sizeof(u32)*2)) { pdata.xres = prop[0]; pdata.yres = prop[1]; } - prop = of_get_property(op->dev.of_node, "virtual-resolution", &size); + prop = of_get_property(pdev->dev.of_node, "virtual-resolution", &size); if ((prop) && (size >= sizeof(u32)*2)) { pdata.xvirt = prop[0]; pdata.yvirt = prop[1]; } - if (of_find_property(op->dev.of_node, "rotate-display", NULL)) + if (of_find_property(pdev->dev.of_node, "rotate-display", NULL)) pdata.rotate_screen = 1; - dev_set_drvdata(&op->dev, drvdata); - return xilinxfb_assign(op, drvdata, &pdata); + dev_set_drvdata(&pdev->dev, drvdata); + return xilinxfb_assign(pdev, drvdata, &pdata); } static int xilinxfb_of_remove(struct platform_device *op) |