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path: root/drivers/media/pci/ddbridge/ddbridge.h
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Diffstat (limited to 'drivers/media/pci/ddbridge/ddbridge.h')
-rw-r--r--drivers/media/pci/ddbridge/ddbridge.h341
1 files changed, 266 insertions, 75 deletions
diff --git a/drivers/media/pci/ddbridge/ddbridge.h b/drivers/media/pci/ddbridge/ddbridge.h
index 4a0e3283d646..e9afa96bd9df 100644
--- a/drivers/media/pci/ddbridge/ddbridge.h
+++ b/drivers/media/pci/ddbridge/ddbridge.h
@@ -1,7 +1,8 @@
/*
* ddbridge.h: Digital Devices PCIe bridge driver
*
- * Copyright (C) 2010-2011 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ * Ralph Metzler <rmetzler@digitaldevices.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -20,15 +21,39 @@
#ifndef _DDBRIDGE_H_
#define _DDBRIDGE_H_
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/poll.h>
+#include <linux/io.h>
+#include <linux/pci.h>
+#include <linux/timer.h>
+#include <linux/i2c.h>
+#include <linux/swab.h>
+#include <linux/vmalloc.h>
+#include <linux/workqueue.h>
+#include <linux/kthread.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <linux/completion.h>
+
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
-#include <linux/i2c.h>
#include <linux/mutex.h>
#include <asm/dma.h>
-#include <linux/dvb/frontend.h>
+#include <asm/irq.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+
#include <linux/dvb/ca.h>
#include <linux/socket.h>
+#include <linux/device.h>
+#include <linux/io.h>
#include "dmxdev.h"
#include "dvbdev.h"
@@ -37,69 +62,122 @@
#include "dvb_ringbuffer.h"
#include "dvb_ca_en50221.h"
#include "dvb_net.h"
-#include "cxd2099.h"
-#define DDB_MAX_I2C 4
-#define DDB_MAX_PORT 4
-#define DDB_MAX_INPUT 8
-#define DDB_MAX_OUTPUT 4
+#define DDBRIDGE_VERSION "0.9.31intermediate-integrated"
+
+#define DDB_MAX_I2C 32
+#define DDB_MAX_PORT 32
+#define DDB_MAX_INPUT 64
+#define DDB_MAX_OUTPUT 32
#define DDB_MAX_LINK 4
#define DDB_LINK_SHIFT 28
#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
-#define DDB_XO2_TYPE_NONE 0
-#define DDB_XO2_TYPE_DUOFLEX 1
-#define DDB_XO2_TYPE_CI 2
+struct ddb_regset {
+ u32 base;
+ u32 num;
+ u32 size;
+};
+
+struct ddb_regmap {
+ u32 irq_base_i2c;
+ u32 irq_base_idma;
+ u32 irq_base_odma;
+
+ const struct ddb_regset *i2c;
+ const struct ddb_regset *i2c_buf;
+ const struct ddb_regset *idma;
+ const struct ddb_regset *idma_buf;
+ const struct ddb_regset *odma;
+ const struct ddb_regset *odma_buf;
+
+ const struct ddb_regset *input;
+ const struct ddb_regset *output;
+
+ const struct ddb_regset *channel;
+};
+
+struct ddb_ids {
+ u16 vendor;
+ u16 device;
+ u16 subvendor;
+ u16 subdevice;
+
+ u32 hwid;
+ u32 regmapid;
+ u32 devid;
+ u32 mac;
+};
struct ddb_info {
int type;
-#define DDB_NONE 0
-#define DDB_OCTOPUS 1
-#define DDB_OCTOPUS_MAX_CT 6
+#define DDB_NONE 0
+#define DDB_OCTOPUS 1
+#define DDB_OCTOPUS_CI 2
+#define DDB_OCTOPUS_MAX 5
+#define DDB_OCTOPUS_MAX_CT 6
char *name;
- int port_num;
- u32 port_type[DDB_MAX_PORT];
+ u32 i2c_mask;
+ u8 port_num;
+ u8 led_num;
+ u8 fan_num;
+ u8 temp_num;
+ u8 temp_bus;
u32 board_control;
u32 board_control_2;
+ u8 mdio_num;
+ u8 con_clock; /* use a continuous clock */
u8 ts_quirks;
#define TS_QUIRK_SERIAL 1
#define TS_QUIRK_REVERSED 2
#define TS_QUIRK_ALT_OSC 8
+ u32 tempmon_irq;
+ const struct ddb_regmap *regmap;
};
-/* DMA_SIZE MUST be divisible by 188 and 128 !!! */
+/* DMA_SIZE MUST be smaller than 256k and
+ * MUST be divisible by 188 and 128 !!!
+ */
+
+#define DMA_MAX_BUFS 32 /* hardware table limit */
-#define INPUT_DMA_MAX_BUFS 32 /* hardware table limit */
#define INPUT_DMA_BUFS 8
#define INPUT_DMA_SIZE (128*47*21)
+#define INPUT_DMA_IRQ_DIV 1
-#define OUTPUT_DMA_MAX_BUFS 32
#define OUTPUT_DMA_BUFS 8
#define OUTPUT_DMA_SIZE (128*47*21)
+#define OUTPUT_DMA_IRQ_DIV 1
struct ddb;
struct ddb_port;
-struct ddb_input {
- struct ddb_port *port;
- u32 nr;
- int attached;
+struct ddb_dma {
+ void *io;
+ u32 regs;
+ u32 bufregs;
- dma_addr_t pbuf[INPUT_DMA_MAX_BUFS];
- u8 *vbuf[INPUT_DMA_MAX_BUFS];
- u32 dma_buf_num;
- u32 dma_buf_size;
+ dma_addr_t pbuf[DMA_MAX_BUFS];
+ u8 *vbuf[DMA_MAX_BUFS];
+ u32 num;
+ u32 size;
+ u32 div;
+ u32 bufval;
- struct tasklet_struct tasklet;
+ struct work_struct work;
spinlock_t lock;
wait_queue_head_t wq;
int running;
u32 stat;
+ u32 ctrl;
u32 cbuf;
u32 coff;
+};
- struct dvb_adapter adap;
+struct ddb_dvb {
+ struct dvb_adapter *adap;
+ int adap_registered;
struct dvb_device *dev;
struct i2c_client *i2c_client[1];
struct dvb_frontend *fe;
@@ -110,97 +188,210 @@ struct ddb_input {
struct dmx_frontend hw_frontend;
struct dmx_frontend mem_frontend;
int users;
- int (*gate_ctrl)(struct dvb_frontend *, int);
+ u32 attached;
+ u8 input;
+
+ enum fe_sec_tone_mode tone;
+ enum fe_sec_voltage voltage;
+
+ int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
+ int (*set_voltage)(struct dvb_frontend *fe,
+ enum fe_sec_voltage voltage);
+ int (*set_input)(struct dvb_frontend *fe, int input);
+ int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
+ struct dvb_diseqc_master_cmd *cmd);
};
-struct ddb_output {
+struct ddb_ci {
+ struct dvb_ca_en50221 en;
struct ddb_port *port;
u32 nr;
- dma_addr_t pbuf[OUTPUT_DMA_MAX_BUFS];
- u8 *vbuf[OUTPUT_DMA_MAX_BUFS];
- u32 dma_buf_num;
- u32 dma_buf_size;
- struct tasklet_struct tasklet;
- spinlock_t lock;
- wait_queue_head_t wq;
- int running;
- u32 stat;
- u32 cbuf;
- u32 coff;
+ struct mutex lock;
+};
- struct dvb_adapter adap;
- struct dvb_device *dev;
+struct ddb_io {
+ struct ddb_port *port;
+ u32 nr;
+ u32 regs;
+ struct ddb_dma *dma;
+ struct ddb_io *redo;
+ struct ddb_io *redi;
};
+#define ddb_output ddb_io
+#define ddb_input ddb_io
+
struct ddb_i2c {
struct ddb *dev;
u32 nr;
- struct i2c_adapter adap;
- struct i2c_adapter adap2;
u32 regs;
+ u32 link;
+ struct i2c_adapter adap;
u32 rbuf;
u32 wbuf;
- int done;
- wait_queue_head_t wq;
+ u32 bsize;
+ struct completion completion;
};
struct ddb_port {
struct ddb *dev;
u32 nr;
+ u32 pnr;
+ u32 regs;
+ u32 lnr;
struct ddb_i2c *i2c;
struct mutex i2c_gate_lock;
u32 class;
#define DDB_PORT_NONE 0
#define DDB_PORT_CI 1
#define DDB_PORT_TUNER 2
- u32 type;
-#define DDB_TUNER_NONE 0
-#define DDB_TUNER_DVBS_ST 1
-#define DDB_TUNER_DVBS_ST_AA 2
-#define DDB_TUNER_DVBCT2_SONY_P 7
-#define DDB_TUNER_DVBC2T2_SONY_P 8
-#define DDB_TUNER_ISDBT_SONY_P 9
-#define DDB_TUNER_DVBC2T2I_SONY_P 15
-#define DDB_TUNER_DVBCT_TR 16
-#define DDB_TUNER_DVBCT_ST 17
-#define DDB_TUNER_XO2_DVBS_STV0910 32
-#define DDB_TUNER_XO2_DVBCT2_SONY 33
-#define DDB_TUNER_XO2_ISDBT_SONY 34
-#define DDB_TUNER_XO2_DVBC2T2_SONY 35
-#define DDB_TUNER_XO2_ATSC_ST 36
-#define DDB_TUNER_XO2_DVBC2T2I_SONY 37
-
- u32 adr;
+#define DDB_PORT_LOOP 3
+ char *name;
+ char *type_name;
+ u32 type;
+#define DDB_TUNER_NONE 0
+#define DDB_TUNER_DVBS_ST 1
+#define DDB_TUNER_DVBS_ST_AA 2
+#define DDB_TUNER_DVBCT_TR 3
+#define DDB_TUNER_DVBCT_ST 4
+#define DDB_CI_INTERNAL 5
+#define DDB_CI_EXTERNAL_SONY 6
+#define DDB_TUNER_DVBCT2_SONY_P 7
+#define DDB_TUNER_DVBC2T2_SONY_P 8
+#define DDB_TUNER_ISDBT_SONY_P 9
+#define DDB_TUNER_DVBS_STV0910_P 10
+#define DDB_TUNER_MXL5XX 11
+#define DDB_CI_EXTERNAL_XO2 12
+#define DDB_CI_EXTERNAL_XO2_B 13
+#define DDB_TUNER_DVBS_STV0910_PR 14
+#define DDB_TUNER_DVBC2T2I_SONY_P 15
+
+#define DDB_TUNER_XO2 32
+#define DDB_TUNER_DVBS_STV0910 (DDB_TUNER_XO2 + 0)
+#define DDB_TUNER_DVBCT2_SONY (DDB_TUNER_XO2 + 1)
+#define DDB_TUNER_ISDBT_SONY (DDB_TUNER_XO2 + 2)
+#define DDB_TUNER_DVBC2T2_SONY (DDB_TUNER_XO2 + 3)
+#define DDB_TUNER_ATSC_ST (DDB_TUNER_XO2 + 4)
+#define DDB_TUNER_DVBC2T2I_SONY (DDB_TUNER_XO2 + 5)
struct ddb_input *input[2];
struct ddb_output *output;
struct dvb_ca_en50221 *en;
+ struct ddb_dvb dvb[2];
+ u32 gap;
+ u32 obr;
+ u8 creg;
+};
+
+#define CM_STARTUP_DELAY 2
+#define CM_AVERAGE 20
+#define CM_GAIN 10
+
+#define HW_LSB_SHIFT 12
+#define HW_LSB_MASK 0x1000
+
+#define CM_IDLE 0
+#define CM_STARTUP 1
+#define CM_ADJUST 2
+
+#define TS_CAPTURE_LEN (4096)
+
+struct ddb_lnb {
+ struct mutex lock;
+ u32 tone;
+ enum fe_sec_voltage oldvoltage[4];
+ u32 voltage[4];
+ u32 voltages;
+ u32 fmode;
+};
+
+struct ddb_link {
+ struct ddb *dev;
+ const struct ddb_info *info;
+ u32 nr;
+ u32 regs;
+ spinlock_t lock;
+ struct mutex flash_mutex;
+ struct ddb_lnb lnb;
+ struct tasklet_struct tasklet;
+ struct ddb_ids ids;
+
+ spinlock_t temp_lock;
+ int overtemperature_error;
+ u8 temp_tab[11];
};
struct ddb {
struct pci_dev *pdev;
+ struct platform_device *pfdev;
+ struct device *dev;
+
+ int msi;
+ struct workqueue_struct *wq;
+ u32 has_dma;
+
+ struct ddb_link link[DDB_MAX_LINK];
unsigned char __iomem *regs;
+ u32 regs_len;
+ u32 port_num;
struct ddb_port port[DDB_MAX_PORT];
+ u32 i2c_num;
struct ddb_i2c i2c[DDB_MAX_I2C];
struct ddb_input input[DDB_MAX_INPUT];
struct ddb_output output[DDB_MAX_OUTPUT];
+ struct dvb_adapter adap[DDB_MAX_INPUT];
+ struct ddb_dma idma[DDB_MAX_INPUT];
+ struct ddb_dma odma[DDB_MAX_OUTPUT];
+
+ void (*handler[4][256])(unsigned long);
+ unsigned long handler_data[4][256];
struct device *ddb_dev;
- int nr;
+ u32 ddb_dev_users;
+ u32 nr;
u8 iobuf[1028];
- struct ddb_info *info;
- int msi;
+ u8 leds;
+ u32 ts_irq;
+ u32 i2c_irq;
+
+ struct mutex mutex;
+
+ u8 tsbuf[TS_CAPTURE_LEN];
};
/****************************************************************************/
+/****************************************************************************/
+/****************************************************************************/
-#define ddbwritel(_val, _adr) writel((_val), \
- dev->regs+(_adr))
-#define ddbreadl(_adr) readl(dev->regs+(_adr))
-#define ddbcpyto(_adr, _src, _count) memcpy_toio(dev->regs+(_adr), (_src), (_count))
-#define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), dev->regs+(_adr), (_count))
+int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
/****************************************************************************/
-#endif
+/* ddbridge-main.c (modparams) */
+extern int ci_bitrate;
+extern int ts_loop;
+extern int xo2_speed;
+extern int alt_dma;
+extern int no_init;
+extern int stv0910_single;
+extern struct workqueue_struct *ddb_wq;
+
+/* ddbridge-core.c */
+void ddb_ports_detach(struct ddb *dev);
+void ddb_ports_release(struct ddb *dev);
+void ddb_buffers_free(struct ddb *dev);
+void ddb_device_destroy(struct ddb *dev);
+irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler(int irq, void *dev_id);
+void ddb_ports_init(struct ddb *dev);
+int ddb_buffers_alloc(struct ddb *dev);
+int ddb_ports_attach(struct ddb *dev);
+int ddb_device_create(struct ddb *dev);
+int ddb_class_create(void);
+void ddb_class_destroy(void);
+int ddb_init(struct ddb *dev);
+void ddb_unmap(struct ddb *dev);
+
+#endif /* DDBRIDGE_H */
generated by cgit v1.2.3-58-ga151 (git 2.39.0) at 2024-12-12 20:25:40 +0000