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-rw-r--r--arch/sparc64/kernel/pci_psycho.c28
-rw-r--r--arch/sparc64/kernel/pci_sabre.c18
-rw-r--r--arch/sparc64/kernel/pci_schizo.c104
3 files changed, 104 insertions, 46 deletions
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 401e5dfe9bd5..2edcb1dd13c3 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -836,6 +836,7 @@ static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
struct of_device *op = of_find_device_by_node(pbm->prom_node);
unsigned long base = pbm->controller_regs;
u64 tmp;
+ int err;
if (!op)
return;
@@ -852,12 +853,27 @@ static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
if (op->num_irqs < 6)
return;
- request_irq(op->irqs[1], psycho_ue_intr, 0,
- "PSYCHO_UE", pbm);
- request_irq(op->irqs[2], psycho_ce_intr, 0,
- "PSYCHO_CE", pbm);
- request_irq(op->irqs[0], psycho_pcierr_intr, 0,
- "PSYCHO_PCIERR", pbm);
+ /* We really mean to ignore the return result here. Two
+ * PCI controller share the same interrupt numbers and
+ * drive the same front-end hardware. Whichever of the
+ * two get in here first will register the IRQ handler
+ * the second will just error out since we do not pass in
+ * IRQF_SHARED.
+ */
+ err = request_irq(op->irqs[1], psycho_ue_intr, 0,
+ "PSYCHO_UE", pbm);
+ err = request_irq(op->irqs[2], psycho_ce_intr, 0,
+ "PSYCHO_CE", pbm);
+
+ /* This one, however, ought not to fail. We can just warn
+ * about it since the system can still operate properly even
+ * if this fails.
+ */
+ err = request_irq(op->irqs[0], psycho_pcierr_intr, 0,
+ "PSYCHO_PCIERR", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register PCIERR, "
+ "err=%d\n", pbm->name, err);
/* Enable UE and CE interrupts for controller. */
psycho_write(base + PSYCHO_ECC_CTRL,
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 863308c8955d..4cefe6e83b24 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -831,6 +831,7 @@ static void sabre_register_error_handlers(struct pci_pbm_info *pbm)
struct of_device *op;
unsigned long base = pbm->controller_regs;
u64 tmp;
+ int err;
if (pbm->chip_type == PBM_CHIP_TYPE_SABRE)
dp = dp->parent;
@@ -857,15 +858,24 @@ static void sabre_register_error_handlers(struct pci_pbm_info *pbm)
SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE));
- request_irq(op->irqs[1], sabre_ue_intr, 0, "SABRE_UE", pbm);
+ err = request_irq(op->irqs[1], sabre_ue_intr, 0, "SABRE_UE", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Couldn't register UE, err=%d.\n",
+ pbm->name, err);
sabre_write(base + SABRE_CE_AFSR,
(SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR));
- request_irq(op->irqs[2], sabre_ce_intr, 0, "SABRE_CE", pbm);
- request_irq(op->irqs[0], sabre_pcierr_intr, 0,
- "SABRE_PCIERR", pbm);
+ err = request_irq(op->irqs[2], sabre_ce_intr, 0, "SABRE_CE", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Couldn't register CE, err=%d.\n",
+ pbm->name, err);
+ err = request_irq(op->irqs[0], sabre_pcierr_intr, 0,
+ "SABRE_PCIERR", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Couldn't register PCIERR, err=%d.\n",
+ pbm->name, err);
tmp = sabre_read(base + SABRE_PCICTRL);
tmp |= SABRE_PCICTRL_ERREN;
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 312f3e4f2ed4..e375d72b8eed 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -984,6 +984,7 @@ static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm)
{
struct of_device *op = of_find_device_by_node(pbm->prom_node);
u64 tmp, err_mask, err_no_mask;
+ int err;
/* Tomatillo IRQ property layout is:
* 0: PCIERR
@@ -993,24 +994,39 @@ static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm)
* 4: POWER FAIL?
*/
- if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO))
- request_irq(op->irqs[1], schizo_ue_intr, 0,
- "TOMATILLO_UE", pbm);
-
- if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO))
- request_irq(op->irqs[2], schizo_ce_intr, 0,
- "TOMATILLO_CE", pbm);
-
- if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO))
- request_irq(op->irqs[0], schizo_pcierr_intr, 0,
- "TOMATILLO_PCIERR", pbm);
- else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO))
- request_irq(op->irqs[0], schizo_pcierr_intr, 0,
- "TOMATILLO_PCIERR", pbm);
-
- if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO))
- request_irq(op->irqs[3], schizo_safarierr_intr, 0,
- "TOMATILLO_SERR", pbm);
+ if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO)) {
+ err = request_irq(op->irqs[1], schizo_ue_intr, 0,
+ "TOMATILLO_UE", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register UE, "
+ "err=%d\n", pbm->name, err);
+ }
+ if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO)) {
+ err = request_irq(op->irqs[2], schizo_ce_intr, 0,
+ "TOMATILLO_CE", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register CE, "
+ "err=%d\n", pbm->name, err);
+ }
+ err = 0;
+ if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO)) {
+ err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
+ "TOMATILLO_PCIERR", pbm);
+ } else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO)) {
+ err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
+ "TOMATILLO_PCIERR", pbm);
+ }
+ if (err)
+ printk(KERN_WARNING "%s: Could not register PCIERR, "
+ "err=%d\n", pbm->name, err);
+
+ if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO)) {
+ err = request_irq(op->irqs[3], schizo_safarierr_intr, 0,
+ "TOMATILLO_SERR", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register SERR, "
+ "err=%d\n", pbm->name, err);
+ }
/* Enable UE and CE interrupts for controller. */
schizo_write(pbm->controller_regs + SCHIZO_ECC_CTRL,
@@ -1064,6 +1080,7 @@ static void schizo_register_error_handlers(struct pci_pbm_info *pbm)
{
struct of_device *op = of_find_device_by_node(pbm->prom_node);
u64 tmp, err_mask, err_no_mask;
+ int err;
/* Schizo IRQ property layout is:
* 0: PCIERR
@@ -1073,24 +1090,39 @@ static void schizo_register_error_handlers(struct pci_pbm_info *pbm)
* 4: POWER FAIL?
*/
- if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO))
- request_irq(op->irqs[1], schizo_ue_intr, 0,
- "SCHIZO_UE", pbm);
-
- if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO))
- request_irq(op->irqs[2], schizo_ce_intr, 0,
- "SCHIZO_CE", pbm);
-
- if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO))
- request_irq(op->irqs[0], schizo_pcierr_intr, 0,
- "SCHIZO_PCIERR", pbm);
- else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO))
- request_irq(op->irqs[0], schizo_pcierr_intr, 0,
- "SCHIZO_PCIERR", pbm);
-
- if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO))
- request_irq(op->irqs[3], schizo_safarierr_intr, 0,
- "SCHIZO_SERR", pbm);
+ if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO)) {
+ err = request_irq(op->irqs[1], schizo_ue_intr, 0,
+ "SCHIZO_UE", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register UE, "
+ "err=%d\n", pbm->name, err);
+ }
+ if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO)) {
+ err = request_irq(op->irqs[2], schizo_ce_intr, 0,
+ "SCHIZO_CE", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register CE, "
+ "err=%d\n", pbm->name, err);
+ }
+ err = 0;
+ if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO)) {
+ err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
+ "SCHIZO_PCIERR", pbm);
+ } else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO)) {
+ err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
+ "SCHIZO_PCIERR", pbm);
+ }
+ if (err)
+ printk(KERN_WARNING "%s: Could not register PCIERR, "
+ "err=%d\n", pbm->name, err);
+
+ if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO)) {
+ err = request_irq(op->irqs[3], schizo_safarierr_intr, 0,
+ "SCHIZO_SERR", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register SERR, "
+ "err=%d\n", pbm->name, err);
+ }
/* Enable UE and CE interrupts for controller. */
schizo_write(pbm->controller_regs + SCHIZO_ECC_CTRL,
generated by cgit v1.2.3-58-ga151 (git 2.39.0) at 2024-12-25 21:57:08 +0000