diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm630.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm630.dtsi | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index f5921b80ef94..c7e3764a8cf3 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1302,6 +1302,7 @@ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&qusb2phy0>, <&usb3_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; @@ -2422,7 +2423,6 @@ thermal-zones { aoss-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 0>; @@ -2437,7 +2437,6 @@ cpuss0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 1>; @@ -2452,7 +2451,6 @@ cpuss1-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 2>; @@ -2467,7 +2465,6 @@ cpu0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 3>; @@ -2488,7 +2485,6 @@ cpu1-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 4>; @@ -2509,7 +2505,6 @@ cpu2-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 5>; @@ -2530,7 +2525,6 @@ cpu3-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 6>; @@ -2557,7 +2551,6 @@ pwr-cluster-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 7>; @@ -2578,7 +2571,6 @@ gpu-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens 8>; @@ -2591,20 +2583,32 @@ trips { gpu_alert0: trip-point0 { + temperature = <85000>; + hysteresis = <1000>; + type = "passive"; + }; + + trip-point1 { temperature = <90000>; hysteresis = <1000>; type = "hot"; }; + + trip-point2 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; }; }; }; timer { compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 1 0xf08>, - <GIC_PPI 2 0xf08>, - <GIC_PPI 3 0xf08>, - <GIC_PPI 0 0xf08>; + interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; }; |