diff options
25 files changed, 277 insertions, 124 deletions
diff --git a/.get_maintainer.ignore b/.get_maintainer.ignore index cca6d870f7a5..a64d21913745 100644 --- a/.get_maintainer.ignore +++ b/.get_maintainer.ignore @@ -1 +1,2 @@ Christoph Hellwig <hch@lst.de> +Marc Gonzalez <marc.w.gonzalez@free.fr> diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 4bf1b4da7659..99dee23c74a4 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt @@ -25,6 +25,7 @@ compatible: must be one of: o "atmel,at91sam9n12" o "atmel,at91sam9rl" o "atmel,at91sam9xe" + o "microchip,sam9x60" * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific SoC family: o "atmel,sama5d2" shall be extended with the specific SoC compatible: diff --git a/arch/arm/boot/dts/logicpd-som-lv-baseboard.dtsi b/arch/arm/boot/dts/logicpd-som-lv-baseboard.dtsi index 4990ed90dcea..3e39b9a1f35d 100644 --- a/arch/arm/boot/dts/logicpd-som-lv-baseboard.dtsi +++ b/arch/arm/boot/dts/logicpd-som-lv-baseboard.dtsi @@ -153,7 +153,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ - cd-gpios = <&gpio4 14 IRQ_TYPE_LEVEL_LOW>; /* gpio_110 */ + cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* gpio_110 */ vmmc-supply = <&vmmc1>; bus-width = <4>; cap-power-off-card; diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig index 515cb37eeab6..d5341b0bd88d 100644 --- a/arch/arm/configs/sama5_defconfig +++ b/arch/arm/configs/sama5_defconfig @@ -150,7 +150,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_V4L_PLATFORM_DRIVERS=y CONFIG_SOC_CAMERA=y CONFIG_VIDEO_ATMEL_ISI=y -CONFIG_SOC_CAMERA_OV2640=y +CONFIG_SOC_CAMERA_OV2640=m CONFIG_DRM=y CONFIG_DRM_ATMEL_HLCDC=y CONFIG_DRM_PANEL_SIMPLE=y diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index 9d42cfe85f5b..6701a975e785 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -21,7 +21,6 @@ CONFIG_NEON=y CONFIG_OPROFILE=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y -# CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set CONFIG_NET=y CONFIG_PACKET=y @@ -128,6 +127,8 @@ CONFIG_RTC_DRV_DS1307=y CONFIG_DMADEVICES=y CONFIG_PL330_DMA=y CONFIG_DMATEST=m +CONFIG_IIO=y +CONFIG_LTC2497=y CONFIG_FPGA=y CONFIG_FPGA_MGR_SOCFPGA=y CONFIG_FPGA_MGR_SOCFPGA_A10=y diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 903f23c309df..01b1bdb4fb6e 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -21,7 +21,6 @@ config SOC_SAMA5D2 depends on ARCH_MULTI_V7 select SOC_SAMA5 select CACHE_L2X0 - select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_USB_CLK select HAVE_AT91_H32MX @@ -36,7 +35,6 @@ config SOC_SAMA5D3 bool "SAMA5D3 family" depends on ARCH_MULTI_V7 select SOC_SAMA5 - select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK @@ -50,7 +48,6 @@ config SOC_SAMA5D4 depends on ARCH_MULTI_V7 select SOC_SAMA5 select CACHE_L2X0 - select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK diff --git a/arch/arm/mach-at91/at91sam9.c b/arch/arm/mach-at91/at91sam9.c index 3dbdef4d3cbf..c12563b09656 100644 --- a/arch/arm/mach-at91/at91sam9.c +++ b/arch/arm/mach-at91/at91sam9.c @@ -32,3 +32,21 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9") .init_machine = at91sam9_init, .dt_compat = at91_dt_board_compat, MACHINE_END + +static void __init sam9x60_init(void) +{ + of_platform_default_populate(NULL, NULL, NULL); + + sam9x60_pm_init(); +} + +static const char *const sam9x60_dt_board_compat[] __initconst = { + "microchip,sam9x60", + NULL +}; + +DT_MACHINE_START(sam9x60_dt, "Microchip SAM9X60") + /* Maintainer: Microchip */ + .init_machine = sam9x60_init, + .dt_compat = sam9x60_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index e2bd17237964..72b45accfa0f 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -14,11 +14,13 @@ #ifdef CONFIG_PM extern void __init at91rm9200_pm_init(void); extern void __init at91sam9_pm_init(void); +extern void __init sam9x60_pm_init(void); extern void __init sama5_pm_init(void); extern void __init sama5d2_pm_init(void); #else static inline void __init at91rm9200_pm_init(void) { } static inline void __init at91sam9_pm_init(void) { } +static inline void __init sam9x60_pm_init(void) { } static inline void __init sama5_pm_init(void) { } static inline void __init sama5d2_pm_init(void) { } #endif diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 2a757dcaa1a5..6c8147536f3d 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -39,6 +39,20 @@ extern void at91_pinctrl_gpio_suspend(void); extern void at91_pinctrl_gpio_resume(void); #endif +struct at91_soc_pm { + int (*config_shdwc_ws)(void __iomem *shdwc, u32 *mode, u32 *polarity); + int (*config_pmc_ws)(void __iomem *pmc, u32 mode, u32 polarity); + const struct of_device_id *ws_ids; + struct at91_pm_data data; +}; + +static struct at91_soc_pm soc_pm = { + .data = { + .standby_mode = AT91_PM_STANDBY, + .suspend_mode = AT91_PM_ULP0, + }, +}; + static const match_table_t pm_modes __initconst = { { AT91_PM_STANDBY, "standby" }, { AT91_PM_ULP0, "ulp0" }, @@ -47,16 +61,11 @@ static const match_table_t pm_modes __initconst = { { -1, NULL }, }; -static struct at91_pm_data pm_data = { - .standby_mode = AT91_PM_STANDBY, - .suspend_mode = AT91_PM_ULP0, -}; - #define at91_ramc_read(id, field) \ - __raw_readl(pm_data.ramc[id] + field) + __raw_readl(soc_pm.data.ramc[id] + field) #define at91_ramc_write(id, field, value) \ - __raw_writel(value, pm_data.ramc[id] + field) + __raw_writel(value, soc_pm.data.ramc[id] + field) static int at91_pm_valid_state(suspend_state_t state) { @@ -91,6 +100,8 @@ static const struct wakeup_source_info ws_info[] = { { .pmc_fsmr_bit = AT91_PMC_RTCAL, .shdwc_mr_bit = BIT(17) }, { .pmc_fsmr_bit = AT91_PMC_USBAL }, { .pmc_fsmr_bit = AT91_PMC_SDMMC_CD }, + { .pmc_fsmr_bit = AT91_PMC_RTTAL }, + { .pmc_fsmr_bit = AT91_PMC_RXLP_MCE }, }; static const struct of_device_id sama5d2_ws_ids[] = { @@ -105,6 +116,17 @@ static const struct of_device_id sama5d2_ws_ids[] = { { /* sentinel */ } }; +static const struct of_device_id sam9x60_ws_ids[] = { + { .compatible = "atmel,at91sam9x5-rtc", .data = &ws_info[1] }, + { .compatible = "atmel,at91rm9200-ohci", .data = &ws_info[2] }, + { .compatible = "usb-ohci", .data = &ws_info[2] }, + { .compatible = "atmel,at91sam9g45-ehci", .data = &ws_info[2] }, + { .compatible = "usb-ehci", .data = &ws_info[2] }, + { .compatible = "atmel,at91sam9260-rtt", .data = &ws_info[4] }, + { .compatible = "cdns,sam9x60-macb", .data = &ws_info[5] }, + { /* sentinel */ } +}; + static int at91_pm_config_ws(unsigned int pm_mode, bool set) { const struct wakeup_source_info *wsi; @@ -116,24 +138,22 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set) if (pm_mode != AT91_PM_ULP1) return 0; - if (!pm_data.pmc || !pm_data.shdwc) + if (!soc_pm.data.pmc || !soc_pm.data.shdwc || !soc_pm.ws_ids) return -EPERM; if (!set) { - writel(mode, pm_data.pmc + AT91_PMC_FSMR); + writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR); return 0; } - /* SHDWC.WUIR */ - val = readl(pm_data.shdwc + 0x0c); - mode |= (val & 0x3ff); - polarity |= ((val >> 16) & 0x3ff); + if (soc_pm.config_shdwc_ws) + soc_pm.config_shdwc_ws(soc_pm.data.shdwc, &mode, &polarity); /* SHDWC.MR */ - val = readl(pm_data.shdwc + 0x04); + val = readl(soc_pm.data.shdwc + 0x04); /* Loop through defined wakeup sources. */ - for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) { + for_each_matching_node_and_match(np, soc_pm.ws_ids, &match) { pdev = of_find_device_by_node(np); if (!pdev) continue; @@ -155,8 +175,8 @@ put_device: } if (mode) { - writel(mode, pm_data.pmc + AT91_PMC_FSMR); - writel(polarity, pm_data.pmc + AT91_PMC_FSPR); + if (soc_pm.config_pmc_ws) + soc_pm.config_pmc_ws(soc_pm.data.pmc, mode, polarity); } else { pr_err("AT91: PM: no ULP1 wakeup sources found!"); } @@ -164,6 +184,34 @@ put_device: return mode ? 0 : -EPERM; } +static int at91_sama5d2_config_shdwc_ws(void __iomem *shdwc, u32 *mode, + u32 *polarity) +{ + u32 val; + + /* SHDWC.WUIR */ + val = readl(shdwc + 0x0c); + *mode |= (val & 0x3ff); + *polarity |= ((val >> 16) & 0x3ff); + + return 0; +} + +static int at91_sama5d2_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity) +{ + writel(mode, pmc + AT91_PMC_FSMR); + writel(polarity, pmc + AT91_PMC_FSPR); + + return 0; +} + +static int at91_sam9x60_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity) +{ + writel(mode, pmc + AT91_PMC_FSMR); + + return 0; +} + /* * Called after processes are frozen, but before we shutdown devices. */ @@ -171,18 +219,18 @@ static int at91_pm_begin(suspend_state_t state) { switch (state) { case PM_SUSPEND_MEM: - pm_data.mode = pm_data.suspend_mode; + soc_pm.data.mode = soc_pm.data.suspend_mode; break; case PM_SUSPEND_STANDBY: - pm_data.mode = pm_data.standby_mode; + soc_pm.data.mode = soc_pm.data.standby_mode; break; default: - pm_data.mode = -1; + soc_pm.data.mode = -1; } - return at91_pm_config_ws(pm_data.mode, true); + return at91_pm_config_ws(soc_pm.data.mode, true); } /* @@ -194,10 +242,10 @@ static int at91_pm_verify_clocks(void) unsigned long scsr; int i; - scsr = readl(pm_data.pmc + AT91_PMC_SCSR); + scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR); /* USB must not be using PLLB */ - if ((scsr & pm_data.uhp_udp_mask) != 0) { + if ((scsr & soc_pm.data.uhp_udp_mask) != 0) { pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); return 0; } @@ -208,7 +256,7 @@ static int at91_pm_verify_clocks(void) if ((scsr & (AT91_PMC_PCK0 << i)) == 0) continue; - css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS; + css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS; if (css != AT91_PMC_CSS_SLOW) { pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); return 0; @@ -230,7 +278,7 @@ static int at91_pm_verify_clocks(void) */ int at91_suspend_entering_slow_clock(void) { - return (pm_data.mode >= AT91_PM_ULP0); + return (soc_pm.data.mode >= AT91_PM_ULP0); } EXPORT_SYMBOL(at91_suspend_entering_slow_clock); @@ -243,14 +291,14 @@ static int at91_suspend_finish(unsigned long val) flush_cache_all(); outer_disable(); - at91_suspend_sram_fn(&pm_data); + at91_suspend_sram_fn(&soc_pm.data); return 0; } static void at91_pm_suspend(suspend_state_t state) { - if (pm_data.mode == AT91_PM_BACKUP) { + if (soc_pm.data.mode == AT91_PM_BACKUP) { pm_bu->suspended = 1; cpu_suspend(0, at91_suspend_finish); @@ -289,7 +337,7 @@ static int at91_pm_enter(suspend_state_t state) /* * Ensure that clocks are in a valid state. */ - if (pm_data.mode >= AT91_PM_ULP0 && + if (soc_pm.data.mode >= AT91_PM_ULP0 && !at91_pm_verify_clocks()) goto error; @@ -318,7 +366,7 @@ error: */ static void at91_pm_end(void) { - at91_pm_config_ws(pm_data.mode, false); + at91_pm_config_ws(soc_pm.data.mode, false); } @@ -351,7 +399,7 @@ static void at91rm9200_standby(void) " str %2, [%1, %3]\n\t" " mcr p15, 0, %0, c7, c0, 4\n\t" : - : "r" (0), "r" (pm_data.ramc[0]), + : "r" (0), "r" (soc_pm.data.ramc[0]), "r" (1), "r" (AT91_MC_SDRAMC_SRR)); } @@ -374,7 +422,7 @@ static void at91_ddr_standby(void) at91_ramc_write(0, AT91_DDRSDRC_MDR, mdr); } - if (pm_data.ramc[1]) { + if (soc_pm.data.ramc[1]) { saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH; @@ -392,14 +440,14 @@ static void at91_ddr_standby(void) /* self-refresh mode now */ at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); - if (pm_data.ramc[1]) + if (soc_pm.data.ramc[1]) at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); cpu_do_idle(); at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr0); at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); - if (pm_data.ramc[1]) { + if (soc_pm.data.ramc[1]) { at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr1); at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } @@ -429,7 +477,7 @@ static void at91sam9_sdram_standby(void) u32 lpr0, lpr1 = 0; u32 saved_lpr0, saved_lpr1 = 0; - if (pm_data.ramc[1]) { + if (soc_pm.data.ramc[1]) { saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB; lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; @@ -441,13 +489,13 @@ static void at91sam9_sdram_standby(void) /* self-refresh mode now */ at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); - if (pm_data.ramc[1]) + if (soc_pm.data.ramc[1]) at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); cpu_do_idle(); at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); - if (pm_data.ramc[1]) + if (soc_pm.data.ramc[1]) at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); } @@ -480,14 +528,14 @@ static __init void at91_dt_ramc(void) const struct ramc_info *ramc; for_each_matching_node_and_match(np, ramc_ids, &of_id) { - pm_data.ramc[idx] = of_iomap(np, 0); - if (!pm_data.ramc[idx]) + soc_pm.data.ramc[idx] = of_iomap(np, 0); + if (!soc_pm.data.ramc[idx]) panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); ramc = of_id->data; if (!standby) standby = ramc->idle; - pm_data.memctrl = ramc->memctrl; + soc_pm.data.memctrl = ramc->memctrl; idx++; } @@ -509,12 +557,17 @@ static void at91rm9200_idle(void) * Disable the processor clock. The processor will be automatically * re-enabled by an interrupt or by a reset. */ - writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR); + writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); +} + +static void at91sam9x60_idle(void) +{ + cpu_do_idle(); } static void at91sam9_idle(void) { - writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR); + writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); cpu_do_idle(); } @@ -566,8 +619,8 @@ static void __init at91_pm_sram_init(void) static bool __init at91_is_pm_mode_active(int pm_mode) { - return (pm_data.standby_mode == pm_mode || - pm_data.suspend_mode == pm_mode); + return (soc_pm.data.standby_mode == pm_mode || + soc_pm.data.suspend_mode == pm_mode); } static int __init at91_pm_backup_init(void) @@ -577,6 +630,9 @@ static int __init at91_pm_backup_init(void) struct platform_device *pdev = NULL; int ret = -ENODEV; + if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) + return -EPERM; + if (!at91_is_pm_mode_active(AT91_PM_BACKUP)) return 0; @@ -586,7 +642,7 @@ static int __init at91_pm_backup_init(void) return ret; } - pm_data.sfrbu = of_iomap(np, 0); + soc_pm.data.sfrbu = of_iomap(np, 0); of_node_put(np); np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam"); @@ -622,8 +678,8 @@ static int __init at91_pm_backup_init(void) securam_fail: put_device(&pdev->dev); securam_fail_no_ref_dev: - iounmap(pm_data.sfrbu); - pm_data.sfrbu = NULL; + iounmap(soc_pm.data.sfrbu); + soc_pm.data.sfrbu = NULL; return ret; } @@ -632,10 +688,10 @@ static void __init at91_pm_use_default_mode(int pm_mode) if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP) return; - if (pm_data.standby_mode == pm_mode) - pm_data.standby_mode = AT91_PM_ULP0; - if (pm_data.suspend_mode == pm_mode) - pm_data.suspend_mode = AT91_PM_ULP0; + if (soc_pm.data.standby_mode == pm_mode) + soc_pm.data.standby_mode = AT91_PM_ULP0; + if (soc_pm.data.suspend_mode == pm_mode) + soc_pm.data.suspend_mode = AT91_PM_ULP0; } static void __init at91_pm_modes_init(void) @@ -653,7 +709,7 @@ static void __init at91_pm_modes_init(void) goto ulp1_default; } - pm_data.shdwc = of_iomap(np, 0); + soc_pm.data.shdwc = of_iomap(np, 0); of_node_put(np); ret = at91_pm_backup_init(); @@ -667,8 +723,8 @@ static void __init at91_pm_modes_init(void) return; unmap: - iounmap(pm_data.shdwc); - pm_data.shdwc = NULL; + iounmap(soc_pm.data.shdwc); + soc_pm.data.shdwc = NULL; ulp1_default: at91_pm_use_default_mode(AT91_PM_ULP1); backup_default: @@ -711,14 +767,14 @@ static void __init at91_pm_init(void (*pm_idle)(void)) platform_device_register(&at91_cpuidle_device); pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id); - pm_data.pmc = of_iomap(pmc_np, 0); - if (!pm_data.pmc) { + soc_pm.data.pmc = of_iomap(pmc_np, 0); + if (!soc_pm.data.pmc) { pr_err("AT91: PM not supported, PMC not found\n"); return; } pmc = of_id->data; - pm_data.uhp_udp_mask = pmc->uhp_udp_mask; + soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask; if (pm_idle) arm_pm_idle = pm_idle; @@ -728,8 +784,8 @@ static void __init at91_pm_init(void (*pm_idle)(void)) if (at91_suspend_sram_fn) { suspend_set_ops(&at91_pm_ops); pr_info("AT91: PM: standby: %s, suspend: %s\n", - pm_modes[pm_data.standby_mode].pattern, - pm_modes[pm_data.suspend_mode].pattern); + pm_modes[soc_pm.data.standby_mode].pattern, + pm_modes[soc_pm.data.suspend_mode].pattern); } else { pr_info("AT91: PM not supported, due to no SRAM allocated\n"); } @@ -750,6 +806,19 @@ void __init at91rm9200_pm_init(void) at91_pm_init(at91rm9200_idle); } +void __init sam9x60_pm_init(void) +{ + if (!IS_ENABLED(CONFIG_SOC_AT91SAM9)) + return; + + at91_pm_modes_init(); + at91_dt_ramc(); + at91_pm_init(at91sam9x60_idle); + + soc_pm.ws_ids = sam9x60_ws_ids; + soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws; +} + void __init at91sam9_pm_init(void) { if (!IS_ENABLED(CONFIG_SOC_AT91SAM9)) @@ -775,6 +844,10 @@ void __init sama5d2_pm_init(void) at91_pm_modes_init(); sama5_pm_init(); + + soc_pm.ws_ids = sama5d2_ws_ids; + soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws; + soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws; } static int __init at91_pm_modes_select(char *str) @@ -795,8 +868,8 @@ static int __init at91_pm_modes_select(char *str) if (suspend < 0) return 0; - pm_data.standby_mode = standby; - pm_data.suspend_mode = suspend; + soc_pm.data.standby_mode = standby; + soc_pm.data.suspend_mode = suspend; return 0; } diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index bfe1c4d06901..77e29309cc6e 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -51,15 +51,6 @@ tmp2 .req r5 .endm /* - * Wait until PLLA has locked. - */ - .macro wait_pllalock -1: ldr tmp1, [pmc, #AT91_PMC_SR] - tst tmp1, #AT91_PMC_LOCKA - beq 1b - .endm - -/* * Put the processor to enter the idle state */ .macro at91_cpu_idle @@ -178,11 +169,46 @@ ENDPROC(at91_backup_mode) orr tmp1, tmp1, #AT91_PMC_KEY str tmp1, [pmc, #AT91_CKGR_MOR] + /* Save RC oscillator state */ + ldr tmp1, [pmc, #AT91_PMC_SR] + str tmp1, .saved_osc_status + tst tmp1, #AT91_PMC_MOSCRCS + bne 1f + + /* Turn off RC oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCRCEN + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + /* Wait main RC disabled done */ +2: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCRCS + bne 2b + /* Wait for interrupt */ - at91_cpu_idle +1: at91_cpu_idle - /* Turn on the crystal oscillator */ + /* Restore RC oscillator state */ + ldr tmp1, .saved_osc_status + tst tmp1, #AT91_PMC_MOSCRCS + beq 4f + + /* Turn on RC oscillator */ ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCRCEN + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + /* Wait main RC stabilization */ +3: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCRCS + beq 3b + + /* Turn on the crystal oscillator */ +4: ldr tmp1, [pmc, #AT91_CKGR_MOR] orr tmp1, tmp1, #AT91_PMC_MOSCEN orr tmp1, tmp1, #AT91_PMC_KEY str tmp1, [pmc, #AT91_CKGR_MOR] @@ -197,8 +223,26 @@ ENDPROC(at91_backup_mode) .macro at91_pm_ulp1_mode ldr pmc, .pmc_base - /* Switch the main clock source to 12-MHz RC oscillator */ + /* Save RC oscillator state and check if it is enabled. */ + ldr tmp1, [pmc, #AT91_PMC_SR] + str tmp1, .saved_osc_status + tst tmp1, #AT91_PMC_MOSCRCS + bne 2f + + /* Enable RC oscillator */ ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCRCEN + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + /* Wait main RC stabilization */ +1: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCRCS + beq 1b + + /* Switch the main clock source to 12-MHz RC oscillator */ +2: ldr tmp1, [pmc, #AT91_CKGR_MOR] bic tmp1, tmp1, #AT91_PMC_MOSCSEL bic tmp1, tmp1, #AT91_PMC_KEY_MASK orr tmp1, tmp1, #AT91_PMC_KEY @@ -262,6 +306,25 @@ ENDPROC(at91_backup_mode) str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy + + /* Restore RC oscillator state */ + ldr tmp1, .saved_osc_status + tst tmp1, #AT91_PMC_MOSCRCS + bne 3f + + /* Disable RC oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCRCEN + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + /* Wait RC oscillator disable done */ +4: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCRCS + bne 4b + +3: .endm ENTRY(at91_ulp_mode) @@ -279,14 +342,6 @@ ENTRY(at91_ulp_mode) wait_mckrdy - /* Save PLLA setting and disable it */ - ldr tmp1, [pmc, #AT91_CKGR_PLLAR] - str tmp1, .saved_pllar - - mov tmp1, #AT91_PMC_PLLCOUNT - orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ - str tmp1, [pmc, #AT91_CKGR_PLLAR] - ldr r0, .pm_mode cmp r0, #AT91_PM_ULP1 beq ulp1_mode @@ -301,18 +356,6 @@ ulp1_mode: ulp_exit: ldr pmc, .pmc_base - /* Restore PLLA setting */ - ldr tmp1, .saved_pllar - str tmp1, [pmc, #AT91_CKGR_PLLAR] - - tst tmp1, #(AT91_PMC_MUL & 0xff0000) - bne 3f - tst tmp1, #(AT91_PMC_MUL & ~0xff0000) - beq 4f -3: - wait_pllalock -4: - /* * Restore master clock setting */ @@ -465,8 +508,6 @@ ENDPROC(at91_sramc_self_refresh) .word 0 .saved_mckr: .word 0 -.saved_pllar: - .word 0 .saved_sam9_lpr: .word 0 .saved_sam9_lpr1: @@ -475,6 +516,8 @@ ENDPROC(at91_sramc_self_refresh) .word 0 .saved_sam9_mdr1: .word 0 +.saved_osc_status: + .word 0 ENTRY(at91_pm_suspend_in_sram_sz) .word .-at91_pm_suspend_in_sram diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index cc5f15679d29..381f452de28d 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -27,7 +27,6 @@ #include <linux/cpu.h> #include <linux/pci.h> #include <linux/sched_clock.h> -#include <linux/bitops.h> #include <linux/irqchip/irq-ixp4xx.h> #include <linux/platform_data/timer-ixp4xx.h> #include <mach/udc.h> diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c index 0b10acd7d1b9..d2df5ef9382b 100644 --- a/arch/arm/mach-mvebu/board-v7.c +++ b/arch/arm/mach-mvebu/board-v7.c @@ -136,7 +136,6 @@ static void __init i2c_quirk(void) of_update_property(np, new_compat); } - return; } static void __init mvebu_dt_init(void) diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S index 8b2fbc8b6bc6..2d962fe48821 100644 --- a/arch/arm/mach-mvebu/coherency_ll.S +++ b/arch/arm/mach-mvebu/coherency_ll.S @@ -66,7 +66,7 @@ ENDPROC(ll_get_coherency_base) * fabric registers */ ENTRY(ll_get_coherency_cpumask) - mrc 15, 0, r3, cr0, cr0, 5 + mrc p15, 0, r3, cr0, cr0, 5 and r3, r3, #15 mov r2, #(1 << 24) lsl r3, r2, r3 diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c index 9b5f4d665374..ceaad6d5927e 100644 --- a/arch/arm/mach-mvebu/kirkwood.c +++ b/arch/arm/mach-mvebu/kirkwood.c @@ -108,8 +108,6 @@ static void __init kirkwood_dt_eth_fixup(void) clk_prepare_enable(clk); /* store MAC address register contents in local-mac-address */ - pr_err(FW_INFO "%pOF: local-mac-address is not set\n", np); - pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL); if (!pmac) goto eth_fixup_no_mem; diff --git a/arch/arm/mach-mvebu/pm-board.c b/arch/arm/mach-mvebu/pm-board.c index db17121d7d63..070552511699 100644 --- a/arch/arm/mach-mvebu/pm-board.c +++ b/arch/arm/mach-mvebu/pm-board.c @@ -79,7 +79,7 @@ static void mvebu_armada_pm_enter(void __iomem *sdram_reg, u32 srcmd) static int __init mvebu_armada_pm_init(void) { struct device_node *np; - struct device_node *gpio_ctrl_np; + struct device_node *gpio_ctrl_np = NULL; int ret = 0, i; if (!of_machine_is_compatible("marvell,axp-gp")) @@ -126,18 +126,23 @@ static int __init mvebu_armada_pm_init(void) goto out; } + if (gpio_ctrl_np) + of_node_put(gpio_ctrl_np); gpio_ctrl_np = args.np; pic_raw_gpios[i] = args.args[0]; } gpio_ctrl = of_iomap(gpio_ctrl_np, 0); - if (!gpio_ctrl) - return -ENOMEM; + if (!gpio_ctrl) { + ret = -ENOMEM; + goto out; + } mvebu_pm_suspend_init(mvebu_armada_pm_enter); out: of_node_put(np); + of_node_put(gpio_ctrl_np); return ret; } diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S index 88651221dbdd..7aae9a25cfeb 100644 --- a/arch/arm/mach-mvebu/pmsu_ll.S +++ b/arch/arm/mach-mvebu/pmsu_ll.S @@ -16,7 +16,7 @@ ENTRY(armada_38x_scu_power_up) mrc p15, 4, r1, c15, c0 @ get SCU base address orr r1, r1, #0x8 @ SCU CPU Power Status Register - mrc 15, 0, r0, cr0, cr0, 5 @ get the CPU ID + mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID and r0, r0, #15 add r1, r1, r0 mov r0, #0x0 @@ -56,7 +56,6 @@ ENDPROC(armada_38x_cpu_resume) /* The following code will be executed from SRAM */ ENTRY(mvebu_boot_wa_start) -mvebu_boot_wa_start: ARM_BE8(setend be) adr r0, 1f ldr r0, [r0] @ load the address of the diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 1b15d593837e..b6e814166ee0 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -749,7 +749,7 @@ static void __init ams_delta_init(void) ARRAY_SIZE(ams_delta_gpio_tables)); leds_pdev = gpio_led_register_device(PLATFORM_DEVID_NONE, &leds_pdata); - if (!IS_ERR(leds_pdev)) { + if (!IS_ERR_OR_NULL(leds_pdev)) { leds_gpio_table.dev_id = dev_name(&leds_pdev->dev); gpiod_add_lookup_table(&leds_gpio_table); } diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 0f4d91824e4b..1001410c4782 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -215,6 +215,7 @@ config ARCH_SYNQUACER config ARCH_TEGRA bool "NVIDIA Tegra SoC Family" select ARCH_HAS_RESET_CONTROLLER + select ARM_GIC_PM select CLKDEV_LOOKUP select CLKSRC_MMIO select TIMER_OF diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index 75ee6cf1e1b4..14d7fea82daf 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -59,7 +59,7 @@ }; padctl@3520000 { - status = "okay"; + status = "disabled"; avdd-pll-erefeut-supply = <&vdd_1v8_pll>; avdd-usb-supply = <&vdd_3v3_sys>; @@ -137,7 +137,7 @@ }; usb@3530000 { - status = "okay"; + status = "disabled"; phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>, <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>, diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index f0bb6ced4976..426ac0bdf6a6 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -60,6 +60,7 @@ clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref"; resets = <&bpmp TEGRA186_RESET_EQOS>; reset-names = "eqos"; + iommus = <&smmu TEGRA186_SID_EQOS>; status = "disabled"; snps,write-requests = <1>; @@ -338,6 +339,7 @@ <&bpmp TEGRA186_RESET_HDA2CODEC_2X>; reset-names = "hda", "hda2hdmi", "hda2codec_2x"; power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>; + iommus = <&smmu TEGRA186_SID_HDA>; status = "disabled"; }; @@ -671,6 +673,10 @@ <&bpmp TEGRA186_RESET_PCIEXCLK>; reset-names = "afi", "pex", "pcie_x"; + iommus = <&smmu TEGRA186_SID_AFI>; + iommu-map = <0x0 &smmu TEGRA186_SID_AFI 0x1000>; + iommu-map-mask = <0x0>; + status = "disabled"; pci@1,0 { @@ -1158,6 +1164,7 @@ bpmp: bpmp { compatible = "nvidia,tegra186-bpmp"; + iommus = <&smmu TEGRA186_SID_BPMP>; mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>; shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index eb6be5675f79..4bb862c6b083 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -75,7 +75,9 @@ "sprd,sc9836-uart"; reg = <0x0 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART0_EB>, + <&ap_clk CLK_UART0>, <&ext_26m>; status = "disabled"; }; @@ -84,7 +86,9 @@ "sprd,sc9836-uart"; reg = <0x100000 0x100>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART1_EB>, + <&ap_clk CLK_UART1>, <&ext_26m>; status = "disabled"; }; @@ -93,7 +97,9 @@ "sprd,sc9836-uart"; reg = <0x200000 0x100>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART2_EB>, + <&ap_clk CLK_UART2>, <&ext_26m>; status = "disabled"; }; @@ -102,7 +108,9 @@ "sprd,sc9836-uart"; reg = <0x300000 0x100>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART3_EB>, + <&ap_clk CLK_UART3>, <&ext_26m>; status = "disabled"; }; }; diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c index b0b688c481e8..3751d811be39 100644 --- a/drivers/amba/tegra-ahb.c +++ b/drivers/amba/tegra-ahb.c @@ -170,8 +170,7 @@ int tegra_ahb_enable_smmu(struct device_node *dn) EXPORT_SYMBOL(tegra_ahb_enable_smmu); #endif -#ifdef CONFIG_PM -static int tegra_ahb_suspend(struct device *dev) +static int __maybe_unused tegra_ahb_suspend(struct device *dev) { int i; struct tegra_ahb *ahb = dev_get_drvdata(dev); @@ -181,7 +180,7 @@ static int tegra_ahb_suspend(struct device *dev) return 0; } -static int tegra_ahb_resume(struct device *dev) +static int __maybe_unused tegra_ahb_resume(struct device *dev) { int i; struct tegra_ahb *ahb = dev_get_drvdata(dev); @@ -190,7 +189,6 @@ static int tegra_ahb_resume(struct device *dev) gizmo_writel(ahb, ahb->ctx[i], tegra_ahb_gizmo[i]); return 0; } -#endif static UNIVERSAL_DEV_PM_OPS(tegra_ahb_pm, tegra_ahb_suspend, diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c index 819bed0f5667..51b3a47b5a55 100644 --- a/drivers/soc/fsl/qe/gpio.c +++ b/drivers/soc/fsl/qe/gpio.c @@ -179,8 +179,10 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index) if (err < 0) goto err0; gc = gpio_to_chip(err); - if (WARN_ON(!gc)) + if (WARN_ON(!gc)) { + err = -ENODEV; goto err0; + } if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) { pr_debug("%s: tried to get a non-qe pin\n", __func__); diff --git a/drivers/soc/ixp4xx/ixp4xx-qmgr.c b/drivers/soc/ixp4xx/ixp4xx-qmgr.c index 13a8a13c9b01..bb90670ec160 100644 --- a/drivers/soc/ixp4xx/ixp4xx-qmgr.c +++ b/drivers/soc/ixp4xx/ixp4xx-qmgr.c @@ -385,8 +385,8 @@ static int ixp4xx_qmgr_probe(struct platform_device *pdev) if (!res) return -ENODEV; qmgr_regs = devm_ioremap_resource(dev, res); - if (!qmgr_regs) - return -ENOMEM; + if (IS_ERR(qmgr_regs)) + return PTR_ERR(qmgr_regs); irq1 = platform_get_irq(pdev, 0); if (irq1 <= 0) diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index 0c53f26ae3d3..44e8fc30b889 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -161,6 +161,7 @@ #define AT91_PMC_FSMR 0x70 /* Fast Startup Mode Register */ #define AT91_PMC_FSTT(n) BIT(n) +#define AT91_PMC_RTTAL BIT(16) #define AT91_PMC_RTCAL BIT(17) /* RTC Alarm Enable */ #define AT91_PMC_USBAL BIT(18) /* USB Resume Enable */ #define AT91_PMC_SDMMC_CD BIT(19) /* SDMMC Card Detect Enable */ |