diff options
| author | Kan Liang <kan.liang@linux.intel.com> | 2021-02-02 12:09:10 -0800 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2021-02-08 16:25:00 -0300 |
| commit | 590db42de068a1d11e51bd0796a9044621aeed2e (patch) | |
| tree | 8a08575b6be5ba31cdbbaae1c95eda72f623cf82 /tools/perf/util/intel-pt.c | |
| parent | ea8d0ed6eae37b01953a29bca98112d9e2507a84 (diff) | |
perf report: Support instruction latency
The instruction latency information can be recorded on some platforms,
e.g., the Intel Sapphire Rapids server. With both memory latency
(weight) and the new instruction latency information, users can easily
locate the expensive load instructions, and also understand the time
spent in different stages. The users can optimize their applications in
different pipeline stages.
The 'weight' field is shared among different architectures. Reusing the
'weight' field may impacts other architectures. Add a new field to store
the instruction latency.
Like the 'weight' support, introduce a 'ins_lat' for the global
instruction latency, and a 'local_ins_lat' for the local instruction
latency version.
Add new sort functions, INSTR Latency and Local INSTR Latency,
accordingly.
Add local_ins_lat to the default_mem_sort_order[].
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lore.kernel.org/lkml/1612296553-21962-7-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/util/intel-pt.c')
| -rw-r--r-- | tools/perf/util/intel-pt.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c index a929f6dbdf43..c9477d021687 100644 --- a/tools/perf/util/intel-pt.c +++ b/tools/perf/util/intel-pt.c @@ -1871,9 +1871,10 @@ static int intel_pt_synth_pebs_sample(struct intel_pt_queue *ptq) * cycles. Use latency >> 32 to distinguish the * different format of the mem access latency field. */ - if (weight > 0) + if (weight > 0) { sample.weight = weight & 0xffff; - else + sample.ins_lat = items->mem_access_latency & 0xffff; + } else sample.weight = items->mem_access_latency; } if (!sample.weight && items->has_tsx_aux_info) { |